DART-MX8M SPI
In this example we will show how to configure and test SPI1 on DART-MX8M
Kernel configuration
Verify that the User mode SPI driver (CONFIG_SPI_SPIDEV) is enabled in your kernel configuration:
- In menuconfig: Device Drivers -> SPI support -> <*> User mode SPI device driver support
SPI 1
Add spidev node
Edit arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi and add spidev node
&ecspi1 { #address-cells = <1>; #size-cells = <0>; num-cs = <1>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1>; status = "okay"; chip1: spidev@0 { compatible = "spidev"; spi-max-frequency = <12000000>; reg = <0>; }; };
Configure SPI1 pins
&iomuxc { imx8mq-evk { ... pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x11 MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x11 MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x11 MX8MQ_IOMUXC_ECSPI1_SS0_ECSPI1_SS0 0x11 >; }; ... }; };
Note: The pins here were set arbitrarily. You should set them based on your hardware design, and make sure they are not conflicting with other devices in the device tree.
you can also have multiple chip selects.
Recompile the kernel
Compile the kernel and device tree and update the SOM.
Compile SPI test application
There's an SPI test utility C code example in the kernel source tree: tools/spi/spidev_test.c (in older kernels: Documentation/spi/spidev_test.c)
To cross compile it use the following command
$ $CC ./tools/spi/spidev_test.c -o ./spidev_test
Run SPI Test
Transfer spidev_test binary to DART-MX8M and run
# ./spidev_test -v -l -D /dev/spidev32766.0
The output of successful test should look like this:
spi mode: 0x20 bits per word: 8 max speed: 500000 Hz (500 KHz) TX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D | ......@....�..................�. RX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D | ......@....�..................�.
SPI 1 External Connector
SPI 1 will be accessible on the following EVK pins:
- J16.2 - SPI1.SCLK
- J16.4 - SPI1.SS0
- J16.6 - SPI1.MOSI
- J16.8 - SPI1.MISO