DART-MX8M

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, by selecting the right version with the symbolic link in the /boot folder of the booting media.
These device trees contain m4 label in their name.

The below table lists an example dtb blob file name for DART-MX8M (on DT8MCustomBoard rev. 1.3 and higher) with support for M4 (and SD card and LVDS), for each kernel version / Yocto release:

File Name	Description
imx8mq-var-dart-dt8mcustomboard-m4-sd-lvds.dtb	For kernel >= 5.4.85 (Yocto >= Dunfell)
imx8mq-var-dart-m4-sd-lvds.dtb	For kernel = 5.4.24 (Yocto Zeus)
fsl-imx8mq-var-dart-m4-sd-lvds.dtb	For kernel = 4.19.35 (Yocto Warrior)
Image.gz-fsl-imx8mq-var-dart-m4-sd-lvds.dtb	For kernel = 4.14.98 (Yocto Sumo)

For the full list of device tree blob files, refer to the "Build Results" section in the appropriate wiki page for the specific Yocto/Debian release you are using.

Default M4 pins

Default M4 pins used by the demos are:

Function	Pin
debug UART (UART2)	RX: J12.6 / TX: J12.4
GPIO (GPIO4_IO03)	LED7 for DT8CustomBoard 1.x U43.2 / R228 for DT8CustomBoard >= 2.0 (Use Oscilloscope to observe output signal)
I2C (I2C3)	SCL: J12.18 / SDA: J12.20
PWM (PWM2)	J14.3

Available Demos

driver_examples/i2c/interrupt_b2b_transfer/slave
driver_examples/i2c/interrupt_b2b_transfer/master
driver_examples/i2c/polling_b2b_transfer/slave
driver_examples/i2c/polling_b2b_transfer/master
driver_examples/wdog
driver_examples/gpio/led_output
driver_examples/tmu/tmu_monitor_report
driver_examples/pwm
driver_examples/uart/auto_baudrate_detect
driver_examples/uart/interrupt
driver_examples/uart/interrupt_rb_transfer
driver_examples/uart/polling
driver_examples/uart/interrupt_transfer
driver_examples/gpt/timer
driver_examples/gpt/capture
driver_examples/ecspi/ecspi_loopback
driver_examples/qspi/polling_transfer
driver_examples/rdc
driver_examples/sema4/uboot
rtos_examples/freertos_ecspi/ecspi_loopback
rtos_examples/freertos_hello
rtos_examples/freertos_queue
rtos_examples/freertos_sem
rtos_examples/freertos_generic
rtos_examples/freertos_uart
rtos_examples/freertos_tickless
rtos_examples/freertos_mutex
rtos_examples/freertos_event
rtos_examples/freertos_swtimer
rtos_examples/freertos_i2c
cmsis_driver_examples/i2c/int_b2b_transfer/slave
cmsis_driver_examples/i2c/int_b2b_transfer/master
cmsis_driver_examples/uart/interrupt_transfer
cmsis_driver_examples/ecspi/int_loopback_transfer
multicore_examples/rpmsg_lite_str_echo_rtos
multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
demo_apps/hello_world

NXP Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type	M4 memory area	A53 memory area	memory lentgh	linker file
DDR	0x80000000-0x801FFFFF (code) 0x80200000-0x803FFFFF (data) 0x80400000-0x80FFFFFF (data2)	0x80000000-0x801FFFFF (code) 0x80200000-0x803FFFFF (data) 0x80400000-0x80FFFFFF (data2)	16MB (DDR)	MIMX8MQ6xxxJZ_cm4_ddr_ram.ld
TCM	0x1FFE0000-0x1FFFFFFF (code) 0x20000000-0x2001FFFF (data) 0x80000000-0x80FFFFFF (data2)	0x007E0000-0x007FFFFF (code) 0x00800000-0x0081FFFF (data) 0x80000000-0x80FFFFFF (data2)	256kB (TCM) + 16MB (DDR)	MIMX8MQ6xxxJZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must match the one declared in the kernel device tree: at least 2 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x80000000 - 0x80FFFFFF.

The RPMSG area is located at 0xB8000000: at least 3 GB of RAM is required on the SoM to allow Cortex-M4 accessing the RPMSG area. After launching the build_all.sh command the following folder will be created in the armgcc folder

ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8M Applications Processor Reference Manual paragraphs:

2.1.2 Cortex-A53 Memory Map
2.1.3 Cortex-M4 Memory Map

Variscite Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type	M4 memory area	A53 memory area	memory lentgh	linker file
DDR	0x7E000000-0x7E1FFFFF (code) 0x7E200000-0x7E3FFFFF (data) 0x7E400000-0x7EFFFFFF (data2)	0x7E000000-0x7E1FFFFF (code) 0x7E200000-0x7E3FFFFF (data) 0x7E400000-0x7EFFFFFF (data2)	16MB (DDR)	MIMX8MQ6xxxJZ_cm4_ddr_ram.ld
TCM	0x1FFE0000-0x1FFFFFFF (code) 0x20000000-0x2001FFFF (data) 0x7E000000-0x7EFFFFFF (data2)	0x007E0000-0x007FFFFF (code) 0x00800000-0x0081FFFF (data) 0x7E000000-0x7EFFFFFF (data2)	256kB (TCM) + 16MB (DDR)	MIMX8MQ6xxxJZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M4 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M4.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M4 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8M Applications Processor Reference Manual paragraphs:

2.1.2 Cortex-A53 Memory Map
2.1.3 Cortex-M4 Memory Map

JTAG

The VAR-DT8MCustomBoard exports the DART-MX8M JTAG signals through J29, a standard 1.27" 10 pin header.

Here is the pinout:

pin	signal	description	pin	signal	description
1	JTAG_VREF	JTAG IO reference voltage, connects to SOM_NVCC_3V3.	2	JTAG_TMS	JTAG Mode Select signal
3	GND	Digital Ground	4	JTAG_TCK	JTAG Clock signal, requires 10K pull down.
5	GND	Digital Ground	6	JTAG_TDO	JTAG Data Out signal
7	GND	Digital Ground	8	JTAG_TDI	JTAG Data In signal
9	JTAG_NTRST_C	JTAG Reset signal	10	NRST_CON	Programmer Reset, used to put the SOC in reset state.

Please refer to board schematics for further details.

Releases

mcuxpresso-2.5.1-mx8mq-v1.0

HARDWARE_NAME = DART-MX8M
RELEASE_NAME = mcuxpresso-2.5.1-mx8mq-v1.0
RELEASE_LINK = MCUXPRESSO_2.5.1_V1.0_DART-MX8M
MCUXPRESSO_VERSION = 2.5.1
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
BOARD_FOLDER = boards/dart_mx8mq
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M_PINS_SECTION
DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
DTBS_SECTION = DART-MX8M_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_NXP_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK i.MX 8M Devices.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MQ

mcuxpresso-2.5.1-mx8mq-v1.1

   *HARDWARE_NAME = DART-MX8M

RELEASE_NAME = mcuxpresso-2.5.1-mx8mq-v1.1
RELEASE_LINK = MCUXPRESSO_2.5.1_V1.1_DART-MX8M
MCUXPRESSO_VERSION = 2.5.1
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
BOARD_FOLDER = boards/dart_mx8mq
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M_PINS_SECTION
DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
DTBS_SECTION = DART-MX8M_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK i.MX 8M Devices.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MQ

mcuxpresso-2.8.0-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M

RELEASE_NAME = mcuxpresso-2.8.0-mx8mq-v1.0
RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_DART-MX8M
MCUXPRESSO_VERSION = 2.8.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
BOARD_FOLDER = boards/dart_mx8mq
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M_PINS_SECTION
DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
DTBS_SECTION = DART-MX8M_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MQ

mcuxpresso-2.9.0-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M

RELEASE_NAME = mcuxpresso-2.9.0-mx8mq-v1.0
RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_DART-MX8M
MCUXPRESSO_VERSION = 2.9.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
BOARD_FOLDER = boards/dart_mx8mq
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M_PINS_SECTION
DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
DTBS_SECTION = DART-MX8M_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MQ
YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mq-v1.0

mcuxpresso-2.10.0-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M

RELEASE_NAME = mcuxpresso-2.10.0-mx8mq-v1.0
RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_DART-MX8M
MCUXPRESSO_VERSION = 2.10.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
BOARD_FOLDER = boards/dart_mx8mq
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M_PINS_SECTION
DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
DTBS_SECTION = DART-MX8M_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MQ
YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mq-v1.3
DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8MQ-deactivated-the-LMEM-caches-to-debug-in-exter.patch
BOARD_SDK = dart_mx8mq

mcuxpresso-2.11.1-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M

RELEASE_NAME = mcuxpresso-2.11.1-mx8mq-v1.0
RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_DART-MX8M
MCUXPRESSO_VERSION = 2.11.1
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
BOARD_FOLDER = boards/dart_mx8mq
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M_PINS_SECTION
DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
DTBS_SECTION = DART-MX8M_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MQ
YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mq-v1.5
DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8MQ-deactivated-the-LMEM-caches-to-debug-in-exter.patch
BOARD_SDK = dart_mx8mq

mcuxpresso-2.12.1-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M

RELEASE_NAME = mcuxpresso-2.12.1-mx8mq-v1.0
RELEASE_LINK = MCUXPRESSO_2.12.1_V1.0_DART-MX8M
MCUXPRESSO_VERSION = 2.12.1
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.12.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.10
BOARD_FOLDER = boards/dart_mx8mq
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M_PINS_SECTION
DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
DTBS_SECTION = DART-MX8M_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MQ
YOCTO_RELEASE_TAG = mx8m-yocto-kirkstone-5.15-2.0.x-v1.0
DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8MQ-deactivated-the-LMEM-caches-to-debug-in-exter.patch
BOARD_SDK = dart_mx8mq

mcuxpresso-2.13.0-mx8mq-v1.0

DART-MX8M-MINI

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m4 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.

File Name	Description
imx8mm-var-dart-dt8mcustomboard-m4.dtb	DART-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell)
imx8mm-var-dart-m4.dtb	DART-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
fsl-imx8mm-var-dart-m4.dtb	DART-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. > 1.0
imx8mm-var-som-symphony-m4.dtb	VAR-SOM-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above
imx8mm-var-som-symphony-legacy-m4.dtb	VAR-SOM-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
imx8mm-var-som-m4.dtb	VAR-SOM-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
imx8mm-var-som-rev10-m4.dtb	VAR-SOM-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. 1.0
fsl-imx8mm-var-som-m4.dtb	VAR-SOM-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. > 1.0
fsl-imx8mm-var-som-rev10-m4.dtb	VAR-SOM-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. 1.0

Default M4 pins

Default M4 pins used by the demos are:

Function	Pin
Debug UART (UART2)	RX: J12.6 / TX: J12.4
GPIO (GPIO4_IO03)	LED7
I2C (I2C4)	SCL: J12.17 / SDA: J12.19
PWM (PWM2)	J14.3

Default M4 pins v2

Default M4 pins used by the demos are:

Function	SoC balls	DART-MX8M-MINI pins	DT8MCB pins	VAR-SOM-MX8M-MINI pins	Symphony pins	Notes
UART3 RX/TX	E18 / D18	J2.87 / J2.89	J12.11 / J12.13	J1.175 / J1.124	J18.5 / J18.3
GPIO4_IO03	AF15	J2.59	GPLED1	J1.84	J17.3	The led_output demo makes the GPLED1 blink for only DT8MCustomBoard 1.x, use the scope on one of the following test points for DT8MCustomBoard >= 2.x (U43.2/R228/MIPI-CSI pin 20)
I2C4 SCL/SDA	D13 / E13	J1.17 / J1.19	J12.17/ J12.19	J1.174 / J1.176	J16.10 / J16.12
PWM3	AF9	J3.36	J14.7	J1.69	J18.2
SPI1 CS0/SCK/SDI/SDO	B6 / D6 / A7 / B7	J2.79 / J2.77 / J2.81 / J2.83	J16.4/ J16.2 / J16.8 / J16.6	J1.39 / J1.43 / J1.41 / J1.45	J16.4/ J16.2 / J16.6 / J16.8	Enabling it SPI devices will be no longer visible from Linux

Available Demos

driver_examples/i2c/interrupt_b2b_transfer/slave
driver_examples/i2c/interrupt_b2b_transfer/master
driver_examples/i2c/polling_b2b_transfer/slave
driver_examples/i2c/polling_b2b_transfer/master
driver_examples/wdog
driver_examples/sdma/scatter_gather
driver_examples/sdma/memory_to_memory
driver_examples/gpio/led_output
driver_examples/pwm
driver_examples/uart/auto_baudrate_detect
driver_examples/uart/interrupt
driver_examples/uart/idle_detect_sdma_transfer
driver_examples/uart/interrupt_rb_transfer
driver_examples/uart/sdma_transfer
driver_examples/uart/polling
driver_examples/uart/interrupt_transfer
driver_examples/gpt/timer
driver_examples/gpt/capture
driver_examples/ecspi/ecspi_loopback
driver_examples/ecspi/interrupt_b2b_transfer/slave
driver_examples/ecspi/interrupt_b2b_transfer/master
driver_examples/ecspi/polling_b2b_transfer/slave
driver_examples/ecspi/polling_b2b_transfer/master
driver_examples/rdc
driver_examples/tmu_1/monitor_threshold
driver_examples/tmu_1/temperature_polling
driver_examples/sema4/uboot
rtos_examples/freertos_ecspi/ecspi_loopback
rtos_examples/freertos_hello
rtos_examples/freertos_queue
rtos_examples/freertos_sem
rtos_examples/freertos_generic
rtos_examples/freertos_uart
rtos_examples/freertos_tickless
rtos_examples/freertos_mutex
rtos_examples/freertos_event
rtos_examples/freertos_swtimer
rtos_examples/freertos_i2c
cmsis_driver_examples/i2c/int_b2b_transfer/slave
cmsis_driver_examples/i2c/int_b2b_transfer/master
cmsis_driver_examples/uart/sdma_transfer
cmsis_driver_examples/uart/interrupt_transfer
cmsis_driver_examples/ecspi/int_loopback_transfer
cmsis_driver_examples/ecspi/sdma_loopback_transfer
multicore_examples/rpmsg_lite_str_echo_rtos
multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
demo_apps/hello_world

Variscite Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type	M4 memory area	A53 memory area	memory lentgh	linker file
DDR	0x7E000000-0x7E1FFFFF (code) 0x7E200000-0x7E3FFFFF (data) 0x7E400000-0x7EFFFFFF (data2)	0x7E000000-0x7E1FFFFF (code) 0x7E200000-0x7E3FFFFF (data) 0x7E400000-0x7EFFFFFF (data2)	16MB (DDR)	MIMX8MM6xxxxx_cm4_ddr_ram.ld
TCM	0x1FFE0000-0x1FFFFFFF (code) 0x20000000-0x2001FFFF (data) 0x7E000000-0x7EFFFFFF (data2)	0x007E0000-0x007FFFFF (code) 0x00800000-0x0081FFFF (data) 0x7E000000-0x7EFFFFFF (data2)	256kB (TCM) + 16MB (DDR)	MIMX8MM6xxxxx_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M4 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M4.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M4 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8M Mini Applications Processor Reference Manual paragraphs:

2.1.2 Cortex-A53 Memory Map
2.1.3 Cortex-M4 Memory Map

Releases

freertos-1.0.1-mx7-v1.0

mcuxpresso-2.5.0-mx8mm-v1.0

HARDWARE_NAME = DART-MX8M-MINI
RELEASE_NAME = mcuxpresso-2.5.0-mx8mm-v1.0
RELEASE_LINK = MCUXPRESSO_2.5.0_V1.0_DART-MX8M-MINI
MCUXPRESSO_VERSION = 2.5.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
BOARD_FOLDER = boards/dart_mx8mm
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M-MINI_PINS_SECTION
DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for i.MX 8M Mini.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MM

mcuxpresso-2.5.0-mx8mm-v1.1

   *HARDWARE_NAME = DART-MX8M-MINI

RELEASE_NAME = mcuxpresso-2.5.0-mx8mm-v1.1
RELEASE_LINK = MCUXPRESSO_2.5.0_V1.1_DART-MX8M-MINI
MCUXPRESSO_VERSION = 2.5.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
BOARD_FOLDER = boards/dart_mx8mm
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for i.MX 8M Mini.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MM

mcuxpresso-2.8.0-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI

RELEASE_NAME = mcuxpresso-2.8.0-mx8mm-v1.0
RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_DART-MX8M-MINI
MCUXPRESSO_VERSION = 2.8.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
BOARD_FOLDER = boards/dart_mx8mm
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MM

mcuxpresso-2.9.0-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI

RELEASE_NAME = mcuxpresso-2.9.0-mx8mm-v1.0
RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_DART-MX8M-MINI
MCUXPRESSO_VERSION = 2.9.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
BOARD_FOLDER = boards/dart_mx8mm
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MM
YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mm-v1.1

mcuxpresso-2.10.0-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI

RELEASE_NAME = mcuxpresso-2.10.0-mx8mm-v1.0
RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_DART-MX8M-MINI
MCUXPRESSO_VERSION = 2.10.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
BOARD_FOLDER = boards/dart_mx8mm
DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MM
YOCTO_RELEASE_TAG = hardknott-fslc-5.4-2.3.x-mx8mm-v1.1

mcuxpresso-2.11.1-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI

RELEASE_NAME = mcuxpresso-2.11.1-mx8mm-v1.0
RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_DART-MX8M-MINI
MCUXPRESSO_VERSION = 2.11.1
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
BOARD_FOLDER = boards/dart_mx8mm
DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MM
YOCTO_RELEASE_TAG = hardknott-fslc-5.4-2.3.x-mx8mm-v1.4

mcuxpresso-2.12.1-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI

RELEASE_NAME = mcuxpresso-2.12.1-mx8mm-v1.0
RELEASE_LINK = MCUXPRESSO_2.12.1_V1.0_DART-MX8M-MINI
MCUXPRESSO_VERSION = 2.12.1
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.12.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.10
BOARD_FOLDER = boards/dart_mx8mm
DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MM
YOCTO_RELEASE_TAG = mx8mm-yocto-kirkstone-5.15-2.0.x-v1.0

mcuxpresso-2.13.0-mx8mm-v1.0

VAR-SOM-MX8M-NANO

Sections

Available dtbs

To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m7 label in the name, using the fdt_file environment variable in U-Boot.

File Name	Description
imx8mn-var-som-symphony-m7.dtb	VAR-SOM-MX8M-NANO device tree blob for kernel = 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above and for kernel >= 5.10.72 (Yocto Hardknott) on all Symphony-Boards
imx8mn-var-som-symphony-legacy-m7.dtb	VAR-SOM-MX8M-NANO device tree blob for kernel = 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
imx8mn-var-som-m7.dtb	VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev > 1.0
imx8mn-var-som-rev10-m7.dtb	VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev 1.0
fsl-imx8mn-var-som-m7.dtb	VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev > 1.0
fsl-imx8mn-var-som-rev10-m7.dtb	VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev 1.0

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.

Default M7 pins

Default M7 pins used by the demos are:

Function	SoC balls	VAR-SOM-MX8M-NANO pins	Symphony pins	Notes
UART3 RX/TX	E18 / D18	J1.175 / J1.124	J18.5 / J18.3
GPIO4_IO23	AC24	J1.21	J16.5
I2C4 SCL/SDA	D13 / E13	J1.174 / J1.176	J16.10 / J16.12
PWM3	AF9	J1.69	J18.2
SPI1 CS0/SCK/SDI/SDO	B6 / D6 / A7 / B7	J1.39 / J1.43 / J1.41 / J1.45	J16.4/ J16.2 / J16.6 / J16.8	Enabling it SPI devices will be no longer visible from Linux

Available Demos

driver_examples/i2c/interrupt_b2b_transfer/slave
driver_examples/i2c/interrupt_b2b_transfer/master
driver_examples/i2c/polling_b2b_transfer/slave
driver_examples/i2c/polling_b2b_transfer/master
driver_examples/wdog
driver_examples/sdma/scatter_gather
driver_examples/sdma/memory_to_memory
driver_examples/gpio/led_output
driver_examples/pwm
driver_examples/uart/auto_baudrate_detect
driver_examples/uart/interrupt
driver_examples/uart/idle_detect_sdma_transfer
driver_examples/uart/interrupt_rb_transfer
driver_examples/uart/sdma_transfer
driver_examples/uart/polling
driver_examples/uart/interrupt_transfer
driver_examples/gpt/timer
driver_examples/gpt/capture
driver_examples/ecspi/ecspi_loopback
driver_examples/ecspi/interrupt_b2b_transfer/slave
driver_examples/ecspi/interrupt_b2b_transfer/master
driver_examples/ecspi/polling_b2b_transfer/slave
driver_examples/ecspi/polling_b2b_transfer/master
driver_examples/rdc
driver_examples/tmu_1/monitor_threshold
driver_examples/tmu_1/temperature_polling
driver_examples/sema4/uboot
rtos_examples/freertos_ecspi/ecspi_loopback
rtos_examples/freertos_hello
rtos_examples/freertos_queue
rtos_examples/freertos_sem
rtos_examples/freertos_generic
rtos_examples/freertos_uart
rtos_examples/freertos_tickless
rtos_examples/freertos_mutex
rtos_examples/freertos_event
rtos_examples/freertos_swtimer
rtos_examples/freertos_i2c
cmsis_driver_examples/i2c/int_b2b_transfer/slave
cmsis_driver_examples/i2c/int_b2b_transfer/master
cmsis_driver_examples/uart/sdma_transfer
cmsis_driver_examples/uart/interrupt_transfer
cmsis_driver_examples/ecspi/int_loopback_transfer
cmsis_driver_examples/ecspi/sdma_loopback_transfer
multicore_examples/rpmsg_lite_str_echo_rtos
multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
demo_apps/hello_world

Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.

memory type	M7 memory area	A53 memory area	memory lentgh	linker file
DDR	0x7E000000-0x7E1FFFFF (code) 0x7E200000-0x7E3FFFFF (data) 0x7E400000-0x7EFFFFFF (data2)	0x7E000000-0x7E1FFFFF (code) 0x7E200000-0x7E3FFFFF (data) 0x7E400000-0x7EFFFFFF (data2)	16MB (DDR)	MIMX8MN6xxxxx_cm7_ddr_ram.ld
TCM	0x00000000-0x0001FFFF (code) 0x20000000-0x2001FFFF (data) 0x7E000000-0x7EFFFFFF (data2)	0x007E0000-0x007FFFFF (code) 0x00800000-0x0081FFFF (data) 0x7E000000-0x7EFFFFFF (data2)	256kB (TCM) + 16MB (DDR)	MIMX8MN6xxxxx_cm7_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M7 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M7.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8M Nano Applications Processor Reference Manual paragraphs:

2.1.2 Cortex-A53 Memory Map
2.1.3 Cortex-M7 Memory Map

JTAG

VAR-SOM-MX8M-NANO exposes JTAG signals on a header (not assembled by default) on the SOM top left side.

Here is the pinout:

pin	signal	description	pin	signal	description
1	JTAG_VREF	JTAG IO reference voltage, connected to SOM_3V3_PER via 150 Ohm.	2	JTAG_TMS	JTAG Mode Select signal
3	GND	Digital Ground	4	JTAG_TCK	JTAG Clock signal, include PD of 8.2K Ohm.
5	GND	Digital Ground	6	JTAG_TDO	JTAG Data Out signal
7	GND	Digital Ground	8	JTAG_TDI	JTAG Data In signal
9	JTAG_TRST_B	JTAG Reset signal, active low signal	10	POR_B	Programmer Reset, used to put the SOC in reset state.

Please refer to SoM datasheet for further details.

Releases

mcuxpresso-2.7.0-mx8mn-v1.0

   *HARDWARE_NAME = VAR-SOM-MX8M-NANO

SOC_HAS_M7 = true
RELEASE_NAME = mcuxpresso-2.7.0-mx8mn-v1.0
RELEASE_LINK = MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO
MCUXPRESSO_VERSION = 2.7.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.7.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/8-2019q3/RC1.1/gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-8-2019-q3-update
BOARD_FOLDER = boards/som_mx8mn
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MN

mcuxpresso-2.8.0-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO

SOC_HAS_M7 = true
RELEASE_NAME = mcuxpresso-2.8.0-mx8mn-v1.0
RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO
MCUXPRESSO_VERSION = 2.8.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
BOARD_FOLDER = boards/som_mx8mn
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MN

mcuxpresso-2.9.0-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO

SOC_HAS_M7 = true
RELEASE_NAME = mcuxpresso-2.9.0-mx8mn-v1.0
RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO
MCUXPRESSO_VERSION = 2.9.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
BOARD_FOLDER = boards/som_mx8mn
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MN
YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mn-v1.1

mcuxpresso-2.10.0-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO

SOC_HAS_M7 = true
RELEASE_NAME = mcuxpresso-2.10.0-mx8mn-v1.0
RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO
MCUXPRESSO_VERSION = 2.10.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
BOARD_FOLDER = boards/som_mx8mn
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MN
YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mn-v1.6

mcuxpresso-2.11.1-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO

SOC_HAS_M7 = true
RELEASE_NAME = mcuxpresso-2.11.1-mx8mn-v1.0
RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO
MCUXPRESSO_VERSION = 2.11.1
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
BOARD_FOLDER = boards/som_mx8mn
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MN
YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mn-v1.8

mcuxpresso-2.12.1-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO

SOC_HAS_M7 = true
RELEASE_NAME = mcuxpresso-2.12.1-mx8mn-v1.0
RELEASE_LINK = MCUXPRESSO_2.12.1_V1.0_VAR-SOM-MX8M-NANO
MCUXPRESSO_VERSION = 2.12.1
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.12.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.10
BOARD_FOLDER = boards/som_mx8mn
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MN
YOCTO_RELEASE_TAG = mx8mn-yocto-hardknott-5.10.72_2.2.1-v1.0

mcuxpresso-2.13.0-mx8mn-v1.0

DART-MX8M-PLUS

Sections

Available dtbs

To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m7 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.

File Name	Description
imx8mp-var-dart-dt8customboard-m7.dtb	DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on DT8MCustomBoard 2.x
imx8mp-var-dart-dt8mcustomboard-legacy-m7.dtb	DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on on DT8MCustomBoard 1.x
imx8mp-var-som-symphony-m7.dtb	VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board
imx8mp-var-som-symphony-2nd-ov5640m7.dtb	VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board with 2nd OV5640

Default M7 pins v1

Default M7 pins used by the demos are:

Function	SoC balls	DART-MX8M-PLUS pins	DT8MCB pins	VAR-SOM-MX8M-PLUS pins	Symphony pins	Notes
UART3 RX/TX	AE6 / AJ4	J2.87 / J2.89	J12.11 / J12.13
UART4 RX/TX	AH5 / AJ5			J1.115 / J1.171	J18.9 / J18.7
GPIO3_IO14	R26			J1.79	J17.10
GPIO4_IO03	AF10	J2.59	GPLED1 on DT8MCB rev 1.x J11.20 on DT8MCB rev 2.x
I2C3 SCL/SDA	AJ7 / AJ6	J3.46 / J3.42	J12.18/ J12.20
I2C4 SCL/SDA	AF8 / AD8			J1.92 / J1.90	J16.13 / J16.15	Enabling it SPI devices will be no longer visible from Linux
PWM2	D8			J1.69	J18.2
PWM3	AE18	J3.36	J14.7
SPI1 CS0/SCK/SDI/SDO	AE20 / AF20 / AD20 / AC20	J2.79 / J2.77 / J2.81 / J2.83	J16.4/ J16.2 / J16.8 / J16.6			Enabling it SPI devices will be no longer visible from Linux
SPI2 CS0/SCK/SDI/SDO	AJ22 / AH21 / AH20 / AJ21			J1.39 / J1.43 / J1.41 / J1.45	J16.4/ J16.2 / J16.6 / J16.8	Enabling it SPI devices will be no longer visible from Linux
FLEXCAN1 RX/TX	AH15 / AJ16	j2.56 / j2.50	J13.11 / J13.5 on DT8MCB rev 1.x, TTL levels (CAN transceiver not mounted!)			Enabling it FLEXCAN1 devices will be no longer visible from Linux
			J16.9 / J16.7 on DT8MCB rev 2.x, CANL/CANH levels (CAN transceiver mounted!)
FLEXCAN2 RX/TX	AJ4 / AE6			J1.46 / J1.44	J16.18 / J16.20, CANL/CANH levels (CAN transceiver mounted!)	Enabling it FLEXCAN2 devices will be no longer visible from Linux

Available Demos

driver_examples/i2c/interrupt_b2b_transfer/slave
driver_examples/i2c/interrupt_b2b_transfer/master
driver_examples/i2c/polling_b2b_transfer/slave
driver_examples/i2c/polling_b2b_transfer/master
driver_examples/wdog
driver_examples/sdma/scatter_gather
driver_examples/sdma/memory_to_memory
driver_examples/gpio/led_output
driver_examples/pwm
driver_examples/uart/auto_baudrate_detect
driver_examples/uart/interrupt
driver_examples/uart/interrupt_rb_transfer
driver_examples/uart/polling
driver_examples/uart/interrupt_transfer
driver_examples/gpt/timer
driver_examples/gpt/capture
driver_examples/ecspi/ecspi_loopback
driver_examples/ecspi/interrupt_b2b_transfer/slave
driver_examples/ecspi/interrupt_b2b_transfer/master
driver_examples/ecspi/polling_b2b_transfer/slave
driver_examples/ecspi/polling_b2b_transfer/master
driver_examples/rdc
driver_examples/tmu/monitor_threshold
driver_examples/tmu/temperature_polling
driver_examples/sema4/uboot

rtos_examples/freertos_ecspi/ecspi_loopback
rtos_examples/freertos_hello
rtos_examples/freertos_queue
rtos_examples/freertos_sem
rtos_examples/freertos_generic
rtos_examples/freertos_uart
rtos_examples/freertos_tickless
rtos_examples/freertos_mutex
rtos_examples/freertos_event
rtos_examples/freertos_swtimer
rtos_examples/freertos_i2c
cmsis_driver_examples/i2c/int_b2b_transfer/slave
cmsis_driver_examples/i2c/int_b2b_transfer/master
cmsis_driver_examples/uart/interrupt_transfer
cmsis_driver_examples/ecspi/int_loopback_transfer
cmsis_driver_examples/ecspi/sdma_loopback_transfer
multicore_examples/rpmsg_lite_str_echo_rtos
multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
demo_apps/hello_world
driver_examples/uart/idle_detect_sdma_transfer
driver_examples/uart/sdma_transfer
cmsis_driver_examples/uart/sdma_transfer

Variscite Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.

memory type	M7 memory area	A53 memory area	memory lentgh	linker file
DDR	0x80000000-0x801FFFFF (code) 0x80200000-0x803FFFFF (data) 0x80400000-0x80FFFFFF (data2)	0x80000000-0x801FFFFF (code) 0x80200000-0x803FFFFF (data) 0x80400000-0x80FFFFFF (data2)	16MB (DDR)	MIMX8MN6xxxxx_cm7_ddr_ram.ld
TCM	0x00000000-0x0001FFFF (code) 0x20000000-0x2001FFFF (data) 0x80000000-0x80FFFFFF (data2)	0x007E0000-0x007FFFFF (code) 0x00800000-0x0081FFFF (data) 0x80000000-0x80FFFFFF (data2)	256kB (TCM) + 16MB (DDR)	MIMX8MN6xxxxx_cm7_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x80000000 - 0x80FFFFFF.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8M Plus Applications Processor Reference Manual paragraphs:

2.2 Cortex-A53 Memory Map
2.3 Cortex-M7 Memory Map

JTAG

The VAR-SOM-MX8M-PLUS exposes JTAG interface via an optional 10-pin header, on the SOM top left side.
The DART-MX8M-PLUS exports JTAG interface via an optional 10-pin header, on the DT8MCustomBoard top side.

Here is the pinout:

pin	signal	description	pin	signal	description
1	JTAG_VREF	JTAG IO reference voltage, connected to SOM_3V3_PER via 150 Ohm.	2	JTAG_TMS	JTAG Mode Select signal
3	GND	Digital Ground	4	JTAG_TCK	JTAG Clock signal, include PD of 8.2K Ohm.
5	GND	Digital Ground	6	JTAG_TDO	JTAG Data Out signal
7	GND	Digital Ground	8	JTAG_TDI	JTAG Data In signal
9	JTAG_TRST_B	JTAG Reset signal, active low signal	10	POR_B	Programmer Reset, used to put the SOC in reset state.

Please refer to SoM datasheet for further details.

Releases

mcuxpresso-2.9.0-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS

RELEASE_NAME = mcuxpresso-2.9.0-mx8mp-v1.0
RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS
MCUXPRESSO_VERSION = 2.9.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
BOARD_FOLDER = boards/dart_mx8mp
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MP
YOCTO_RELEASE_TAG = zeus-fsl-5.4.70_2.3.2-mx8mp-v1.1
SOM_CAN_SUPPORT_1GB_DDR = yes

mcuxpresso-2.10.0-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS

RELEASE_NAME = mcuxpresso-2.10.0-mx8mp-v1.0
RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS
MCUXPRESSO_VERSION = 2.10.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
BOARD_FOLDER = boards/dart_mx8mp
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MP
YOCTO_RELEASE_TAG = hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2
SOM_CAN_SUPPORT_1GB_DDR = yes

mcuxpresso-2.11.1-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS

RELEASE_NAME = mcuxpresso-2.11.1-mx8mp-v1.0
RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS
MCUXPRESSO_VERSION = 2.11.1
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
BOARD_FOLDER = boards/dart_mx8mp
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MP
YOCTO_RELEASE_TAG = hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2
SOM_CAN_SUPPORT_1GB_DDR = yes

mcuxpresso-2.12.1-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS

RELEASE_NAME = mcuxpresso-2.12.1-mx8mp-v1.0
RELEASE_LINK = MCUXPRESSO_2.12.1_V1.0_DART-MX8M-PLUS
MCUXPRESSO_VERSION = 2.12.1
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.12.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.10
BOARD_FOLDER = boards/dart_mx8mp
DOCS_FOLDER = docs
PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
NXP_REFERENCE_KIT = EVK-MIMX8MP
YOCTO_RELEASE_TAG = mx8mp-yocto-kirkstone-5.15-2.0.x-v1.0
SOM_CAN_SUPPORT_1GB_DDR = yes

mcuxpresso-2.13.0-mx8mp-v1.0

VAR-SOM-MX8X

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m4 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.

File Name	Description
imx8qxp-var-som-symphony-sd-m4.dtb	VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
imx8qxp-var-som-symphony-m4.dtb	VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)

Default M4 pins

Default M4 pins used by the demos are:

Function	Pin
debug UART (UART2)	RX: J18.5 / TX: J18.3
I2C (I2C3)	SCL: J16.10 / SDA: J16.12
M4 GPIO (M40_GPIO0_IO00)	J16.3
M4 PWM (M40_TPM0_CH0)	J16.7

Available Demos

cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
cmsis_driver_examples/lpi2c/int_b2b_transfer/master
cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
cmsis_driver_examples/lpuart/edma_transfer
cmsis_driver_examples/lpuart/interrupt_transfer
demo_apps/hello_world
driver_examples/edma/scatter_gather
driver_examples/edma/memory_to_memory
driver_examples/intmux
driver_examples/lpi2c/edma_b2b_transfer/slave
driver_examples/lpi2c/edma_b2b_transfer/master
driver_examples/lpi2c/interrupt_b2b_transfer/slave
driver_examples/lpi2c/interrupt_b2b_transfer/master
driver_examples/lpi2c/polling_b2b_transfer/slave
driver_examples/lpi2c/polling_b2b_transfer/master
driver_examples/lpi2c/read_accel_value_transfer
driver_examples/lpit
driver_examples/lpuart/edma_transfer
driver_examples/lpuart/interrupt_rb_transfer
driver_examples/lpuart/polling
driver_examples/lpuart/interrupt_transfer
driver_examples/rgpio/led_output
driver_examples/sema42/uboot
driver_examples/tpm/input_capture
driver_examples/tpm/dual_edge_capture
driver_examples/tpm/timer
driver_examples/tpm/simple_pwm
driver_examples/tpm/output_compare
driver_examples/tstmr
driver_examples/wdog32
mmcau_examples/mmcau_api
multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
multicore_examples/rpmsg_lite_str_echo_rtos
rtos_examples/freertos_hello
rtos_examples/freertos_queue
rtos_examples/freertos_sem
rtos_examples/freertos_generic
rtos_examples/freertos_tickless
rtos_examples/freertos_mutex
rtos_examples/freertos_event
rtos_examples/freertos_swtimer

Additional demos are available as reference code, but require HW/SW customization.

NXP Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type	M4 memory area	A35 memory area	memory lentgh	linker file
DDR	0x88000000-0x881FFFFF (code) 0x88200000-0x883FFFFF (data) 0x88400000-0x8FFFFFFF (data2)	0x88000000-0x881FFFFF (code) 0x88200000-0x883FFFFF (data) 0x88400000-0x8FFFFFFF (data2)	128MB (DDR)	MIMX8QX6xxxFZ_cm4_ddr_ram.ld
TCM	0x1FFE0000-0x1FFFFFFF (code) 0x20000000-0x2001FFFF (data) 0x88000000-0x8FFFFFFF (data2)	0x34FE0000-0x34FFFFFF (code) 0x35000000-0x3501FFFF (data) 0x88000000-0x8FFFFFFF (data2)	256kB (TCM) + 128MB (DDR)	MIMX8QX6xxxFZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

After launching the build_all.sh command the following folder will be created in the armgcc folder

ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8DualX/8DualXPlus/8QuadXPlus Applications Processor Reference Manual paragraphs:

2.2 System Memory Map
2.2.9 Cortex-M4 Memory Map

JTAG

The VAR-SOM-MX8X exposes JTAG interface via an optional 10-pin header

Here is the pinout:

pin	signal	description	pin	signal (ball)	description
1	JTAG_VREF	JTAG reference voltage (3.3V)	2	JTAG_TMS (AG35)	JTAG Mode Select
3	GND	Digital Ground	4	JTAG_TCK (AE31)	JTAG Clock
5	GND	Digital Ground	6	JTAG_TDO (AF32)	JTAG Data Out
7	RTCK	JTAG Return clock	8	JTAG_TDI (AH34)	JTAG Data In
9	JTAG_TRST_B_CONN	JTAG TAP reset	10	JTAG_SRST_B	JTAG System reset

Please refer to SOM datasheet for further details.

Releases

mcuxpresso-2.5.2-mx8qx-v1.0

       *HARDWARE_NAME = VAR-SOM-MX8X

SOC_HAS_SCU = true
RELEASE_NAME = mcuxpresso-2.5.2-mx8qx-v1.0
RELEASE_LINK = MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X
YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8X
MCUXPRESSO_VERSION = 2.5.2
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
BOARD_FOLDER = boards/som_mx8qx
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8X_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8X_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8X_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION
JTAG_SECTION = VAR-SOM-MX8X_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for i.MX 8QuadXPlus.pdf
NXP_REFERENCE_KIT = IMX8QXP-MEK
SCFW_SOC = = mx8qx_b0
SCFW_PATCH_URL = = ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW
SCFW_M4_PATCH = = 0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff
IMX_MKIMAGE_SOC = = iMX8QX

mcuxpresso-2.8.0-mx8qx-v1.0

     *HARDWARE_NAME = VAR-SOM-MX8X

SOC_HAS_SCU = true
RELEASE_NAME = mcuxpresso-2.8.0-mx8qx-v1.0
RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X
YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8X
MCUXPRESSO_VERSION = 2.8.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
BOARD_FOLDER = boards/som_mx8qx
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8X_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8X_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8X_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION
JTAG_SECTION = VAR-SOM-MX8X_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf
NXP_REFERENCE_KIT = IMX8QXP-MEK
SCFW_SOC = = mx8qx_b0
SCFW_PATCH_URL = = ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW
SCFW_M4_PATCH = = 0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff
IMX_MKIMAGE_SOC = = iMX8QX
SDK_GIT_TAG = som-mx8qx_mcuxpresso-2.8.0_v10
RELEASE_DATE = 02/18/2021
SUPPORTED_REV_SOM = v1.1 and higher
SUPPORTED_REV_CARRIER = v1.1 and higher
YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8x-v1.0

mcuxpresso-2.9.0-mx8qx-v1.0

     *HARDWARE_NAME = VAR-SOM-MX8X

SOC_HAS_SCU = true
RELEASE_NAME = mcuxpresso-2.9.0-mx8qx-v1.0
RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X
YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8X
MCUXPRESSO_VERSION = 2.9.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
BOARD_FOLDER = boards/som_mx8qx
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8X_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8X_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8X_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION
JTAG_SECTION = VAR-SOM-MX8X_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf
NXP_REFERENCE_KIT = IMX8QXP-MEK
SCFW_SOC = = mx8qx_b0
SCFW_PATCH_URL = = ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW
SCFW_M4_PATCH = = 0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff
IMX_MKIMAGE_SOC = = iMX8QX
SDK_GIT_TAG = som-mx8qx_mcuxpresso-2.9.0_v10
RELEASE_DATE = 03/04/2021
SUPPORTED_REV_SOM = v1.1 and higher
SUPPORTED_REV_CARRIER = v1.1 and higher
YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8x-v1.0

VAR-SOM-MX8

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m4 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.

File Name	Description
imx8qm-var-som-symphony-dp-m4.dtb	DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-som-symphony-hdmi-m4.dtb	DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-som-symphony-lvds-m4.dtb	DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-spear-sp8customboard-dp-m4.dtb	DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-spear-sp8customboard-hdmi-m4.dtb	DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-spear-sp8customboard-lvds.m4.dtb	DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-som-dp-m4.dtb	DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-som-hdmi-m4.dtb	DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-som-lvds-m4.dtb	DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-spear-dp-m4.dtb	DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-spear-hdmi-m4.dtb	DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-spear-lvds-m4.dtb	DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)

Default M4 pins

Default M4 pins used by the demos are:

Function	SoC balls	VAR-SOM-MX8 pins	Symphony pins	SPEAR-MX8 pins	SP8CustomBoard pins	Notes
M40_UART0 RX / TX	AM44 / AU51	N/A	N/A	J3.32 / J3.38	J40	SP8CustomBoard requires SW8 ON, SW9 OFF
DMA_UART2 RX / TX	BE35 / BE37	J1.175 / J1.124	J18.5 / J18.3	J1.80 / J1.82	J26.19 /J26.17
DMA_UART4 RX / TX	AR47 / AU53	J1.115 / J1.171	J18.9 / J18.7	J3.34 / J3.29	J20.2 / J20.4	SPEAR-MX8 demos do not refer it
FLEXCAN0 RX/TX	C5 / H6	J1.46 / J1.44	J16.18 / J16.20	J4.79 / J4.80	J26.1 / J26.3
M41_I2C0 SCL/SDA	AR45 / AU49	N/A	N/A	J1.9 / J3.36	J20.18 / J20.20
DMA_I2C0 SCL/SDA	BN9 / BN7	J1.174 / J1.176	J16.10 / J16.12	J2.88 / J1.90	J26.2 / J26.4
DMA_SPI0 CS0 / SCK / SDI / SDO	BC1 / BB4 / BA5 / AY6	J1.79 / J1.75 / J1.77 / J1.70	J17.10 / J17.6 / J17.8 / J17.4	J2.78 / j2.74 / J2.72 / J2.76	J20.7 / J20.1 / J20.5 / J20.3
ADC_IN6	AL9	J1.39	J16.4	J4.62	J29.16	VAR-SOM-MX8 requires enabling a buffer (refer to the datasheet)
M40_TPM0 0 / 1	AR47 / AU53	J1.115 / J1.171	J18.9 / J18.7	J3.34 / J3.29	J20.2 / J20.4	pins are share with with DMA_UART4
GPIO3_IO06	BA3	J1.40	J17.2	J2.80	J20.9

Available Demos

cmsis_driver_examples/lpi2c/int_b2b_transfer/master
cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
cmsis_driver_examples/lpuart/edma_transfer
cmsis_driver_examples/lpuart/interrupt_transfer
cmsis_driver_examples/lpspi/edma_b2b_transfer/master
cmsis_driver_examples/lpspi/edma_b2b_transfer/slave
cmsis_driver_examples/lpspi/int_b2b_transfer/master
cmsis_driver_examples/lpspi/int_b2b_transfer/slave
demo_apps/hello_world
driver_examples/canfd/loopback_transfer
driver_examples/canfd/loopback
driver_examples/canfd/interrupt_transfer
driver_examples/edma/scatter_gather
driver_examples/edma/memory_to_memory
driver_examples/flexcan/loopback_edma_transfer
driver_examples/flexcan/loopback_transfer
driver_examples/flexcan/loopback
driver_examples/flexcan/interrupt_transfer
driver_examples/intmux
driver_examples/lpadc/interrupt
driver_examples/lpadc/polling
driver_examples/lpi2c/edma_b2b_transfer/slave
driver_examples/lpi2c/edma_b2b_transfer/master
driver_examples/lpi2c/interrupt_b2b_transfer/slave
driver_examples/lpi2c/interrupt_b2b_transfer/master
driver_examples/lpi2c/polling_b2b_transfer/slave
driver_examples/lpi2c/polling_b2b_transfer/master
driver_examples/lpi2c/read_accel_value_transfer
driver_examples/lpspi/edma_b2b_transfer/master
driver_examples/lpspi/edma_b2b_transfer/slave
driver_examples/lpspi/interrupt_b2b/master
driver_examples/lpspi/interrupt_b2b/slave
driver_examples/lpspi/interrupt_b2b_transfer/master
driver_examples/lpspi/interrupt_b2b_transfer/slave
driver_examples/lpspi/polling_b2b_transfer/master
driver_examples/lpspi/polling_b2b_transfer/slave
driver_examples/lpspi/polling_b2b_transfer/master
driver_examples/lpspi/polling_b2b_transfer/slave
driver_examples/lpit
driver_examples/lpuart/edma_transfer
driver_examples/lpuart/interrupt_rb_transfer
driver_examples/lpuart/polling
driver_examples/lpuart/interrupt_transfer
driver_examples/lpuart/interrupt
driver_examples/gpio/led_output
driver_examples/rgpio/led_output
driver_examples/sema42/uboot
driver_examples/sema42/dual_core
driver_examples/tpm/timer
driver_examples/tpm/simple_pwm
driver_examples/tpm/pwm_twochannel
driver_examples/tpm/output_compare
driver_examples/tpm/input_capture
driver_examples/tpm/dual_edge_capture
driver_examples/tpm/combine_pwm
driver_examples/tstmr
driver_examples/wdog32
mmcau_examples/mmcau_api
multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
multicore_examples/rpmsg_lite_str_echo_rtos
multicore_examples/rpmsg_lite_pingpong_rtos/sdk_remote
multicore_examples/rpmsg_lite_pingpong_rtos/sdk_master
rtos_examples/freertos_hello
rtos_examples/freertos_queue
rtos_examples/freertos_sem
rtos_examples/freertos_generic
rtos_examples/freertos_tickless
rtos_examples/freertos_mutex
rtos_examples/freertos_lpuart
rtos_examples/freertos_event
rtos_examples/freertos_swtimer
rtos_examples/freertos_lpi2c
rtos_examples/freertos_lpspi_b2b/master
rtos_examples/freertos_lpspi_b2b/slave
rtos_examples/freertos_lpspi

Additional demos are available as reference code, but require HW/SW customization.

NXP Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type	M4 if	M4 memory area	memory lentgh	linker file
DDR	0	0x88000000-0x881FFFFF (code) 0x88200000-0x883FFFFF (data) 0x88400000-0x887FFFFF (data2)	8MB (DDR)	MIMX8QM6xxxFF_cm4_core0_ddr_ram.ld
DDR	1	0x88800000-0x88BFFFFF (code) 0x88C00000-0x88FFFFFF (data) 0x89000000-0x8FFFFFFF (data2)	120MB (DDR)	MIMX8QM6xxxFF_cm4_core1_ddr_ram.ld
TCM	0	0x1FFE0000-0x1FFFFFFF (code) 0x20000000-0x2001FFFF (data) 0x88000000-0x887FFFFF (data2)	256kB (TCM) + 8MB (DDR)	MIMX8QM6xxxFF_cm4_core0_ram.ld
TCM	1	0x1FFE0000-0x1FFFFFFF (code) 0x20000000-0x2001FFFF (data) 0x88800000-0x8FFFFFFF (data2)	256kB (TCM) + 120MB (DDR)	MIMX8QM6xxxFF_cm4_core1_ram.ld

All linker files are locate in the armgcc folder of each demo.

After launching the build_all.sh command the following folder will be created in the armgcc folder

ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
release: containing TCM binaries compiled in release mode (stripped: no symbols available)

JTAG

The VAR-SOM-MX8 and SPEAR-MX8 exposes JTAG interface via an optional 10-pin header

Here is the pinout:

pin	signal	description	pin	signal (ball)	description
1	JTAG_VREF	JTAG reference voltage (3.3V)	2	JTAG_TMS (AG35)	JTAG Mode Select
3	GND	Digital Ground	4	JTAG_TCK (AE31)	JTAG Clock
5	GND	Digital Ground	6	JTAG_TDO (AF32)	JTAG Data Out
7	RTCK	JTAG Return clock	8	JTAG_TDI (AH34)	JTAG Data In
9	JTAG_TRST_B_CONN	JTAG TAP reset	10	JTAG_SRST_B	JTAG System reset

Please refer to SOM datasheet for further details.

Releases

mcuxpresso-2.5.2-mx8qm-v1.0

      *HARDWARE_NAME = VAR-SOM-MX8

SOC_HAS_SCU = true
SOC_HAS_M40_M41 = true
RELEASE_NAME = mcuxpresso-2.5.2-mx8qm-v1.0
RELEASE_LINK = MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8
YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8
MCUXPRESSO_VERSION = 2.5.2
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
BOARD_FOLDER = boards/som_mx8qm
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION
JTAG_SECTION = VAR-SOM-MX8_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for i.MX 8QuadMax.pdf
NXP_REFERENCE_KIT = IMX8QM-MEK
SCFW_SOC = = mx8qm_b0
SCFW_DEFINES_URL = = https://github.com/varigit/imx-sc-firmware/blob/1.2.8/src/scfw_export_mx8qm_b0/platform/board/mx8qm_var_som/board.c#L79
IMX_MKIMAGE_SOC = = iMX8QM

mcuxpresso-2.8.0-mx8qm-v1.0

    *HARDWARE_NAME = VAR-SOM-MX8

SOC_HAS_SCU = true
SOC_HAS_M40_M41 = true
RELEASE_NAME = mcuxpresso-2.8.0-mx8qm-v1.0
RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8
YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8
MCUXPRESSO_VERSION = 2.8.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
BOARD_FOLDER = boards/som_mx8qm
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION
JTAG_SECTION = VAR-SOM-MX8_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for MEK-MIMX8QM.pdf
NXP_REFERENCE_KIT = IMX8QM-MEK
SCFW_SOC = = mx8qm_b0
SCFW_DEFINES_URL = = https://github.com/varigit/imx-sc-firmware/blob/1.2.8/src/scfw_export_mx8qm_b0/platform/board/mx8qm_var_som/board.c#L79
IMX_MKIMAGE_SOC = = iMX8QM
SDK_GIT_TAG = som-mx8qm_mcuxpresso-2.8.0_v10
RELEASE_DATE = 02/19/2021
SUPPORTED_REV_SOM = v1.1 and higher
SUPPORTED_REV_CARRIER = v1.1 and higher
YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8-v1.1

mcuxpresso-2.9.0-mx8qm-v1.0

    *HARDWARE_NAME = VAR-SOM-MX8

SOC_HAS_SCU = true
SOC_HAS_M40_M41 = true
RELEASE_NAME = mcuxpresso-2.9.0-mx8qm-v1.0
RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8
YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8
MCUXPRESSO_VERSION = 2.9.0
SDK_PATH = ~/var-mcuxpresso
SDK_GIT_URL = https://github.com/varigit/freertos-variscite
SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
BOARD_FOLDER = boards/som_mx8qm
DOCS_FOLDER = docs
PINS_SECTION = VAR-SOM-MX8_PINS_SECTION
DEMOS_SECTION = VAR-SOM-MX8_DEMOS_SECTION
DTBS_SECTION = VAR-SOM-MX8_DTBS_SECTION
MEMORY_TYPES_SECTION = VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION
JTAG_SECTION = VAR-SOM-MX8_JTAG_SECTION
NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for MEK-MIMX8QM.pdf
NXP_REFERENCE_KIT = IMX8QM-MEK
SCFW_SOC = = mx8qm_b0
SCFW_DEFINES_URL = = https://github.com/varigit/imx-sc-firmware/blob/1.2.8/src/scfw_export_mx8qm_b0/platform/board/mx8qm_var_som/board.c#L79
IMX_MKIMAGE_SOC = = iMX8QM
SDK_GIT_TAG = som-mx8qm_mcuxpresso-2.9.0_v10
RELEASE_DATE = 03/15/2021
SUPPORTED_REV_SOM = v1.1 and higher
SUPPORTED_REV_CARRIER = v1.1 and higher
YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8-v1.1

~/var-mcuxpresso/freertos-variscite/devices/MIMX8QM6

VAR-SOM-MX93

Sections

Available dtbs

To allow the Cortex-M33 to access shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, by selecting the right version with the symbolic link in the /boot folder of the booting media.
These device trees contain m33 label in their name.

The below table lists an example dtb blob file name for VAR-SOM-MX93 (on the Symphony Board) with support for the M33 for each kernel version / Yocto release:

File Name	Description
imx93-var-som-symphony-m33.dtb	VAR-SOM-MX93 device tree blob for kernel = 6.1.1 (Yocto Langdale) on Symphony-Board 1.4a and above.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the Cortex-A55 processors and Cortex-M33.

For the full list of device tree blob files, refer to the "Build Results" section in the appropriate wiki page for the specific Yocto/Debian release you are using.

Default M33 pins

Default M33 pins used by the demos are:

Function	SoC balls	VAR-SOM-MX8 Pins	Symphony Pins	Notes
UART7 RX/TX	M21 / M20	J1.175 / J1.124	J18.5 / J18.3
TPM6-CH3 - PWM Output or Input Capture	W21	J1.69	J18.2
CAN1 RX/TX	J17 / G17	J1.46 / J1.44	J16.18 / J16.20, CANL/CANH levels (CAN transceiver mounted!)	If enabled, CAN devices will no longer visible from Linux

Available Demos

demo_apps/ethosu_apps_rpmsg
demo_apps/hello_world
driver_examples/canfd/loopback
driver_examples/canfd/loopback_transfer
driver_examples/edma/memory_to_memory
driver_examples/edma/scatter_gather
driver_examples/edma4/channel_link
driver_examples/edma4/interleave_transfer
driver_examples/edma4/memory_to_memory
driver_examples/edma4/memory_to_memory_transfer
driver_examples/edma4/memset
driver_examples/edma4/ping_pong_transfer
driver_examples/edma4/scatter_gather
driver_examples/edma4/wrap_transfer
driver_examples/flexcan/loopback
driver_examples/flexcan/loopback_edma_transfer
driver_examples/flexcan/loopback_transfer
driver_examples/lpit/chained_channel
driver_examples/lpit/single_channel
driver_examples/lptmr
driver_examples/lpuart/interrupt
driver_examples/lpuart/interrupt_rb_transfer
driver_examples/lpuart/interrupt_transfer
driver_examples/lpuart/polling
driver_examples/tpm/input_capture
driver_examples/tpm/output_compare
driver_examples/tpm/simple_pwm
driver_examples/tpm/timer
driver_examples/tstmr
multicore_examples/rpmsg_lite_pingpong_rtos
multicore_examples/rpmsg_lite_str_echo_rtos
rtos_examples/freertos_event
rtos_examples/freertos_generic
rtos_examples/freertos_hello
rtos_examples/freertos_mutex
rtos_examples/freertos_queue
rtos_examples/freertos_sem
rtos_examples/freertos_swtimer

Additional demos may be provided on this platform in a future release.

Running a demo

Running a demo from U-Boot

To assist in loading M33 firmware from U-Boot prior to Linux boot, Variscite has created a dedicated set of U-Boot environment commands.

To allow Cortex-M accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded.

To enable Cortex-M U-Boot auto-loading:

=> setenv use_m33 yes; saveenv

To disable Cortex-M U-Boot auto-loading:

=> setenv use_m33 no; saveenv

Note that the Cortex A55s and M33 have a different memory addressing "world view." Additionally, the bootaux command for the M33 uses secure aliases from the M33's point of view. Thus, two variables must be set properly in order to set the loading address (defaults used in the example below):

=> setenv m33_addr 0x201E0000
=> setenv m33_addr_auxview 0x1FFE0000
=> saveenv

To set the name of the Cortex-M binary

=> setenv m33_bin cm_hello_world.bin; saveenv

The .bin file is expected in the folder /boot of the booting media.

After enabling as above, the U-Boot boot command will handle loading the Cortex-M firmware when the system begins the boot process. For testing, it is possible to invoke the Cortex-M33 boot process manually:

=> run loadm33bin && run runm33bin

Additional details and step by step procedure to run each of the demos is available online or in the following document:

~/var-mcuxpresso/freertos-variscite/docs/Getting Started with MCUXpresso SDK for MEK-MIMX8QM.pdf

This process can be simplified using /etc/remoteproc/variscite-rproc-u-boot in Linux
Please refer to the Yocto Scripts section below for more information

Running a demo from Linux

The Linux remoteproc framework can be used to load the Cortex-M33 firmware from Linux userspace.

Increase kernel loglevel while debugging:

# sysctl kernel.printk=7;

Check the state of the Cortex-M33 it should be running already by U-Boot

# cat /sys/class/remoteproc/remoteproc0/state

If the state is 'running', stop the Cortex-M33

# echo stop > /sys/class/remoteproc/remoteproc0/state

Load new firmware (.elf file must already exist in /lib/firmware directory)

# echo cm_hello_world.elf > /sys/class/remoteproc/remoteproc0/firmware

Run the new firmware

# echo start > /sys/class/remoteproc/remoteproc0/state

This process can be simplified using /etc/remoteproc/variscite-rproc-linux in Linux
Please refer to the Yocto Scripts section below for more information

NXP Memory types

The SDK currently allows linking only out of TCM.

Below is a short summary of memory areas used by Cortex-M33 as described in related linker file:

Memory Type	M33 Memory Area	A55 Memory Area	Memory Length	Linker File
TCM	0x0FFE0000 - 0x0FFFFFFF (code) 0x20000000 – 0x2001FFFF (data)	0x201E0000 – 0x201FFFFF (code) 0x20200000 – 0x2021FFFF (data)	128kB (Code TCM) + 128kB (System TCM)	MIMX9352_cm33_ram.ld

All linker files are located in the armgcc folder of each demo. Please consult the linker file for the actual memory used by each demo.

After launching the build_all.sh command the following folder will be created in the armgcc folder

debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
release: containing TCM binaries compiled in release mode (stripped: no symbols available)

JTAG

The JTAG interface is not exposed directly on the VAR-SOM-MX93 but the associated signals are exposed via the J1 SOM connector.

Note: These signals are shared with the Wi-Fi module if present, so usage will require disabling this interface and making any appropriate pin muxing adjustments.

Please refer to SoM datasheet for further details.

Releases

mcuxpresso-2.13.1-mx93-v1.0

mcuxpresso-2.13.1-mx93-v1.1

mcuxpresso-2.15.0-mx93-v1.0

mcuxpresso-2.15.0-mx93-v1.1

Release Notes

RN_MCUXPRESSO_2.13.1_V1.0_VAR-SOM-MX93

|- | Release 1.0 || |- | Initial release || MCUXPRESSO 2.13.1 release for the Cortex-M33 core on the VAR-SOM-MX93 |- | Examples provided and tested on many peripherals: || - CAN
- EDMA
- LPUART
- TPM/PWM
- TSTMR

See developers guide for a full list of available demos. |-

RN_MCUXPRESSO_2.13.1_V1.1_VAR-SOM-MX93

|- | Release 1.1 || |- | Several additional examples provided for many peripherals: || - CAN (board to board examples)
- LPSPI
- LPI2C
- GPIO

See developers guide for a full list of available demos. |-

RN_MCUXPRESSO_2.15.0_V1.0_VAR-SOM-MX93

|- | Release 1.0 || |- | Initial release || MCUXPRESSO 2.15.0 release for the Cortex-M33 core on the VAR-SOM-MX93 |- style="vertical-align:top;" | Examples provided and tested on many peripherals: || - CAN (board to board examples)
- LPSPI
- EDMA
- LPI2C
- LPUART
- GPIO
- TPM/PWM
- TSTMR

See developers guide for a full list of available demos.
Click here for a full detailed change list. |-

RN_MCUXPRESSO_2.15.0_V1.1_VAR-SOM-MX93

|- | Release 1.1 || |- style="vertical-align:top;" | Add initial support for DART-MX93 || MCUXPRESSO 2.15.0 release for the Cortex-M33 core on the DART-MX93 - CAN (board to board examples)
- LPSPI
- EDMA
- LPI2C
- LPUART
- GPIO
- TPM/PWM
- TSTMR

See developers guide for a full list of available demos.
Click here for a full detailed change list. |- | Update macros and readme files for the VAR-SOM-MX93 release || See 8deddc3fc...78afa00fe |- | Known Issues || |- | driver_examples/rgpio/led_output demo does not work properly on U-boot on the DART-MX93 || When running on U-boot, it stops working right after Linux finishes booting |-

MCUXpresso Platform Customization

DART-MX8M

Sections

Available dtbs

Default M4 pins

Available Demos

NXP Memory types

Variscite Memory types

JTAG

Releases

mcuxpresso-2.5.1-mx8mq-v1.0

mcuxpresso-2.5.1-mx8mq-v1.1

mcuxpresso-2.8.0-mx8mq-v1.0

mcuxpresso-2.9.0-mx8mq-v1.0

mcuxpresso-2.10.0-mx8mq-v1.0

mcuxpresso-2.11.1-mx8mq-v1.0

mcuxpresso-2.12.1-mx8mq-v1.0

mcuxpresso-2.13.0-mx8mq-v1.0

DART-MX8M-MINI

Sections

Available dtbs

Default M4 pins

Default M4 pins v2

Available Demos

Variscite Memory types

Releases

freertos-1.0.1-mx7-v1.0

mcuxpresso-2.5.0-mx8mm-v1.0

mcuxpresso-2.5.0-mx8mm-v1.1

mcuxpresso-2.8.0-mx8mm-v1.0

mcuxpresso-2.9.0-mx8mm-v1.0

mcuxpresso-2.10.0-mx8mm-v1.0

mcuxpresso-2.11.1-mx8mm-v1.0

mcuxpresso-2.12.1-mx8mm-v1.0

mcuxpresso-2.13.0-mx8mm-v1.0

VAR-SOM-MX8M-NANO

Sections

Available dtbs

Default M7 pins

Available Demos

Memory types

JTAG

Releases

mcuxpresso-2.7.0-mx8mn-v1.0

mcuxpresso-2.8.0-mx8mn-v1.0

mcuxpresso-2.9.0-mx8mn-v1.0

mcuxpresso-2.10.0-mx8mn-v1.0

mcuxpresso-2.11.1-mx8mn-v1.0

mcuxpresso-2.12.1-mx8mn-v1.0

mcuxpresso-2.13.0-mx8mn-v1.0

DART-MX8M-PLUS

Sections

Available dtbs

Default M7 pins v1

Available Demos

Variscite Memory types

JTAG

Releases

mcuxpresso-2.9.0-mx8mp-v1.0

mcuxpresso-2.10.0-mx8mp-v1.0

mcuxpresso-2.11.1-mx8mp-v1.0

mcuxpresso-2.12.1-mx8mp-v1.0

mcuxpresso-2.13.0-mx8mp-v1.0

VAR-SOM-MX8X

Sections

Available dtbs

Default M4 pins

Available Demos

NXP Memory types

JTAG

Releases

mcuxpresso-2.5.2-mx8qx-v1.0

mcuxpresso-2.8.0-mx8qx-v1.0

mcuxpresso-2.9.0-mx8qx-v1.0

VAR-SOM-MX8

Sections

Available dtbs

Default M4 pins

Available Demos

NXP Memory types