DART-MX8M UART

From Variscite Wiki
Revision as of 23:05, 19 January 2023 by Nate (talk | contribs)
Warning: This page is designed to be used with a 'release' URL parameter.

This page is using the default release RELEASE_SUMO_V1.0_DART-MX8M.
To view this page for a specific Variscite SoM and software release, please follow these steps:

  1. Visit variwiki.com
  2. Select your SoM
  3. Select the software release
DART-MX8M UART

UART Overview

On DART-MX8M all 4 UARTs are enabled by default.
UART1 is connected to debug console.
UART2 and UART3 are connected to J12 header on VAR-DT8MCustomBoard.
UART4 is connected to Bluetooth module.
On DART-MX8M SoMs without WIFI/BT module UART4 is also connected to J12 header.
See the carrier board datasheet for the exact pinout.
Only UART4 has RTS and CTS lines.


UART naming under Linux

The Linux devices corresponding to UART1 - UART4 are /dev/ttymxc0 - /dev/ttymxc3 respectively.

Testing UART2 on DART-MX8M

Short J12.4 and J12.6 pins and run the following commands:

stty -F /dev/ttymxc1 -echo -onlcr 115200
cat /dev/ttymxc1 &
echo hello > /dev/ttymxc1

For each time you run this echo command the "hello" string should appear on the terminal.

Testing UART3 on DART-MX8M

Short J12.11 and J12.13 pins and run the following commands:

stty -F /dev/ttymxc2 -echo -onlcr 115200
cat /dev/ttymxc2 &
echo hello > /dev/ttymxc2

For each invocation of echo command the "hello" string should appear on the terminal.


Disabling UART2

To disable UART2 on DART-MX8M edit arch/arm64/boot/dts/freescale/fsl-imx8mq-var-dart-common.dtsi under kernel source directory and modify

&uart2 {
        ...
        status = "okay";
};

to

&uart2 {
        ...
        status = "disabled";
};

Other UARTs can be disabled in the same manner.


Configuring RS485 Half-Duplex

Each UART can be configured for RS485 Half-Duplex mode by using a GPIO pin to drive the receive and transmit enable inputs. This can be configured in the device tree by making the following changes to the uart node and replacing X, Y & Z with the proper values:

&uartX {                                                          /* Add RS485 properties to uartX */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uartX>, <&pinctrl_uartX_rs485>;     /* Add RS485 GPIO pinctrl */
	rts-gpios = <&gpioY Z GPIO_ACTIVE_LOW>;                   /* Add rts-gpios property */
	linux,rs485-enabled-at-boot-time;                         /* Enable RS485 at boot time to skip using TIOCSRS485 ioctl */
	status = "okay";
};

Next, configure the RS485 GPIO pin by adding pinctrl_uartX_rs485 to iomuxc. Replace X, GPIO_PIN_FUNCTION, and GPIO_PIN_SETTINGS with the proper values:

&iomuxc {
	pinctrl_uartX_rs485: uartXrs485 {
		fsl,pins = <
			GPIO_PIN_FUNCTION  GPIO_PIN_SETTINGS
		>;
	};
};

Note: For more information about configuring pins, please see i.MX Device Tree Pinmux Settings Guide


After making these changes, RS485 mode will be enabled by default and can be verified from the console by running the commands below. Replace N with the proper value, which is typically X-1 relative to the device tree node uartX:

# stty -F /dev/ttymxcN -echo -onlcr 115200
# echo hello > /dev/ttymxcN

The below logic analyzer capture shows the RS485 RX/TX enable line toggling when writing to the UART:

Rs485.png


Please refer to the Linux device tree bindings for more RS485 configuration options.