VAR-SOM-MX8M-MINI-Rev10

VAR-SOM-MX8M-MINI/NANO Revision 1.0 Support

This tutorial shows how to adjust kernel DTS files for VAR-SOM-MX8M-MINI/NANO Revision 1.0. This old SOM revision is not officially supported in recent Yocto versions.

On Symphony-Board 1.4a and above

Apply the following patch to imx8mm-var-som-symphony.dts:

--- arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts   2020-12-30 23:16:31.021169623 +0200
+++ arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony-rev10.dts     2021-01-10 09:16:31.586865372 +0200
@@ -214,7 +214,7 @@
 
        pinctrl_usdhc2_gpio: usdhc2grpgpio {
                fsl,pins = <
-                       MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10              0xc1
+                       MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12                0xc1
                >;
        };
 
@@ -487,7 +487,7 @@
        pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
        pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
        pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
-       cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+       cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
        bus-width = <4>;
        vmmc-supply = <&reg_usdhc2_vmmc>;
        status = "okay";

On Symphony-Board 1.4 and below

Apply the following patch to imx8mm-var-som-symphony-legacy.dts:

--- arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony-legacy.dts    2020-12-30 23:28:09.881966875 +0200
+++ arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony-legacy-rev10.dts      2021-01-10 09:22:13.465180492 +0200
@@ -10,7 +10,21 @@
        model = "Variscite VAR-SOM-MX8M-MINI on Symphony-Board 1.4 and below";
 };
 
-&usbotg1 {
-       /delete-property/ extcon;
+&iomuxc {
+       pinctrl_usdhc2_gpio: usdhc2grpgpio {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12        0xc1
+               >;
+       };
+
+       pinctrl_extcon: extcongrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10      0x16
+               >;
+       };
+};
+
+&usdhc2 {
+       cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
 };