MCUXpresso Platform Customization

DART-MX8M

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, by selecting the right version with the symbolic link in the /boot folder of the booting media.

These device trees contain m4 label in their name.

File Name	Description
Image.gz-fsl-imx8mq-var-dart-m4-emmc-wifi-hdmi.dtb	Device tree blob for eMMC, WIFI and HDMI display configuration. SD card disabled.
Image.gz-fsl-imx8mq-var-dart-m4-emmc-wifi-lvds.dtb	Device tree blob for eMMC, WIFI and LVDS display configuration. SD card disabled.
Image.gz-fsl-imx8mq-var-dart-m4-emmc-wifi-dual-display.dtb	Device tree blob for eMMC, WIFI and dual LVDS+HDMI display configuration. SD card disabled.
Image.gz-fsl-imx8mq-var-dart-m4-sd-emmc-hdmi.dtb	Device tree blob for SD, eMMC and HDMI display configuration. WIFI disabled.
Image.gz-fsl-imx8mq-var-dart-m4-sd-emmc-lvds.dtb	Device tree blob for SD, eMMC and LCDIF LVDS display configuration. WIFI disabled.
Image.gz-fsl-imx8mq-var-dart-m4-sd-emmc-dual-display.dtb	Device tree blob for SD, eMMC and dual LVDS+HDMI display configuration. WIFI disabled.

Default M4 pins

Default M4 pins used by the demos are:

function	pin
debug UART (UART2)	RX: J12.6 / TX: J12.4
GPIO (GPIO4_IO03)	LED7
I2C (I2C3)	SCL: J12.18 / SDA: J12.20
PWM (PWM2)	J14.3

Available Demos

• driver_examples/i2c/interrupt_b2b_transfer/slave
• driver_examples/i2c/interrupt_b2b_transfer/master
• driver_examples/i2c/polling_b2b_transfer/slave
• driver_examples/i2c/polling_b2b_transfer/master
• driver_examples/wdog
• driver_examples/gpio/led_output
• driver_examples/tmu/tmu_monitor_report
• driver_examples/pwm
• driver_examples/uart/auto_baudrate_detect
• driver_examples/uart/interrupt
• driver_examples/uart/interrupt_rb_transfer
• driver_examples/uart/polling
• driver_examples/uart/interrupt_transfer
• driver_examples/gpt/timer
• driver_examples/gpt/capture
• driver_examples/ecspi/ecspi_loopback
• driver_examples/qspi/polling_transfer
• driver_examples/rdc
• driver_examples/sema4/uboot
• rtos_examples/freertos_ecspi/ecspi_loopback
• rtos_examples/freertos_hello
• rtos_examples/freertos_queue
• rtos_examples/freertos_sem
• rtos_examples/freertos_generic
• rtos_examples/freertos_uart
• rtos_examples/freertos_tickless
• rtos_examples/freertos_mutex
• rtos_examples/freertos_event
• rtos_examples/freertos_swtimer
• rtos_examples/freertos_i2c
• cmsis_driver_examples/i2c/int_b2b_transfer/slave
• cmsis_driver_examples/i2c/int_b2b_transfer/master
• cmsis_driver_examples/uart/interrupt_transfer
• cmsis_driver_examples/ecspi/int_loopback_transfer
• multicore_examples/rpmsg_lite_str_echo_rtos
• multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
• demo_apps/hello_world

NXP Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type	M4 memory area	A53 memory area	memory lentgh	linker file
DDR	0x80000000-0x801FFFFF (code) 0x80200000-0x803FFFFF (data) 0x80400000-0x80FFFFFF (data2)	0x80000000-0x801FFFFF (code) 0x80200000-0x803FFFFF (data) 0x80400000-0x80FFFFFF (data2)	16MB (DDR)	MIMX8MQ6xxxJZ_cm4_ddr_ram.ld
TCM	0x1FFE0000-0x1FFFFFFF (code) 0x20000000-0x2001FFFF (data) 0x80000000-0x80FFFFFF (data2)	0x007E0000-0x007FFFFF (code) 0x00800000-0x0081FFFF (data) 0x80000000-0x80FFFFFF (data2)	256kB (TCM) + 16MB (DDR)	MIMX8MQ6xxxJZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must much the one declared in the kernel device tree: at least 2 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x80000000 - 0x80FFFFFF.

The RPMSG area is located at 0xB8000000: at least 3 GB of RAM is required on the SoM to allow Cortex-M4 accessing the RPMSG area. After launching the build_all.sh command the following folder will be created in the armgcc folder

• ddr_debug: containing DDR binaries compiled in debug mode (stripped: no symbols available)
• ddr_release: containing DDR binaries compiled in release mode (not stripped: symbols available)
• debug: containing TCM binaries compiled in debug mode (stripped: no symbols available)
• release: containing TCM binaries compiled in release mode (not stripped: symbols available)

Further details about memory mapping are available in i.MX 8M Applications Processors Reference Manual paragraphs:

• 2.1.2 Cortex-A53 Memory Map
• 2.1.3 Cortex-M4 Memory Map

Variscite Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type	M4 memory area	A53 memory area	memory lentgh	linker file
DDR	0x7E000000-0x7E1FFFFF (code) 0x7E200000-0x7E3FFFFF (data) 0x7E400000-0x7EFFFFFF (data2)	0x7E000000-0x7E1FFFFF (code) 0x7E200000-0x7E3FFFFF (data) 0x7E400000-0x7EFFFFFF (data2)	16MB (DDR)	MIMX8MQ6xxxJZ_cm4_ddr_ram.ld
TCM	0x1FFE0000-0x1FFFFFFF (code) 0x20000000-0x2001FFFF (data) 0x7E000000-0x7EFFFFFF (data2)	0x007E0000-0x007FFFFF (code) 0x00800000-0x0081FFFF (data) 0x7E000000-0x7EFFFFFF (data2)	256kB (TCM) + 16MB (DDR)	MIMX8MQ6xxxJZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M4 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M4.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M4 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

• ddr_debug: containing DDR binaries compiled in debug mode (stripped: no symbols available)
• ddr_release: containing DDR binaries compiled in release mode (not stripped: symbols available)
• debug: containing TCM binaries compiled in debug mode (stripped: no symbols available)
• release: containing TCM binaries compiled in release mode (not stripped: symbols available)

Further details about memory mapping are available in i.MX 8M Applications Processors Reference Manual paragraphs:

• 2.1.2 Cortex-A53 Memory Map
• 2.1.3 Cortex-M4 Memory Map

JTAG

The VAR-DT8MCustomBoard exports the DART-MX8M JTAG signals through J29, a standard 1.27" 10 pin header.

Here the pinout

pin	signal	description	pin	signal	description
1	JTAG_VREF	JTAG IO reference voltage, connects to SOM_NVCC_3V3.	2	JTAG_TMS	JTAG Mode Select signal
3	GND	Digital Ground	4	JTAG_TCK	JTAG Clock signal, requires 10K pull down.
5	GND	Digital Ground	6	JTAG_TDO	JTAG Data Out signal
7	GND	Digital Ground	8	JTAG_TDI	JTAG Data In signal
9	JTAG_NTRST_C	JTAG Reset signal	10	NRST_CON	Programmer Reset, used to put the SOC in reset state.

Please refer to board schematics for further details.

Releases

mcuxpresso-2.5.1-mx8mq-v1.0

• HARDWARE_NAME = DART-MX8M
• RELEASE_NAME = mcuxpresso-2.5.1-mx8mq-v1.0
• RELEASE_LINK = MCUXPRESSO_2.5.1_V1.0_DART-MX8M
• MCUXPRESSO_VERSION = 2.5.1
• SDK_PATH = ~/var-mcuxpresso
• SDK_GIT_URL = https://github.com/varigit/freertos-variscite
• SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
• TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
• TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
• TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
• BOARD_FOLDER = boards/dart_mx8mq
• DOCS_FOLDER = docs
• PINS_SECTION = DART-MX8M_PINS_SECTION
• DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
• DTBS_SECTION = DART-MX8M_DTBS_SECTION
• MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_NXP_SECTION
• JTAG_SECTION = DART-MX8M_JTAG_SECTION
• NXP_USER_GUIDE = Getting Started with MCUXpresso SDK i.MX 8M Devices.pdf
• NXP_REFERENCE_KIT = EVK-MIMX8MQ

mcuxpresso-2.5.1-mx8mq-v1.1

• HARDWARE_NAME = DART-MX8M
• RELEASE_NAME = mcuxpresso-2.5.1-mx8mq-v1.1
• RELEASE_LINK = MCUXPRESSO_2.5.1_V1.1_DART-MX8M
• MCUXPRESSO_VERSION = 2.5.1
• SDK_PATH = ~/var-mcuxpresso
• SDK_GIT_URL = https://github.com/varigit/freertos-variscite
• SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
• TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
• TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
• TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
• BOARD_FOLDER = boards/dart_mx8mq
• DOCS_FOLDER = docs
• PINS_SECTION = DART-MX8M_PINS_SECTION
• DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
• DTBS_SECTION = DART-MX8M_DTBS_SECTION
• MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
• JTAG_SECTION = DART-MX8M_JTAG_SECTION
• NXP_USER_GUIDE = Getting Started with MCUXpresso SDK i.MX 8M Devices.pdf
• NXP_REFERENCE_KIT = EVK-MIMX8MQ

DART-MX8M-MINI

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m4 label in the name, using the fdt_file environment variable in uboot.

fsl-imx8mm-var-dart-m4.dtb

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.

Default M4 pins

Default M4 pins used by the demos are:

function	pin
debug UART (UART2)	RX: J12.6 / TX: J12.4
GPIO (GPIO4_IO03)	LED7
I2C (I2C4)	SCL: J12.17 / SDA: J12.19
PWM (PWM2)	J14.3

Available Demos

• driver_examples/i2c/interrupt_b2b_transfer/slave
• driver_examples/i2c/interrupt_b2b_transfer/master
• driver_examples/i2c/polling_b2b_transfer/slave
• driver_examples/i2c/polling_b2b_transfer/master
• driver_examples/wdog
• driver_examples/sdma/scatter_gather
• driver_examples/sdma/memory_to_memory
• driver_examples/gpio/led_output
• driver_examples/pwm
• driver_examples/uart/auto_baudrate_detect
• driver_examples/uart/interrupt
• driver_examples/uart/idle_detect_sdma_transfer
• driver_examples/uart/interrupt_rb_transfer
• driver_examples/uart/sdma_transfer
• driver_examples/uart/polling
• driver_examples/uart/interrupt_transfer
• driver_examples/gpt/timer
• driver_examples/gpt/capture
• driver_examples/ecspi/ecspi_loopback
• driver_examples/ecspi/interrupt_b2b_transfer/slave
• driver_examples/ecspi/interrupt_b2b_transfer/master
• driver_examples/ecspi/polling_b2b_transfer/slave
• driver_examples/ecspi/polling_b2b_transfer/master
• driver_examples/rdc
• driver_examples/tmu_1/monitor_threshold
• driver_examples/tmu_1/temperature_polling
• driver_examples/sema4/uboot
• rtos_examples/freertos_ecspi/ecspi_loopback
• rtos_examples/freertos_hello
• rtos_examples/freertos_queue
• rtos_examples/freertos_sem
• rtos_examples/freertos_generic
• rtos_examples/freertos_uart
• rtos_examples/freertos_tickless
• rtos_examples/freertos_mutex
• rtos_examples/freertos_event
• rtos_examples/freertos_swtimer
• rtos_examples/freertos_i2c
• cmsis_driver_examples/i2c/int_b2b_transfer/slave
• cmsis_driver_examples/i2c/int_b2b_transfer/master
• cmsis_driver_examples/uart/sdma_transfer
• cmsis_driver_examples/uart/interrupt_transfer
• cmsis_driver_examples/ecspi/int_loopback_transfer
• cmsis_driver_examples/ecspi/sdma_loopback_transfer
• multicore_examples/rpmsg_lite_str_echo_rtos
• multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
• demo_apps/hello_world

Releases

mcuxpresso-2.5.0-mx8mm-v1.0

• HARDWARE_NAME = DART-MX8M-MINI
• RELEASE_NAME = mcuxpresso-2.5.0-mx8mm-v1.0
• RELEASE_LINK = MCUXPRESSO_2.5.0_V1.0_DART-MX8M-MINI
• MCUXPRESSO_VERSION = 2.5.0
• SDK_PATH = ~/var-mcuxpresso
• SDK_GIT_URL = https://github.com/varigit/freertos-variscite
• SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
• TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
• TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
• TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
• BOARD_FOLDER = boards/dart_mx8mm
• DOCS_FOLDER = docs
• PINS_SECTION = DART-MX8M-MINI_PINS_SECTION
• DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
• DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
• MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
• JTAG_SECTION = DART-MX8M_JTAG_SECTION
• NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for i.MX 8M Mini.pdf
• NXP_REFERENCE_KIT = EVK-MIMX8MM

VAR-SOM-MX8X

Sections

Default M4 pins

Default M4 pins used by the demos are:

function	pin
debug UART (UART2)	RX: J18.5 / TX: J18.3
I2C (I2C3)	SCL: J16.10 / SDA: J16.12
M4 GPIO (M40_GPIO0_IO00)	J16.3
M4 PWM (M40_TPM0_CH0)	J16.7
CAN (CAN1)	RX: J18.9 / TX: J18.7

Available Demos

• cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
• cmsis_driver_examples/lpi2c/int_b2b_transfer/master
• cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
• cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
• cmsis_driver_examples/lpuart/edma_transfer
• cmsis_driver_examples/lpuart/interrupt_transfer
• demo_apps/hello_world
• driver_examples/edma/scatter_gather
• driver_examples/edma/memory_to_memory
• driver_examples/intmux
• driver_examples/lpi2c/edma_b2b_transfer/slave
• driver_examples/lpi2c/edma_b2b_transfer/master
• driver_examples/lpi2c/interrupt_b2b_transfer/slave
• driver_examples/lpi2c/interrupt_b2b_transfer/master
• driver_examples/lpi2c/polling_b2b_transfer/slave
• driver_examples/lpi2c/polling_b2b_transfer/master
• driver_examples/lpi2c/read_accel_value_transfer
• driver_examples/lpit
• driver_examples/lpuart/edma_transfer
• driver_examples/lpuart/interrupt_rb_transfer
• driver_examples/lpuart/polling
• driver_examples/lpuart/interrupt_transfer
• driver_examples/rgpio/led_output
• driver_examples/sema42/uboot
• driver_examples/tpm/input_capture
• driver_examples/tpm/dual_edge_capture
• driver_examples/tpm/timer
• driver_examples/tpm/simple_pwm
• driver_examples/tpm/output_compare
• driver_examples/tstmr
• driver_examples/wdog32
• mmcau_examples/mmcau_api
• multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
• multicore_examples/rpmsg_lite_str_echo_rtos
• rtos_examples/freertos_hello
• rtos_examples/freertos_queue
• rtos_examples/freertos_sem
• rtos_examples/freertos_generic
• rtos_examples/freertos_tickless
• rtos_examples/freertos_mutex
• rtos_examples/freertos_lpuart
• rtos_examples/freertos_event
• rtos_examples/freertos_swtimer

Additional demos are available as reference code, but require HW/SW customization.

NXP Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type	M4 memory area	A35 memory area	memory lentgh	linker file
DDR	0x88000000-0x881FFFFF (code) 0x88200000-0x883FFFFF (data) 0x88400000-0x8FFFFFFF (data2)	0x88000000-0x881FFFFF (code) 0x88200000-0x883FFFFF (data) 0x88400000-0x8FFFFFFF (data2)	128MB (DDR)	MIMX8QX6xxxFZ_cm4_ddr_ram.ld
TCM	0x1FFE0000-0x1FFFFFFF (code) 0x20000000-0x2001FFFF (data) 0x88000000-0x8FFFFFFF (data2)	0x34FE0000-0x34FFFFFF (code) 0x35000000-0x3501FFFF (data) 0x88000000-0x8FFFFFFF (data2)	256kB (TCM) + 128MB (DDR)	MIMX8QX6xxxFZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

After launching the build_all.sh command the following folder will be created in the armgcc folder

• ddr_debug: containing DDR binaries compiled in debug mode (stripped: no symbols available)
• ddr_release: containing DDR binaries compiled in release mode (not stripped: symbols available)
• debug: containing TCM binaries compiled in debug mode (stripped: no symbols available)
• release: containing TCM binaries compiled in release mode (not stripped: symbols available)

Further details about memory mapping are available in i.MX 8DualXPlus/8QuadXPlus Applications Processor Reference Manual paragraphs:

• 2.2 System Memory Map
• 2.2.9 Cortex-M4 Memory Map

JTAG

The VAR-SOM-MX8X exposes JTAG interface via an optional 10-pin header

Here the pinout

pin	signal	description	pin	signal (ball)	description
1	JTAG_VREF	JTAG reference voltage (3.3V)	2	JTAG_TMS (AG35)	JTAG Mode Select
3	GND	Digital Ground	4	JTAG_TCK (AE31)	JTAG Clock
5	GND	Digital Ground	6	JTAG_TDO (AF32)	JTAG Data Out
7	RTCK	JTAG Return clock	8	JTAG_TDI (AH34)	JTAG Data In
9	JTAG_TRST_B_CONN	JTAG TAP reset	10	JTAG_SRST_B	JTAG System reset

Please refer to SOM datasheet for further details.

Releases

mcuxpresso-2.5.1-mx8qx-v1.0

• HARDWARE_NAME = VAR-SOM-MX8X
• SOC_HAS_SCU = true
• RELEASE_NAME = mcuxpresso-2.5.1-mx8qx-v1.0
• RELEASE_LINK = MCUXPRESSO_2.5.1_V1.0_VAR-SOM-MX8X
• YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8X
• MCUXPRESSO_VERSION = 2.5.1
• SDK_PATH = ~/var-mcuxpresso
• SDK_GIT_URL = https://github.com/varigit/freertos-variscite
• SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
• TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
• TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
• TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
• BOARD_FOLDER = boards/som_mx8qx
• DOCS_FOLDER = docs
• PINS_SECTION = VAR-SOM-MX8X_PINS_SECTION
• DEMOS_SECTION = VAR-SOM-MX8X_DEMOS_SECTION
• DTBS_SECTION = VAR-SOM-MX8X_DTBS_SECTION
• MEMORY_TYPES_SECTION = VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION
• JTAG_SECTION = VAR-SOM-MX8X_JTAG_SECTION
• NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for i.MX 8QuadXPlus.pdf
• NXP_REFERENCE_KIT = IMX8QXP-MEK