VAR-SOM-MX7 FreeRTOS for M4

Prerequisites

Before starting, prepare a boot SD with your Yocto Morty build for VAR-SOM-MX7

Installing required packages

Download and install GNU-ARM bare-metal toolchain:

mkdir ~/var-som-mx7_m4-freertos
cd ~/var-som-mx7_m4-freertos
wget https://developer.arm.com/-/media/Files/downloads/gnu-rm/5_4-2016q3/gcc-arm-none-eabi-5_4-2016q3-20160926-linux.tar.bz2
tar xvf gcc-arm-none-eabi-5_4-2016q3-20160926-linux.tar.bz2

Download FreeRTOS BSP for the SOM:

cd ~/var-som-mx7_m4-freertos
git clone https://github.com/varigit/freertos-variscite.git -b freertos_bsp_1.0.1_imx7d-var01
cd freertos-variscite

Documentation

Original NXP documentation is available in the following folder:

~/var-som-mx7_m4-freertos/freertos-variscite/doc

Available demos

All of the Variscite examples are located under the following folder

~/var-som-mx7_m4-freertos/freertos-variscite/examples/var-som-mx7_m4

The available demos for VAR-SOM-MX7 are

path	memory type
demo_apps/blinking_imx_demo	TCM
demo_apps/hello_world	TCM
demo_apps/hello_world_ddr	DDR
demo_apps/hello_world_ocram	OCRAM
demo_apps/low_power_imx7d/rand_wfi	TCM
demo_apps/rpmsg/pingpong_bm	TCM
demo_apps/rpmsg/pingpong_freertos	TCM
demo_apps/rpmsg/str_echo_bm	TCM
demo_apps/rpmsg/str_echo_freertos	TCM
demo_apps/sema4_demo	TCM
driver_examples/adc_imx7d	TCM
driver_examples/flexcan/flexcan_loopback	TCM
driver_examples/flexcan/flexcan_network	TCM
driver_examples/gpio_imx	TCM
driver_examples/gpt	TCM
driver_examples/i2c_imx/i2c_interrupt_rtc_imx7d	TCM
driver_examples/i2c_imx/i2c_polling_rtc_imx7d	TCM
driver_examples/uart_imx/uart_interrupt	TCM
driver_examples/uart_imx/uart_polling	TCM
driver_examples/wdog_imx	TCM

Almost all of the above demos are also available for iMX7 SabreSD.

You can build and run the demos following official NXP documentation for iMX7 SabreSD.

Memory types

The BSP allow linking using 3 different memory types: DDR, OCRAM, TCM.

Almost all the demos are provided for TCM.

Here is available a short description of them.

DDR

Part of the DDR address qare reserved to CortexM4 in Linux dts.

When linking for DDR, the application must be loaded in that DDR space (max 32kB for code and 32kB for data).

Related linker file can be found here:

~/var-som-mx7_m4-freertos/freertos-variscite/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_ddr.ld

OCRAM

iMX7 include an OnChip RAM.

When linking for OCRAM, the application must be loaded in that OCRAM space (max 32kB for code and 32kB for data).

Related linker file can be found here:

~/var-som-mx7_m4-freertos/freertos-variscite/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_ocram.ld

TCM

Cortex-M4 include an Tightly Coupled Memory.

When linking for TCM, the application must be loaded in that TCM space (max 32kB for code and 32kB for data).

Related linker file can be found here:

~/var-som-mx7_m4-freertos/freertos-variscite/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_tcm.ld

Special notes about I2C demos

Since we have no on-board sensors, under "driver_examples/i2c_imx" you will find 2 demos accessing the RTC.

The demos require disabling I2C2 from Linux dts. This also means that both WM8731 and OV5640 cannot be controlled on Linux side.

However this BSP aims to provide examples for testing, so if not needed, feel free to re-enable it on Linux side.

If you plan to use a different I2C bus for M4, just disable it in Linux dts and update I2C section in file:

~/var-som-mx7_m4-freertos/freertos-variscite/examples/var-som-mx7_m4/board.h

Building a demo

For any demo just follow this steps:

cd ~/var-som-mx7_m4-freertos/freertos-variscite/examples/var-som-mx7_m4
cd <demo_folder>
cd armgcc
export ARMGCC_DIR=~/var-som-mx7_m4-freertos/gcc-arm-none-eabi-5_4-2016q3
./build_all.sh > /dev/null

Then copy the ".bin" in the FAT32 partition of the boot SD.

Running a demo

A detailed step by step procedure to running each of the demos is available in the document

~/var-som-mx7_m4-freertos/freertos-variscite/doc/FreeRTOS_BSP_for_i.MX_7Dual_Demo_User’s_Guide.pdf

The default boot process leads the uboot to autodect the right dtb, assuming the M4 is not used.

To allow Cortex M4 accessing shared resources (RAM, SPI, I2C, CAN), a dedicated dtb must be loaded by u-boot.

In order to enable Cortex M4 for VAR-SOM-MX7, force the dtb as follow (for SD/eMMC support):

setenv fdt_file=imx7d-var-som-emmc-m4.dtb; saveenv

or (for NAND support):

setenv fdt_file=imx7d-var-som-nand-m4.dtb; saveenv

according your SOM configuration.

Binary demos must be loaded accord the memory type used for linking.

For all memory types the steps are the same, just the addresses are different

load application image to memory
flush content to memory
start Cortex-M4 from memory

DDR

fatload mmc 0:1 0x9FF00000 demo_ddr.bin
dcache flush
bootaux 0x9FF00000

OCRAM

fatload mmc 0:1 0x00910000 demo_ocram.bin
dcache flush
bootaux 0x00910000

TCM

fatload mmc 0:1 0x007F8000 demo_tcl.bin
dcache flush
bootaux 0x007F8000

Debugging a demo

JTAG interface

Cortex M4 debugging requires JTAG.

The JTAG Interface is exported through Test Points TP1/2/3/4/5 on VAR-SOM-MX7

Debugging GUI

The only GUI currently supported to debug Cortex M4 applications is Lauterbach TRACE32.

The script to attach TRACE32 is available here:

~/var-som-mx7_m4-freertos/freertos-variscite/tools/trace32/attach_imx7d_m4.cmm

Make sure that TRACE32 ICD (In-Circuit-Debugger) for ARM is installed and the Lauterbach debugger device supports ARM Cortex-A7 and ARM Cortex-M4 debugging.

Build a FreeRTOS application for the target, and change the default ELF load path in attach_imx7d_m4.cmm line 115: data.load.elf "<your ELF path>" /verify.

Connect the TRACE32 debugger device to the computer and the board (through JTAG). Run the TRACE32 ICD ARM debugger, and load attach_imx7d_m4.cmm by choosing "File -> Run Batchfile".

Run (GO) and debug the program with the single step (Step, Over, Next, Return) or break points.