VAR-SOM-MX6 GPIO: Difference between revisions

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{{PageHeader|VAR-SOM-MX6 - GPIO}} {{DocImage|category1=VAR-SOM-MX6|category2=Yocto}} __toc__
{{PageHeader|VAR-SOM-MX6 - GPIO}} {{DocImage|category1=VAR-SOM-MX6|category2=Yocto}} __toc__


= GPIO state =
= GPIO state =
The current state of the systems' GPIOs can be obtained in user-mode, as shown in the following example:
The current state of the system's GPIOs can be obtained in user-mode, as shown in the following example:
<pre>$ cat /sys/kernel/debug/gpio
</pre>
The above command on Variscite's VAR-DVK-MX6 will show the following:
<pre>
<pre>
root@var-som-mx6:~# cat /sys/kernel/debug/gpio  
root@var-som-mx6:~# cat /sys/kernel/debug/gpio  
Line 35: Line 31:
  gpio-200 (wlan-en-regulator  ) out lo   
  gpio-200 (wlan-en-regulator  ) out lo   
</pre>
</pre>
Each GPIO is defined as in or out and the state is shown as lo or hi.
 
<br/>For example pin 110 is the SD-Card card-detect.  
Each GPIO is defined as in or out and the state is shown as lo or hi.<br>
When SD-Card is removed the state will be:
For example pin 110 is the SD card card-detect.
When an SD card is plugged in, the state will be:
<pre>
<pre>
gpio-110 (2194000.usdhc cd    ) in  hi
gpio-110 (2194000.usdhc cd    ) in  lo
</pre>
</pre>
When the SD-Card is plugged the state will be:
When the SD card is removed, the state will be:
<pre>
<pre>
gpio-110 (2194000.usdhc cd    ) in  lo
gpio-110 (2194000.usdhc cd    ) in  hi
</pre>
</pre>


= Manipulating a single GPIO via /sys/class/gpio =
= Manipulating a single GPIO via /sys/class/gpio =
GPIOs in i.MX6 are grouped in groups of 32 pins.<br/>For example GPIO1_3 belong to the first group pin 3. Its absolute number will be 3.
GPIOs in i.MX are grouped in groups of 32 pins.<br>
<br/>GPIO7_4 will be (7-1)*32+4=196.
For example, GPIO1_3 belong to the first group, pin 3. Its absolute number will be 3.<br>
<br/>Lets assume that you defined this GPIO in the device tree. We will show in the following sections how to define it.
GPIO7_4 will be (7-1)*32+4=196.<br>
<br/>To configure as output:
Assuming this GPIO is defined in your device tree, the following is an example of how to use it from userspace.<br>
<pre>$ echo 196 > /sys/class/gpio/export
<br>
To configure as output:<br>
<pre>
$ echo 196 > /sys/class/gpio/export
$ echo out > /sys/class/gpio/gpio196/direction
$ echo out > /sys/class/gpio/gpio196/direction
</pre>
</pre>
Set GPIO high:
Set GPIO high:
<pre>$ echo 1 > /sys/class/gpio/gpio196/value
<pre>
$ echo 1 > /sys/class/gpio/gpio196/value
</pre>
</pre>
Set GPIO low:
Set GPIO low:
Line 61: Line 62:
$ echo 0 > /sys/class/gpio/gpio196/value
$ echo 0 > /sys/class/gpio/gpio196/value
</pre>
</pre>
<br>
To configure as input:
To configure as input:
<pre>$ echo 196 > /sys/class/gpio/export
<pre>
$ echo 196 > /sys/class/gpio/export
$ echo in > /sys/class/gpio/gpio196/direction
$ echo in > /sys/class/gpio/gpio196/direction
</pre>
</pre>
<pre>$ cat /sys/class/gpio/gpio196/value
Read the current value:
<pre>
$ cat /sys/class/gpio/gpio196/value
</pre>
</pre>
Will read the current value.


= Kernel Device Tree GPIO configuration =
= Kernel Device Tree GPIO configuration =
== Device Tree GPIO files ==
== Device Tree GPIO files ==
=== Pin Func files ===
=== Pin Func files ===
In the Linux kernel in directory arch/arm/boot/dts/ you will find the pin functions files.
In the directory arch/arm/boot/dts/ of the Linux kernel source you will find the pin functions definitions files.<br>
<br/>The relevant files are: imx6dl-pinfunc.h, imx6ul-pinfunc.h, imx6q-pinfunc.h depend on the platform we are running.
The relevant files are imx6dl-pinfunc.h and imx6q-pinfunc.h, depending on the platform you are using.<br>
If you edit imx6q-pinfunc.h and search for GPIO7_IO04 for example you will see a group of pins with same prefix "MX6QDL_PAD_SD3_DAT0".
For example, if you edit imx6q-pinfunc.h and search for GPIO7_IO04, you will see a group of of definitions with same prefix (pad name), "MX6QDL_PAD_SD3_DAT0".
<pre>
<pre>
#define MX6QDL_PAD_SD3_DAT0__SD3_DATA0              0x2c0 0x6a8 0x000 0x0 0x0
#define MX6QDL_PAD_SD3_DAT0__SD3_DATA0              0x2c0 0x6a8 0x000 0x0 0x0
Line 82: Line 86:
#define MX6QDL_PAD_SD3_DAT0__GPIO7_IO04            0x2c0 0x6a8 0x000 0x5 0x0
#define MX6QDL_PAD_SD3_DAT0__GPIO7_IO04            0x2c0 0x6a8 0x000 0x5 0x0
</pre>
</pre>
Selecting one of them and writing it in the dts file will set the functionality required for this pin.
Adding only the one with the GPIO7_IO04 suffix (function) to your dts file will let you use the pin as GPIO.


=== Variscite dts files ===
=== Variscite dts files ===
Line 149: Line 153:


== Define a pin as GPIO in the kernel Device Tree ==
== Define a pin as GPIO in the kernel Device Tree ==
<br/>First you need to modify the relevant device tree and make sure your gpio is defined.
You need to add the relevant definitions to your device tree, as explained in the [[#Pin Func files|Pin Func files]] section above.<br>
<br/>For Example:
Edit arch/arm/boot/dts/imx6qdl-var-som.dtsi and add the definition for the GPIO you need in the section below.<br>
<br/>Edit arch/arm/boot/dts/imx6qdl-var-som.dtsi and in the section below:
<pre>
<pre>
pinctrl-names = "default";
pinctrl-names = "default";
Line 175: Line 178:
</pre>
</pre>


<br/>Add the relevant GPIO to the above section in the device tree.
=== Device Tree GPIO attribute ===
=== Device Tree GPIO attribute ===
If you look at Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt the number to the right of the pin control spec can be used for additional attributes like pull-ups, pull-downs, keepers, drive strength, etc.  
If you look at Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt in the Linux kernel source tree, the number to the right of the pin control spec can be used for additional attributes like pull-ups, pull-downs, keepers, drive strength, etc.<br>
<br/>The value 0x80000000 is don't know value please use the default".  
The value 0x80000000 is "don't know value please use the default". Else use the table below to set it to the required value.
Else use the table below to set it to the required value.
{| class="wikitable"
{| class="wikitable"
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Revision as of 09:23, 22 September 2016

VAR-SOM-MX6 - GPIO

GPIO state

The current state of the system's GPIOs can be obtained in user-mode, as shown in the following example: 

root@var-som-mx6:~# cat /sys/kernel/debug/gpio 
GPIOs 0-31, platform/209c000.gpio, 209c000.gpio:
 gpio-25  (phy-reset           ) out lo    

GPIOs 32-63, platform/20a0000.gpio, 20a0000.gpio:

GPIOs 64-95, platform/20a4000.gpio, 20a4000.gpio:
 gpio-77  (ov5640_mipi_pwdn    ) out lo    
 gpio-86  (usb_otg_vbus        ) out lo    

GPIOs 96-127, platform/20a8000.gpio, 20a8000.gpio:
 gpio-101 (tlv320aic3x reset   ) out lo    
 gpio-106 (ov5640_mipi_reset   ) out lo    
 gpio-110 (2194000.usdhc cd    ) in  hi    
 gpio-111 (2194000.usdhc ro    ) in  hi    
 gpio-120 (spi_imx             ) out lo    
 gpio-121 (ads7846_pendown     ) in  hi    

GPIOs 128-159, platform/20ac000.gpio, 20ac000.gpio:
 gpio-141 (PCIe reset          ) out lo    

GPIOs 160-191, platform/20b0000.gpio, 20b0000.gpio:
 gpio-178 (sysfs               ) out lo    

GPIOs 192-223, platform/20b4000.gpio, 20b4000.gpio:
 gpio-200 (wlan-en-regulator   ) out lo

Each GPIO is defined as in or out and the state is shown as lo or hi.
For example pin 110 is the SD card card-detect. When an SD card is plugged in, the state will be: 

 gpio-110 (2194000.usdhc cd    ) in  lo

When the SD card is removed, the state will be: 

 gpio-110 (2194000.usdhc cd    ) in  hi

Manipulating a single GPIO via /sys/class/gpio

GPIOs in i.MX are grouped in groups of 32 pins.
For example, GPIO1_3 belong to the first group, pin 3. Its absolute number will be 3.
GPIO7_4 will be (7-1)*32+4=196.
Assuming this GPIO is defined in your device tree, the following is an example of how to use it from userspace.

To configure as output:

$ echo 196 > /sys/class/gpio/export
$ echo out > /sys/class/gpio/gpio196/direction

Set GPIO high: 

$ echo 1 > /sys/class/gpio/gpio196/value

Set GPIO low: 

$ echo 0 > /sys/class/gpio/gpio196/value


To configure as input: 

$ echo 196 > /sys/class/gpio/export
$ echo in > /sys/class/gpio/gpio196/direction

Read the current value: 

$ cat /sys/class/gpio/gpio196/value

Kernel Device Tree GPIO configuration

Device Tree GPIO files

Pin Func files

In the directory arch/arm/boot/dts/ of the Linux kernel source you will find the pin functions definitions files.
The relevant files are imx6dl-pinfunc.h and imx6q-pinfunc.h, depending on the platform you are using.
For example, if you edit imx6q-pinfunc.h and search for GPIO7_IO04, you will see a group of of definitions with same prefix (pad name), "MX6QDL_PAD_SD3_DAT0". 

#define MX6QDL_PAD_SD3_DAT0__SD3_DATA0              0x2c0 0x6a8 0x000 0x0 0x0
#define MX6QDL_PAD_SD3_DAT0__UART1_CTS_B            0x2c0 0x6a8 0x000 0x1 0x0
#define MX6QDL_PAD_SD3_DAT0__UART1_RTS_B            0x2c0 0x6a8 0x91c 0x1 0x2
#define MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX            0x2c0 0x6a8 0x000 0x2 0x0
#define MX6QDL_PAD_SD3_DAT0__GPIO7_IO04             0x2c0 0x6a8 0x000 0x5 0x0

Adding only the one with the GPIO7_IO04 suffix (function) to your dts file will let you use the pin as GPIO.

Variscite dts files

Variscite defines dts file for each platform.

Device Tree Name
 Include dtsi file
 SOM type
 Carrier Board type
 LCD Type
 Evaluation Kit name
imx6q-var-som.dts imx6qdl-var-som.dtsi VAR-SOM-MX6_V2 (Quad / Dual) VAR-MX6CustomBoard Capacitive/Resistive touch VAR-DVK-MX6_V2-PRO
VAR-STK-MX6_V2
imx6q-var-som-vsc.dts imx6qdl-var-som.dtsi VAR-SOM-MX6_V2 (Quad / Dual) VAR-SOLOCustomBoard Capacitive LVDS touch N/A
imx6dl-var-som.dts imx6qdl-var-som.dtsi VAR-SOM-MX6_V2 (DualLite/ Solo) VAR-MX6CustomBoard Capacitive/Resistive touch N/A
imx6dl-var-som-solo-vsc.dts imx6qdl-var-som.dtsi VAR-SOM-SOLO / VAR-SOM-DUAL VAR-SOLOCustomBoard Capacitive LVDS touch VAR-DVK-SOLO/DUAL VAR-STK-SOLO/DUAL
imx6dl-var-som-solo.dts imx6qdl-var-som.dtsi VAR-SOM-SOLO / VAR-SOM-DUAL VAR-MX6CustomBoard Capacitive/Resistive touch N/A
imx6q-var-dart.dts imx6qdl-var-dart.dtsi VAR-SOM-SOLO / VAR-SOM-DUAL VAR-DT6CustomBoard Capacitive LVDS touch VAR-STK-DT6.VAR-DVK-DT6

imx6q-var-som.dts starts with definitions and includindg dtsi files. 

#define VAR_SOM_MX6

#include "imx6q.dtsi"
#include "imx6qdl-var-som.dtsi"


The imx6q.dtsi define the CPU platform and which pinfunc file will be included. This feature allow the pin name to be agnostic to the CPU type (i.MX6Q vs i.MX6DL)
imx6qdl-var-som.dtsi has the major VAR-SOM-MX6 definitions.

Define a pin as GPIO in the kernel Device Tree

You need to add the relevant definitions to your device tree, as explained in the Pin Func files section above.
Edit arch/arm/boot/dts/imx6qdl-var-som.dtsi and add the definition for the GPIO you need in the section below.

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6qdl-var-som-mx6 {

		pinctrl_hog: hoggrp {
			fsl,pins = <
				/* PMIC INT */
				MX6QDL_PAD_GPIO_17__GPIO7_IO12			0x80000000
				/* Wifi Slow Clock */
				MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT		0x000b0
				/* Audio Clock */
				MX6QDL_PAD_GPIO_0__CCM_CLKO1 			0x130b0
				/* Camera Clock */
				MX6QDL_PAD_GPIO_3__CCM_CLKO2			0x130b0
                                MX6QDL_PAD_KEY_ROW0__GPIO4_IO07                 0x0b0b1
                                MX6QDL_PAD_KEY_COL1__GPIO4_IO08                 0x0b0b1

			>;
		};

Device Tree GPIO attribute

If you look at Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt in the Linux kernel source tree, the number to the right of the pin control spec can be used for additional attributes like pull-ups, pull-downs, keepers, drive strength, etc.
The value 0x80000000 is "don't know value please use the default". Else use the table below to set it to the required value.

CONFIG bits definition
 value
PAD_CTL_HYS (1 << 16)
PAD_CTL_PUS_100K_DOWN (0 << 14)
PAD_CTL_PUS_47K_UP (1 << 14)
PAD_CTL_PUS_100K_UP (2 << 14)
PAD_CTL_PUS_22K_UP (3 << 14)
PAD_CTL_PUE (1 << 13)
PAD_CTL_PKE (1 << 12)
PAD_CTL_ODE (1 << 11)
PAD_CTL_SPEED_LOW (1 << 6)
PAD_CTL_SPEED_MED (2 << 6)
PAD_CTL_SPEED_HIGH (3 << 6)
PAD_CTL_DSE_DISABLE (0 << 3)
PAD_CTL_DSE_240ohm (1 << 3)
PAD_CTL_DSE_120ohm (2 << 3)
PAD_CTL_DSE_80ohm (3 << 3)
PAD_CTL_DSE_60ohm (4 << 3)
PAD_CTL_DSE_48ohm (5 << 3)
PAD_CTL_DSE_40ohm (6 << 3)
PAD_CTL_DSE_34ohm (7 << 3)
PAD_CTL_SRE_FAST (1 << 0)
PAD_CTL_SRE_SLOW (0 << 0)

Device Tree GPIO default Value

The Bluetooth is a good example to see how to set the default value during boot. variscite-bluetooth
For example how to reset the Bluetooth: 

echo 178 >/sys/class/gpio/export
echo "out" > /sys/class/gpio/gpio178/direction
echo 0 > /sys/class/gpio/gpio178/value
sleep 1
echo 1 > /sys/class/gpio/gpio178/value
sleep 1

You can also add it to your default build file system: initscripts

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This page was last edited on 22 September 2016, at 09:23.

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