MX8M GPIO: Difference between revisions
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root@imx95-var-dart:~# cat /sys/kernel/debug/gpio | root@imx95-var-dart:~# cat /sys/kernel/debug/gpio | ||
gpiochip0: GPIOs 512-543, parent: platform/43810000.gpio, 43810000.gpio: | gpiochip0: GPIOs 512-543, parent: platform/43810000.gpio, 43810000.gpio: | ||
gpio-516 ( |spi0 CS0 ) out hi ACTIVE LOW | |||
gpio-522 ( |scl ) out lo | gpio-522 ( |scl ) out lo | ||
gpio-523 ( |sda ) in lo | gpio-523 ( |sda ) in lo | ||
gpio-534 ( |microchip,rx-int ) in hi ACTIVE LOW | gpio-534 ( |microchip,rx-int ) in hi ACTIVE LOW | ||
gpio-536 ( |pendown ) in hi IRQ ACTIVE LOW | gpio-536 ( |pendown ) in hi IRQ ACTIVE LOW | ||
Line 209: | Line 209: | ||
gpiochip5: GPIOs 672-679, parent: i2c/7-0020, 7-0020, can sleep: | gpiochip5: GPIOs 672-679, parent: i2c/7-0020, 7-0020, can sleep: | ||
gpio-673 ( |reset ) out hi ACTIVE LOW | |||
gpio-675 ( |powerdown ) out hi | |||
gpio-676 ( |Home ) in hi IRQ ACTIVE LOW | gpio-676 ( |Home ) in hi IRQ ACTIVE LOW | ||
gpio-677 ( |Up ) in hi IRQ ACTIVE LOW | gpio-677 ( |Up ) in hi IRQ ACTIVE LOW | ||
Line 216: | Line 218: | ||
gpiochip6: GPIOs 680-687, parent: i2c/7-0021, 7-0021, can sleep: | gpiochip6: GPIOs 680-687, parent: i2c/7-0021, 7-0021, can sleep: | ||
gpio-680 ( |regulator-enet1-phy ) out hi | gpio-680 ( |regulator-enet1-phy ) out hi | ||
gpio-683 ( |PCIe reset ) out hi | |||
gpio-684 ( |reset ) out hi ACTIVE LOW | gpio-684 ( |reset ) out hi ACTIVE LOW | ||
</pre> | </pre> |
Latest revision as of 12:18, 23 October 2024
This page is using the default release RELEASE_SUMO_V1.0_DART-MX8M.
To view this page for a specific Variscite SoM and software release, please follow these steps:
- Visit variwiki.com
- Select your SoM
- Select the software release
GPIO state
The current state of the system's GPIOs can be obtained in user-mode, as shown in the following example:
# cat /sys/kernel/debug/gpio gpiochip0: GPIOs 0-31, parent: platform/30200000.gpio, 30200000.gpio: gpio-8 ( |eth_phy_pwr ) out hi gpio-9 ( |phy-reset ) out hi gpio-10 ( |connect ) in hi IRQ gpiochip1: GPIOs 32-63, parent: platform/30210000.gpio, 30210000.gpio: gpio-44 ( |cd ) in lo IRQ gpio-51 ( |VSD_3V3 ) out hi gpiochip2: GPIOs 64-95, parent: platform/30220000.gpio, 30220000.gpio: gpiochip3: GPIOs 96-127, parent: platform/30230000.gpio, 30230000.gpio: gpio-102 ( |Back ) in hi IRQ gpio-109 ( |Home ) in hi IRQ gpio-111 ( |Down ) in hi IRQ gpio-113 ( |? ) out lo gpio-114 ( |Up ) in hi IRQ
Each GPIO is defined as in or out and the state is shown as lo or hi.
For example pin 44 is the SD card card-detect.
When an SD card is plugged in, the state will be:
gpio-44 ( |cd ) in lo IRQ
When the SD card is removed, the state will be:
gpio-44 ( |cd ) in hi IRQ
Manipulating GPIO using libgpiod
The Linux GPIO sysfs interface is being deprecated. Moving forward, user space should use the character device /dev/gpiochip*
instead. libgpiod provides bindings and utilities for for manipulating GPIO via user space.
libgpiod via command line
libgpiod provides command line utilities for GPIO:
gpiodetect | List all gpiochips present on the system, their names, labels and number of GPIO lines |
gpioinfo | List all lines of specified gpiochips, their names, consumers, direction, active state and additional flags |
gpioget | Read values of specified GPIO lines |
gpioset | Set values of specified GPIO lines, potentially keep the lines exported and wait until timeout, user input or signal |
gpiofind | Find the gpiochip name and line offset given the line name |
gpiomon | Wait for events on GPIO lines, specify which events to watch, how many events to process before exiting or if the events should be reported to the console |
i.MX GPIOs are organized in banks of 32 pins. Each bank corresponds to a character device /dev/gpiochip<bank index>
. The gpiodetect
utility can be used to inspect the available gpiochip character devices:
# gpiodetect gpiochip0 [30200000.gpio] (32 lines) gpiochip1 [30210000.gpio] (32 lines) ...
The gpioinfo
utility can be used to inspect the lines for a given gpiochip:
# gpioinfo gpiochip0 gpiochip0 - 32 lines: line 0: unnamed "spi_imx" output active-high [used] line 1: unnamed unused input active-high line 2: unnamed unused input active-high ...
The gpioset
and gpioget
utilities can be used to manipulate GPIO from the command line.
For example, assuming GPIO4_21 is configured as a GPIO in your device tree:
Set GPIO4_21 high:
gpioset gpiochip3 21=1
Set GPIO4_21 low:
gpioset gpiochip3 21=0
Read GPIO4_21:
gpioget gpiochip3 21
libgpiod C Application
libgpiod provides bindings for C/C++ applications. C++ examples are available in the libgpiod /tree/bindings/cxx/examples directory.
Below is a simple C application demonstrating how to use the bindings with GPIO4_IO21:
Makefile:
all: main.cpp $(CC) $(CCFLAGS) -Og -lgpiod main.c -g -o hello.bin clean: rm -f hello.bin
main.c
#include <gpiod.h> #include <stdio.h> #include <unistd.h> #include <stdlib.h> #include <string.h> #define CONSUMER "Variscite Demo" int main(int argc, char **argv) { unsigned int i, ret, val; struct gpiod_chip *chip; struct gpiod_line *line; const char * chipname = "gpiochip3"; const unsigned int line_num = 21; chip = gpiod_chip_open_by_name(chipname); if (!chip) { perror("Open chip failed\n"); goto end; } line = gpiod_chip_get_line(chip, line_num); if (!line) { perror("Get line failed\n"); goto close_chip; } ret = gpiod_line_request_output(line, CONSUMER, 0); if (ret < 0) { perror("Request line as output failed\n"); goto release_line; } /* Blink 5 times */ val = 0; for (i = 0; i < 5; i++) { ret = gpiod_line_set_value(line, val); if (ret < 0) { perror("Set line output failed\n"); goto release_line; } printf("Output %u on line #%u\n", val, line_num); sleep(1); val = !val; } release_line: gpiod_line_release(line); close_chip: gpiod_chip_close(chip); end: return 0; }
libgpiod Python Application
libgpiod provides bindings for python applications:
# pip3 install gpiod
Python examples are available in the libgpiod /tree/bindings/python/examples directory.
Manipulating a single GPIO via /sys/class/gpio
Using a command line or a script
GPIOs in i.MX are grouped in groups of 32 pins.
For example, GPIO1_3 belong to the first group, pin 3. Its absolute number will be 3.
GPIO4_21 will be (4-1)*32+21=117.
Assuming this GPIO is defined in your device tree, the following is an example of how to use it from userspace.
To export the GPIO for userspace use:
$ echo 117 > /sys/class/gpio/export
To configure as output:
$ echo out > /sys/class/gpio/gpio117/direction
Set GPIO high:
$ echo 1 > /sys/class/gpio/gpio117/value
Set GPIO low:
$ echo 0 > /sys/class/gpio/gpio117/value
To configure as input:
$ echo in > /sys/class/gpio/gpio117/direction
Read the current value:
$ cat /sys/class/gpio/gpio117/value
To free the GPIO after you're done using it:
$ echo 117 > /sys/class/gpio/unexport
Using a C application
All of the command line operations above can be translated to C code:
Reserve (export) the GPIO:
#define IMX_GPIO_NR(port, index) ((((port)-1)*32)+((index)&31)) int fd; char buf[MAX_BUF]; int gpio = IMX_GPIO_NR(4, 21); /* Just an example */ fd = open("/sys/class/gpio/export", O_WRONLY); sprintf(buf, "%d", gpio); write(fd, buf, strlen(buf)); close(fd);
Set the GPIO direction:
sprintf(buf, "/sys/class/gpio/gpio%d/direction", gpio); fd = open(buf, O_WRONLY); /* Set out direction */ write(fd, "out", 3); /* Set in direction */ write(fd, "in", 2); close(fd);
In case of out direction set the GPIO value:
sprintf(buf, "/sys/class/gpio/gpio%d/value", gpio); fd = open(buf, O_WRONLY); /* Set GPIO high status */ write(fd, "1", 1); /* Set GPIO low status */ write(fd, "0", 1); close(fd);
In case of in direction get the current GPIO value:
char value; sprintf(buf, "/sys/class/gpio/gpio%d/value", gpio); fd = open(buf, O_RDONLY); read(fd, &value, 1); if (value == '0') { /* Current GPIO status low */ } else { /* Current GPIO status high */ } close(fd);
Once finished, free (unexport) the GPIO:
fd = open("/sys/class/gpio/unexport", O_WRONLY); sprintf(buf, "%d", gpio); write(fd, buf, strlen(buf)); close(fd);
Important notes:
- Remember that after the first read operation the file pointer will move to the next position in the file, so to get a correct value for each read operation you simply have to set the file pointer at the beginning of the file before read by using the following command:
lseek(fd, 0, SEEK_SET);
- This is only a short example. If you want to use it in your code remember add error handling to it.
Kernel Device Tree GPIO configuration
Device Tree GPIO files
Pin Func files
In the directory arch/arm64/boot/dts/freescale of the Linux kernel source you will find the pin functions definition files.
The relevant file is imx8mq-pinfunc.h.
If you search it for GPIO4_IO2, for example, you will see a group of definitions with same prefix (pad name), "MX8MQ_IOMUXC_SAI1_RXD0".
#define MX8MQ_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0 0x164 0x3CC 0x000 0x0 0x0 #define MX8MQ_IOMUXC_SAI1_RXD0_SAI5_RX_DATA0 0x164 0x3CC 0x4D4 0x1 0x1 #define MX8MQ_IOMUXC_SAI1_RXD0_CORESIGHT_TRACE0 0x164 0x3CC 0x000 0x4 0x0 #define MX8MQ_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x164 0x3CC 0x000 0x5 0x0 #define MX8MQ_IOMUXC_SAI1_RXD0_CCMSRCGPCMIX_BOOT_CFG0 0x164 0x3CC 0x000 0x6 0x0 #define MX8MQ_IOMUXC_SAI1_RXD0_SIM_M_HADDR17 0x164 0x3CC 0x000 0x7 0x0
Adding only the one with the GPIO4_IO2 suffix (function) to your dts file will let you use the pin as GPIO.
Define a pin as GPIO in the kernel Device Tree
You need to add the relevant definitions to your device tree, as explained in the Pin Func files section above.
Edit arch/arm64/boot/dts/freescale/fsl-imx8mq-var-dart-common.dtsi and add the definition for the GPIO you need in the iomuxc node.
&iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; imx8m-var-dart { pinctrl_hog: hoggrp { fsl,pins = < /* Add your GPIO definitions here */ >; }; }; … };
Device Tree GPIO attribute
If you look at the pin control definitions in arch/arm64/boot/dts/freescale/fsl-imx8mq-var-dart-common.dtsi in the Linux kernel source tree, the number to the right of the pin mux macro can be used for additional attributes like pull-up, slew rate, open drain, drive strength, etc.
This value is written to the IOMUXC_SW_PAD_CTRL_ register of the relevant pin.
Please consult the SOC reference manual for details about the relevant register.