MX8 UART: Difference between revisions
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<!-- Set release according to "release" parameter in URL and use RELEASE_SUMO_V1.0_VAR-SOM- | <!-- Set release according to "release" parameter in URL and use RELEASE_SUMO_V1.0_VAR-SOM-MX8 as default | ||
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--> {{#lst:Yocto_Platform_Customization|{{#var:RELEASE_PARAM|RELEASE_SUMO_V1.0_VAR-SOM- | --> {{#lst:Yocto_Platform_Customization|{{#var:RELEASE_PARAM|RELEASE_SUMO_V1.0_VAR-SOM-MX8}}}} <!-- | ||
--> {{PageHeader|{{#var:HARDWARE_NAME}} UART}} {{DocImage|category1=Yocto|category2={{#var:HARDWARE_NAME}}}} __toc__ | --> {{PageHeader|{{#var:HARDWARE_NAME}} UART}} {{DocImage|category1=Yocto|category2={{#var:HARDWARE_NAME}}}} __toc__ | ||
= {{#var:HARDWARE_NAME}} UART Overview = | = {{#var:HARDWARE_NAME}} UART Overview = | ||
{{#ifeq: {{#var:HARDWARE_NAME}} | VAR-SOM-MX8X | | |||
All 4 UARTs on {{#var:HARDWARE_NAME}} are enabled by default.<br> | All 4 UARTs on {{#var:HARDWARE_NAME}} are enabled by default.<br> | ||
UART1 is connected to Bluetooth module, UART2 and UART3 are connected to J18 header on {{#var:HARDWARE_NAME}} carrier board, UART4 is used as a debug console.<br> | UART1 is connected to Bluetooth module, UART2 and UART3 are connected to J18 header on {{#var:HARDWARE_NAME}} carrier board, UART4 is used as a debug console.<br> | ||
On {{#var:HARDWARE_NAME}} SoMs without WIFI/BT module UART1 is | On {{#var:HARDWARE_NAME}} SoMs without WIFI/BT module UART1 is connected to J18 header.<br> | ||
Inspect the carrier board datasheet or schematics for the exact pinout.<br> | Inspect the carrier board datasheet or schematics for the exact pinout.<br> | ||
Only UART1 has RTS and CTS lines. | Only UART1 has RTS and CTS lines. | ||
| | |||
On VAR-SOM-MX8 UART1 - UART3 and UART5 are enabled, UART4 is disabled as it shares pins with the second Ethernet controller. | |||
UART1 is used as a debug console, UART2 is connected to Bluetooth module, UART3 and UART5 are connected to J18 header on {{#var:HARDWARE_NAME}} carrier board.<br> | |||
On {{#var:HARDWARE_NAME}} SoMs without WIFI/BT module UART2 is connected to J18 header.<br> | |||
Only UART2 has RTS and CTS lines.<br> | |||
On SPEAR-MX8 UART1-UART3 are enabled.<br> | |||
UART1 is used as a debug console, UART2 is connected to Bluetooth module, UART3 is connected to J26 header on SPEAR-MX8 carrier board. | |||
On SPEAR-MX8 SoMs without WIFI/BT module UART2 is connected to J20 header.<br> | |||
}} | |||
= UART naming under Linux = | = UART naming under Linux = | ||
The Linux devices corresponding to UART1 - | The Linux devices corresponding to UART1 - UART5 are /dev/ttyLP0 - /dev/ttyLP4 respectively. | ||
{{#ifeq: {{#var:HARDWARE_NAME}} | VAR-SOM-MX8X | | |||
= Testing UART2 = | = Testing UART2 = | ||
Line 24: | Line 35: | ||
</pre> | </pre> | ||
For each | <br>For each invocation of echo command the "hello" string should appear on the terminal. | ||
= Testing UART3 = | = Testing UART3 = | ||
Short J18.7 and J18.9 pins and run the following commands: | |||
<pre> | |||
stty -F /dev/ttyLP2 -echo -onlcr 115200 | |||
cat /dev/ttyLP2 & | |||
echo hello > /dev/ttyLP2 | |||
</pre> | |||
<br>For each invocation of echo command the "hello" string should appear on the terminal. | |||
| | |||
= Testing UART3 on VAR-SOM-MX8 = | |||
Short J18.7 and J18.9 pins and run the following commands: | Short J18.7 and J18.9 pins and run the following commands: | ||
Line 37: | Line 60: | ||
For each invocation of echo command the "hello" string should appear on the terminal. | For each invocation of echo command the "hello" string should appear on the terminal. | ||
= Testing UART3 on SPEAR-MX8 = | |||
Short J26.17 and J26.19 pins and run the following commands: | |||
<pre> | |||
stty -F /dev/ttyLP2 -echo -onlcr 115200 | |||
cat /dev/ttyLP2 & | |||
echo hello > /dev/ttyLP2 | |||
</pre> | |||
For each invocation of echo command the "hello" string should appear on the terminal. | |||
}} | |||
{{#ifeq: {{#var:HARDWARE_NAME}} | VAR-SOM-MX8X | | |||
= Disabling UART2 = | = Disabling UART2 = | ||
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Other UARTs can be disabled in the similar manner. | Other UARTs can be disabled in the similar manner. | ||
| | |||
= Disabling UART3 = | |||
To disable UART3 on VAR-SOM-MX8 edit arch/arm64/boot/dts/freescale/fsl-imx8qxp-var-som-common.dtsi under kernel source directory and modify | |||
<pre> | |||
&lpuart2 { | |||
... | |||
status = "okay"; | |||
}; | |||
</pre> | |||
to | |||
<pre> | |||
&lpuart2 { | |||
... | |||
status = "disabled"; | |||
}; | |||
</pre> | |||
<br> On SPEAR-MX8 modify arch/arm64/boot/dts/freescale/fsl-imx8qxp-var-spear-common.dtsi in the same manner. | |||
}} |
Revision as of 11:47, 8 October 2019
UART Overview
On VAR-SOM-MX8 UART1 - UART3 and UART5 are enabled, UART4 is disabled as it shares pins with the second Ethernet controller.
UART1 is used as a debug console, UART2 is connected to Bluetooth module, UART3 and UART5 are connected to J18 header on carrier board.
On SoMs without WIFI/BT module UART2 is connected to J18 header.
Only UART2 has RTS and CTS lines.
On SPEAR-MX8 UART1-UART3 are enabled.
UART1 is used as a debug console, UART2 is connected to Bluetooth module, UART3 is connected to J26 header on SPEAR-MX8 carrier board.
On SPEAR-MX8 SoMs without WIFI/BT module UART2 is connected to J20 header.
UART naming under Linux
The Linux devices corresponding to UART1 - UART5 are /dev/ttyLP0 - /dev/ttyLP4 respectively.
Testing UART3 on VAR-SOM-MX8
Short J18.7 and J18.9 pins and run the following commands:
stty -F /dev/ttyLP2 -echo -onlcr 115200 cat /dev/ttyLP2 & echo hello > /dev/ttyLP2
For each invocation of echo command the "hello" string should appear on the terminal.
Testing UART3 on SPEAR-MX8
Short J26.17 and J26.19 pins and run the following commands:
stty -F /dev/ttyLP2 -echo -onlcr 115200 cat /dev/ttyLP2 & echo hello > /dev/ttyLP2
For each invocation of echo command the "hello" string should appear on the terminal.
Disabling UART3
To disable UART3 on VAR-SOM-MX8 edit arch/arm64/boot/dts/freescale/fsl-imx8qxp-var-som-common.dtsi under kernel source directory and modify
&lpuart2 { ... status = "okay"; };
to
&lpuart2 { ... status = "disabled"; };
On SPEAR-MX8 modify arch/arm64/boot/dts/freescale/fsl-imx8qxp-var-spear-common.dtsi in the same manner.