DART-MX6 Parallel RGB Display: Difference between revisions
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{{PageHeader|DART-MX6 - Parallel RGB Display (lcd)}} {{DocImage|category1=VAR-SOM-MX6 | {{PageHeader|DART-MX6 - Parallel RGB Display (lcd)}} {{DocImage|category1=Yocto|category2=Debian}} [[category:VAR-SOM-MX6]] __toc__ | ||
= Kernel patch example = | = Kernel patch example = |
Latest revision as of 18:37, 6 June 2023
Kernel patch example
The following kernel patch activates the parallel display port, with RGB 24bit and with sample LCD settings defined as MY-LCD in drivers/video/fbdev/mxc/mxc_lcdif.c:
diff --git a/arch/arm/boot/dts/imx6q-var-dart.dts b/arch/arm/boot/dts/imx6q-var-dart.dts
index 355bd6d57bfe..8d4b6b7e3e50 100644
--- a/arch/arm/boot/dts/imx6q-var-dart.dts
+++ b/arch/arm/boot/dts/imx6q-var-dart.dts
@@ -158,15 +158,15 @@
};
&mxcfb2 {
- status = "okay";
+ status = "disabled";
};
&mxcfb3 {
- status = "okay";
+ status = "disabled";
};
&mxcfb4 {
- status = "okay";
+ status = "disabled";
};
&sata {
diff --git a/arch/arm/boot/dts/imx6qdl-var-dart.dtsi b/arch/arm/boot/dts/imx6qdl-var-dart.dtsi
index fce2b66ac2d2..b2e0e4ea5c94 100644
--- a/arch/arm/boot/dts/imx6qdl-var-dart.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-var-dart.dtsi
@@ -114,8 +114,10 @@
mxcfb1: fb@0 {
compatible = "fsl,mxc_sdc_fb";
- disp_dev = "ldb";
- default_bpp = <16>;
+ disp_dev = "lcd";
+ interface_pix_fmt = "RGB24";
+ mode_str = "MY-LCD";
+ default_bpp = <24>;
int_clk = <0>;
late_init = <0>;
status = "disabled";
@@ -153,18 +155,18 @@
status = "disabled";
};
-#if 0
+
lcd@0 {
compatible = "fsl,lcd";
ipu_id = <0>;
disp_id = <0>;
- default_ifmt = "RGB565";
+ default_ifmt = "RGB24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1>;
status = "okay";
};
-#endif
+/*
backlight {
compatible = "pwm-backlight";
pwms = <&pwm2 0 50000>;
@@ -172,6 +174,7 @@
default-brightness-level = <7>;
status = "okay";
};
+*/
v4l2_cap_0 {
compatible = "fsl,imx6q-v4l2-capture";
@@ -422,11 +425,13 @@
>;
};
+/*
pinctrl_pwm1_1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
>;
};
+*/
/* Linux Console */
pinctrl_uart1_1: uart1grp-1 { /* RX/TX only */
@@ -632,12 +637,13 @@
status = "okay";
};
+/*
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1_1>;
status = "okay";
};
-
+*/
&ssi2 {
fsl,mode = "i2s-slave";
diff --git a/arch/arm/boot/dts/imx6qdl-var-solocb-dt6cb-displays.dtsi b/arch/arm/boot/dts/imx6qdl-var-solocb-dt6cb-displays.dtsi
index b2f28504344e..951a6fb4163b 100644
--- a/arch/arm/boot/dts/imx6qdl-var-solocb-dt6cb-displays.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-var-solocb-dt6cb-displays.dtsi
@@ -14,9 +14,6 @@
* Capacitive Display for VAR-SoloCustomBoard and VAR-DT6CustomBoard
*/
-&mxcfb1 {
- interface_pix_fmt = "RGB666";
-};
&i2c3 {
touch: ft5x06_ts@38 {
@@ -28,13 +25,13 @@
};
&ldb {
- status = "okay";
+ status = "disabled";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
crtc = "ipu1-di0";
- status = "okay";
+ status = "disabled";
display-timings {
native-mode = <&timing0>;
@@ -57,7 +54,7 @@
fsl,data-width = <18>;
crtc = "ipu1-di1";
primary;
- status = "okay";
+ status = "disabled";
display-timings {
native-mode = <&timing1>;
diff --git a/drivers/video/fbdev/mxc/mxc_lcdif.c b/drivers/video/fbdev/mxc/mxc_lcdif.c
index 59d429c82017..6bcd941cb599 100644
--- a/drivers/video/fbdev/mxc/mxc_lcdif.c
+++ b/drivers/video/fbdev/mxc/mxc_lcdif.c
@@ -48,6 +48,12 @@ static struct fb_videomode lcdif_modedb[] = {
FB_SYNC_CLK_LAT_FALL,
FB_VMODE_NONINTERLACED,
0,},
+ {
+ /* 1280x1024 @ 60 Hz , pixel clk @ 54MHz */
+ "MY-LCD", 60, 1280, 1024, 18519, 248, 48, 38, 1, 112, 3,
+ FB_SYNC_CLK_LAT_FALL,
+ FB_VMODE_NONINTERLACED,
+ 0,},
};
static int lcdif_modedb_sz = ARRAY_SIZE(lcdif_modedb);
Customizing the example for your specific LCD
To set the LCD parameters from a specific LCD data sheet:
In the patch, look at the definition of MY-LCD in drivers/video/fbdev/mxc/mxc_lcdif.c - and change its parameters.
Its type is the following struct (defined in include/linux/fb.h):
struct fb_videomode {
const char *name; /* optional */
u32 refresh; /* optional */
u32 xres;
u32 yres;
u32 pixclock;
u32 left_margin;
u32 right_margin;
u32 upper_margin;
u32 lower_margin;
u32 hsync_len;
u32 vsync_len;
u32 sync;
u32 vmode;
u32 flag;
};
Note that pixclock's units are picoseconds and not MHz.
vmode accepts bitwise or combinations of FB_VMODE_* definitions
sync accepts bitwise or combinations of FB_SYNC_* definitions.
FB_VMODE_NONINTERLACED - Non interlaced video
FB_SYNC_CLK_LAT_FALL - Negative polarity of pixel clock
FB_SYNC_OE_LOW_ACT - Invert polarity of data enable
FB_SYNC_HOR_HIGH_ACT - Invert polarity of HSYNCH
FB_SYNC_VERT_HIGH_ACT - Invert polarity of VSYNCH
Needed U-Boot environment change
To use this sample LCD configuration, a change is needed also in the videoargs variable in the U-Boot environment:
Change the current definition of video=mxcfb0 to video=mxcfb0:dev=lcd,MY-LCD,if=RGB24.