DART-6UL Ethernet: Difference between revisions

From Variscite Wiki
(Use template COMPAT_DEBIAN_LST_MODEL)
 
(11 intermediate revisions by 3 users not shown)
Line 1: Line 1:
{{PageHeader|DART-6UL - Ethernet}} {{DocImage|category1=DART-6UL|category2=Yocto}} __toc__
<!-- Set release according to "release" parameter in URL and use RELEASE_THUD_V1.1_DART-6UL as default
--> {{INIT_RELEASE_PARAM|RELEASE_THUD_V1.1_DART-6UL}} <!--
--> {{#lst:Yocto_Platform_Customization|{{#var:RELEASE_PARAM}}}} <!--
--> {{#lst:B2QT_Platform_Customization|{{#var:RELEASE_PARAM}}}} <!--
--> {{#lst:Debian_Platform_Customization|{{#var:RELEASE_PARAM}}}} <!--
--> {{COMPAT_DEBIAN_LST_MODEL}}<!--
--> {{PageHeader|DART-6UL - Ethernet}} {{DocImage|category1=Yocto|category2=Debian}}[[category:DART-6UL]] __toc__
 
= Testing =
= Testing =
There are two 100MB/s ports on the kit, eth0 & eth1.<br>
There are two 100MB/s ports on the kit, eth0 & eth1.<br>
Line 14: Line 21:


= Using only one Ethernet port =
= Using only one Ethernet port =
Apply the following patch to the Linux kernel source, for removing the second Ethernet port, in case your own custom carrier board only has one and doesn't have the second Ethernet phy:
{{#lst:Yocto_Platform_Customization|{{#var:MX6UL_USING_ONE_ETH_PORT}}}}
 
<syntaxhighlight lang="diff">
diff --git a/arch/arm/boot/dts/imx6ul-var-dart.dtsi b/arch/arm/boot/dts/imx6ul-var-dart.dtsi
index 6ccbca1..6931f79 100644
--- a/arch/arm/boot/dts/imx6ul-var-dart.dtsi
+++ b/arch/arm/boot/dts/imx6ul-var-dart.dtsi
@@ -163,16 +163,6 @@
        phy-reset-duration=<100>;
        phy-handle = <&ethphy0>;
        status = "okay";
-};
-
-&fec2 {
-      pinctrl-names = "default";
-      pinctrl-0 = <&pinctrl_enet2>;
-      phy-mode = "rmii";
-      phy-handle = <&ethphy1>;
-      phy-reset-gpios=<&gpio1 10 1>;
-      phy-reset-duration=<100>;
-      status = "okay";
        mdio {
                #address-cells = <1>;
                #size-cells = <0>;
@@ -184,14 +174,6 @@
                        clock-names = "rmii-ref";
                        reg = <1>;
                };
-
-              ethphy1: ethernet-phy@3 {
-                      compatible = "ethernet-phy-ieee802.3-c22";
-                      micrel,rmii-reference-clock-select-25-mhz;
-                      clocks = <&rmii_ref_clk>;
-                      clock-names = "rmii-ref";
-                      reg = <3>;
-              };
        };
};
 
@@ -463,8 +445,8 @@
                                MX6UL_PAD_CSI_HSYNC__GPIO4_IO20        0x1b0b0 /* LED 1 */
                                MX6UL_PAD_CSI_DATA00__GPIO4_IO21        0x1b0b0 /* LED 2 */
                                MX6UL_PAD_GPIO1_IO00__GPIO1_IO00        0x17059 /* User Button */
-                              MX6UL_PAD_GPIO1_IO07__ENET2_MDC        0x1b0b0
-                              MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0
+                              MX6UL_PAD_GPIO1_IO07__ENET1_MDC        0x1b0b0
+                              MX6UL_PAD_GPIO1_IO06__ENET1_MDIO        0x1b0b0
                                MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04      0x1b0b0 /* BT Enable */
                                MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x1b0b0
                        >;
@@ -483,20 +465,6 @@
                        >;
                };
 
-              pinctrl_enet2: enet2grp {
-                      fsl,pins = <
-                              MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN      0x1b0b0
-                              MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER      0x1b0b0
-                              MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
-                              MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
-                              MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN      0x1b0b0
-                              MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
-                              MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
-                              MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2  0x4001b031
-                              MX6UL_PAD_JTAG_MOD__GPIO1_IO10          0x1b0b0
-                      >;
-              };
-
                pinctrl_flexcan1: flexcan1grp{
                        fsl,pins = <
                                MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX      0x1b020
</syntaxhighlight>
 
Note: You can follow the "Build Linux from source code" guide to get the Linux kernel source, apply the above patch, build ''only'' the device trees and copy them to your SD card.

Latest revision as of 20:53, 6 June 2023

Warning: This page is designed to be used with a 'release' URL parameter.

This page is using the default release RELEASE_THUD_V1.1_DART-6UL.
To view this page for a specific Variscite SoM and software release, please follow these steps:

  1. Visit variwiki.com
  2. Select your SoM
  3. Select the software release
DART-6UL - Ethernet

Testing

There are two 100MB/s ports on the kit, eth0 & eth1.

On Host:

$ ifconfig   (to get the IP address)
$ iperf3 -s

On Client:

$ iperf3 -c <IP_ADDRESS_OF_IPERF_SERVER> -u -b 100M

Using only one Ethernet port

To remove the second Ethernet port, in case your own custom carrier board only has one and doesn't have the second Ethernet phy:
Edit the dtsi file of the reference carrier board in the Linux kernel source and remove the &fec1 and &fec2 nodes from it.
In case of the VAR-6ULCustomBoard (DART-6UL carrier), the file is arch/arm/boot/dts/imx6ul-imx6ull-var-dart-6ulcustomboard.dtsi.
In case of the Concerto-Board (VAR-SOM-6UL carrier), the file is arch/arm/boot/dts/imx6ul-imx6ull-var-som-concerto-board.dtsi.
The above will result in using the &fec1 node from the dtsi file of the SOM, as is (as the phy of the first Ethernet port is on the SOM), without adding the second port (which its phy is on the reference carrier board).
Notes:
- You can follow the "Build Linux from source code" guide to get the Linux kernel source, apply the above patch, build only the device trees and copy them to your SD card.