DART-MX8M Eth IEEE.1588: Difference between revisions
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{{PageHeader| | {{PageHeader|DART-MX8M - IEEE 1588 Hardware Timestamp}} {{DocImage|category1=Yocto|category2=DART-MX8M}} __toc__ | ||
= Overview of | = Overview of IEEE 1588 Hardware Timestamping = | ||
We recommend getting the basic overview of the IEE1588 and timestamping and basic terminologies. <br> | |||
Refer to https://elinux.org/images/f/f9/Introduction_to_IEEE_1588_Precision_Time_Protocol_%28PTP%29_Using_Embedded_Linux_Systems.pdf <br> | |||
At the very top level, it can be described as below<br> | |||
[[File:IEEE_1588_Basic_Overview.png]]<br> | |||
NXP Supports IEE1588 PTP implemented in the Ethernet SOC MAC layer.<br> | |||
[[File:IEEE_Block_Diagram_IMX6.png]]<br> | |||
Above diagram depicts the implementation of hardware timestamping at the SOC level.<br> | |||
The programmable Ethernet MAC with IEEE 1588 integrates a standard IEEE 802.3. controller<br> | |||
Ethernet MAC with a time-stamping module, with IEEE 1588 standard provides accurate.<br> | |||
clock synchronization for distributed control nodes for industrial automation applications.<br> | |||
NXP IEE1588 PTP and timer implementation have below features: | |||
* Allows reference clock to be chosen independently of network speed. | * Allows reference clock to be chosen independently of network speed. | ||
* Software-programmable precise time-stamping of ingress and egress frames | * Software-programmable precise time-stamping of ingress and egress frames. | ||
* Timer monitoring capabilities for system calibration and timing accuracy management | * Timer monitoring capabilities for system calibration and timing accuracy management. | ||
* Precise time-stamping of external events with programmable interrupt generation | * Precise time-stamping of external events with programmable interrupt generation. | ||
* Programmable event and interrupt generation for external system control | * Programmable event and interrupt generation for external system control. | ||
* Supports hardware | * Supports hardware and software-controllable timer synchronization. | ||
* Provides a 4-channel IEEE 1588 timer. Each channel supports input capture and output compare using the 1588 counter. | * Provides a 4-channel IEEE 1588 timer. Each channel supports input capture and output compare using the 1588 counter. | ||
* Distribution of precise time information over the | * Distribution of precise time information over the packet-based network. | ||
* Offers high accuracy (sub | * Offers high accuracy (in the sub-microsecond range) over the network. | ||
= Hardware Setup = | = Hardware Setup = | ||
*Connect Grand Master Clock Source | * Network Setup: Connect the PC/Grand Master Clock Source and the target to the same Ethernet network (and use ping to verify the connection between the PC and the target). | ||
= Software = | = Software = | ||
In the current setup, we will have <br> | |||
* PC - Grand Master which acts as the clock source which has the GPS clock synchronized<br> | |||
For Ubuntu 16.04 | Note: You may choose Device (i.MX8) as grandmaster clock as a device as well. <br> | ||
* Device - i.MX8 with IEE1588 HW timestamp support - of which local clock to be synchronized with grandmaster <br> | |||
Software utilities required for PTP | |||
$ ptp4l | |||
$ phc2sys | |||
For Ubuntu 16.04 | |||
$ sudo apt-get install linuxptp | $ sudo apt-get install linuxptp | ||
Start the software base timestamping on PC or to become grandmaster clock source which you want to synchronize.<br> | |||
Make sure you have following device tree change present on your kernel.<br> | |||
Due to pinmux enabling ENET1_EVENT1_IN and ENET1_EVENT1_OUT the I2C3 bus and intern rtc, touch camera won't work after applying below changes. <br> | |||
Here in this example, EVENT1_IN/OUT for HW time stamp capture I2C3 pins are muxed. <br> | |||
For more details about pinmux refer to : https://www.variscite.com/wp-content/uploads/2018/03/DART-MX8M-datasheet.pdf <br> | |||
<syntaxhighlight lang="diff"> | <syntaxhighlight lang="diff"> | ||
diff --git a/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi b/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi | diff --git a/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi b/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi | ||
index | index 9cb2e16..564838e 100644 | ||
--- a/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi | --- a/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi | ||
+++ b/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi | +++ b/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi | ||
@@ -182,6 +182, | @@ -182,6 +182,8 @@ | ||
MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 | |||
MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f | |||
MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 | |||
+ | + MX8MQ_IOMUXC_I2C2_SCL_ENET1_1588_EVENT1_IN 0x91 | ||
+ MX8MQ_IOMUXC_I2C2_SDA_ENET1_1588_EVENT1_OUT 0x1f | |||
+ | >; | ||
}; | |||
@@ -192,13 +194,6 @@ | |||
@@ -192, | >; | ||
}; | |||
- pinctrl_i2c2: i2c2grp { | |||
- | - fsl,pins = < | ||
- | - MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f | ||
- | - MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f | ||
- | - >; | ||
- | - }; | ||
- | - | ||
pinctrl_i2c3: i2c3grp { | |||
fsl,pins = < | |||
MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f | |||
@@ -612,8 +607,7 @@ | |||
@@ -612,8 + | |||
&i2c2 { | &i2c2 { | ||
clock-frequency = <100000>; | |||
pinctrl-names = "default"; | |||
- pinctrl-0 = <&pinctrl_i2c2>; | - pinctrl-0 = <&pinctrl_i2c2>; | ||
- status = "okay"; | - status = "okay"; | ||
+ status = "disabled"; | + status = "disabled"; | ||
/* DS1337 RTC module */ | /* DS1337 RTC module */ | ||
rtc@0x68 { | |||
</syntaxhighlight> | </syntaxhighlight> | ||
$ sudo ptp4l -i enp5s0 -m -S | $ sudo ptp4l -i enp5s0 -m -S | ||
- Here, in this case, the PC sends the timestamp using software timer | - Here, in this case, the PC sends the timestamp using software timer.<br> | ||
- The timestamp packets are sent over networking infrastructure via switch/router (IEEE 1588 packets) <br> | |||
and then once received on the target, it is used to synchronize the clock with 1μs accuracy. <br> | |||
- Hardware has the test and compares logic to see the drift and jitter. | |||
== Testing on device side == | |||
ptp4l works as a daemon service. It must be started first before any system level PTP client can work.<br> | |||
Yocto build already contains the ptp4l required resoureces on the target.<br> | |||
Run following commands on target<br> | |||
<pre> | <pre> | ||
root@imx8m-var-dart:~# ptp4l -H -A -l 7 -q -i eth0 -m -s & | root@imx8m-var-dart:~# ptp4l -H -A -l 7 -q -i eth0 -m -s & | ||
Line 394: | Line 417: | ||
</pre> | </pre> | ||
== | ==Testing on device side - (Local clock Synchronization)== | ||
The previous step allows the device to receive and make the HW time stamp available to the <br> | |||
Local clock source or application. | |||
phyc2sys utility works in conjunction with the ptp4l utility to synchronize the <br> | |||
local system clock with the grand master clock source. | |||
<pre> | <pre> | ||
root@ | root@imx8m-var-dart:~# phc2sys -s /dev/ptp0 -w -l 6 -q -m | ||
phc2sys[ | phc2sys[804.554]: phc offset 38575518 s0 freq -308888 delay 1800 | ||
phc2sys[805.555]: phc offset 38902105 s1 freq +17534 delay 1800 | |||
phc2sys[ | phc2sys[806.556]: phc offset -178199 s2 freq -160665 delay 1799 | ||
phc2sys[ | phc2sys[807.556]: phc offset -684742 s2 freq -720668 delay 1679 | ||
phc2sys[808.557]: phc offset -516208 s2 freq -757556 delay 1680 | |||
phc2sys[ | phc2sys[809.557]: phc offset -254722 s2 freq -650933 delay 1681 | ||
phc2sys[810.557]: phc offset -43678 s2 freq -516305 delay 1681 | |||
phc2sys[ | phc2sys[811.557]: phc offset 90145 s2 freq -395586 delay 1680 | ||
phc2sys[812.558]: phc offset 154311 s2 freq -304376 delay 1680 | |||
phc2sys[ | phc2sys[813.558]: phc offset 172880 s2 freq -239514 delay 1680 | ||
phc2sys[814.559]: phc offset 164583 s2 freq -195947 delay 1800 | |||
phc2sys[ | phc2sys[815.560]: phc offset 144197 s2 freq -166958 delay 1680 | ||
phc2sys[ | phc2sys[816.560]: phc offset 122841 s2 freq -145055 delay 1800 | ||
phc2sys[ | phc2sys[817.561]: phc offset 100375 s2 freq -130669 delay 1800 | ||
phc2sys[ | phc2sys[818.562]: phc offset 93657 s2 freq -107274 delay 1800 | ||
phc2sys[ | phc2sys[819.562]: phc offset 84861 s2 freq -87973 delay 1799 | ||
phc2sys[ | phc2sys[820.563]: phc offset 71653 s2 freq -75723 delay 1800 | ||
phc2sys[ | phc2sys[821.564]: phc offset 60032 s2 freq -65848 delay 1800 | ||
phc2sys[ | phc2sys[822.564]: phc offset 51986 s2 freq -55884 delay 1800 | ||
phc2sys[ | phc2sys[823.565]: phc offset 43689 s2 freq -48585 delay 1800 | ||
phc2sys[ | phc2sys[824.566]: phc offset 39007 s2 freq -40161 delay 1680 | ||
phc2sys[ | phc2sys[825.566]: phc offset 35763 s2 freq -31703 delay 1799 | ||
phc2sys[ | phc2sys[826.566]: phc offset 30914 s2 freq -25823 delay 1800 | ||
phc2sys[ | phc2sys[827.567]: phc offset 26962 s2 freq -20500 delay 1680 | ||
phc2sys[ | phc2sys[828.567]: phc offset 22675 s2 freq -16699 delay 1800 | ||
phc2sys[ | phc2sys[829.568]: phc offset 20563 s2 freq -12008 delay 1800 | ||
phc2sys[ | phc2sys[830.569]: phc offset 18836 s2 freq -7566 delay 1800 | ||
phc2sys[ | root@imx8m-var-dart:~# | ||
phc2sys[ | |||
phc2sys[ | |||
phc2sys[ | |||
phc2sys[ | |||
root@var- | |||
</pre> | </pre> | ||
Latest revision as of 04:39, 25 January 2019
Overview of IEEE 1588 Hardware Timestamping
We recommend getting the basic overview of the IEE1588 and timestamping and basic terminologies.
Refer to https://elinux.org/images/f/f9/Introduction_to_IEEE_1588_Precision_Time_Protocol_%28PTP%29_Using_Embedded_Linux_Systems.pdf
At the very top level, it can be described as below
NXP Supports IEE1588 PTP implemented in the Ethernet SOC MAC layer.
File:IEEE Block Diagram IMX6.png
Above diagram depicts the implementation of hardware timestamping at the SOC level.
The programmable Ethernet MAC with IEEE 1588 integrates a standard IEEE 802.3. controller
Ethernet MAC with a time-stamping module, with IEEE 1588 standard provides accurate.
clock synchronization for distributed control nodes for industrial automation applications.
NXP IEE1588 PTP and timer implementation have below features:
- Allows reference clock to be chosen independently of network speed.
- Software-programmable precise time-stamping of ingress and egress frames.
- Timer monitoring capabilities for system calibration and timing accuracy management.
- Precise time-stamping of external events with programmable interrupt generation.
- Programmable event and interrupt generation for external system control.
- Supports hardware and software-controllable timer synchronization.
- Provides a 4-channel IEEE 1588 timer. Each channel supports input capture and output compare using the 1588 counter.
- Distribution of precise time information over the packet-based network.
- Offers high accuracy (in the sub-microsecond range) over the network.
Hardware Setup
- Network Setup: Connect the PC/Grand Master Clock Source and the target to the same Ethernet network (and use ping to verify the connection between the PC and the target).
Software
In the current setup, we will have
- PC - Grand Master which acts as the clock source which has the GPS clock synchronized
Note: You may choose Device (i.MX8) as grandmaster clock as a device as well.
- Device - i.MX8 with IEE1588 HW timestamp support - of which local clock to be synchronized with grandmaster
Software utilities required for PTP
$ ptp4l $ phc2sys
For Ubuntu 16.04
$ sudo apt-get install linuxptp
Start the software base timestamping on PC or to become grandmaster clock source which you want to synchronize.
Make sure you have following device tree change present on your kernel.
Due to pinmux enabling ENET1_EVENT1_IN and ENET1_EVENT1_OUT the I2C3 bus and intern rtc, touch camera won't work after applying below changes.
Here in this example, EVENT1_IN/OUT for HW time stamp capture I2C3 pins are muxed.
For more details about pinmux refer to : https://www.variscite.com/wp-content/uploads/2018/03/DART-MX8M-datasheet.pdf
diff --git a/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi b/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi
index 9cb2e16..564838e 100644
--- a/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi
+++ b/arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi
@@ -182,6 +182,8 @@
MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
+ MX8MQ_IOMUXC_I2C2_SCL_ENET1_1588_EVENT1_IN 0x91
+ MX8MQ_IOMUXC_I2C2_SDA_ENET1_1588_EVENT1_OUT 0x1f
>;
};
@@ -192,13 +194,6 @@
>;
};
- pinctrl_i2c2: i2c2grp {
- fsl,pins = <
- MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f
- MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f
- >;
- };
-
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f
@@ -612,8 +607,7 @@
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c2>;
- status = "okay";
+ status = "disabled";
/* DS1337 RTC module */
rtc@0x68 {
$ sudo ptp4l -i enp5s0 -m -S
- Here, in this case, the PC sends the timestamp using software timer.
- The timestamp packets are sent over networking infrastructure via switch/router (IEEE 1588 packets)
and then once received on the target, it is used to synchronize the clock with 1μs accuracy.
- Hardware has the test and compares logic to see the drift and jitter.
Testing on device side
ptp4l works as a daemon service. It must be started first before any system level PTP client can work.
Yocto build already contains the ptp4l required resoureces on the target.
Run following commands on target
root@imx8m-var-dart:~# ptp4l -H -A -l 7 -q -i eth0 -m -s & ptp4l[787.055]: config item (null).assume_two_step is 0 ptp4l[787.055]: config item (null).check_fup_sync is 0 ptp4l[787.055]: config item (null).tx_timestamp_timeout is 1 ptp4l[787.055]: config item (null).clockClass is 248 ptp4l[787.055]: config item (null).clockAccuracy is 254 ptp4l[787.055]: config item (null).offsetScaledLogVariance is 65535 ptp4l[787.055]: config item (null).productDescription is ';;' ptp4l[787.055]: config item (null).revisionData is ';;' ptp4l[787.056]: config item (null).userDescription is '' ptp4l[787.056]: config item (null).manufacturerIdentity is '00:00:00' ptp4l[787.056]: config item (null).domainNumber is 0 ptp4l[787.056]: config item (null).slaveOnly is 1 ptp4l[787.056]: config item (null).twoStepFlag is 1 ptp4l[787.056]: config item (null).priority1 is 128 ptp4l[787.056]: config item (null).priority2 is 128 ptp4l[787.056]: config item (null).gmCapable is 1 ptp4l[787.056]: config item (null).gmCapable is 1 ptp4l[787.056]: config item (null).clock_servo is 0 ptp4l[787.056]: config item (null).time_stamping is 1 ptp4l[787.056]: config item (null).free_running is 0 ptp4l[787.056]: config item (null).time_stamping is 1 ptp4l[787.056]: config item (null).time_stamping is 1 ptp4l[787.056]: selected /dev/ptp0 as PTP clock ptp4l[787.056]: config item (null).time_stamping is 1 ptp4l[787.056]: config item (null).clock_servo is 0 ptp4l[787.056]: config item (null).uds_address is '/var/run/ptp4l' ptp4l[787.056]: section item /var/run/ptp4l.delay_mechanism now 0 ptp4l[787.056]: section item /var/run/ptp4l.network_transport now 0 ptp4l[787.056]: section item /var/run/ptp4l.delay_filter_length now 1 ptp4l[787.056]: config item (null).free_running is 0 ptp4l[787.056]: config item (null).freq_est_interval is 1 ptp4l[787.056]: config item (null).gmCapable is 1 ptp4l[787.056]: config item (null).kernel_leap is 1 ptp4l[787.056]: config item (null).timeSource is 160 ptp4l[787.056]: config item (null).pi_proportional_const is 0.000000 ptp4l[787.056]: config item (null).pi_integral_const is 0.000000 ptp4l[787.056]: config item (null).pi_proportional_scale is 0.000000 ptp4l[787.056]: config item (null).pi_proportional_exponent is -0.300000 ptp4l[787.056]: config item (null).pi_proportional_norm_max is 0.700000 ptp4l[787.056]: config item (null).pi_integral_scale is 0.000000 ptp4l[787.056]: config item (null).pi_integral_exponent is 0.400000 ptp4l[787.056]: config item (null).pi_integral_norm_max is 0.300000 ptp4l[787.056]: config item (null).step_threshold is 0.000000 ptp4l[787.056]: config item (null).first_step_threshold is 0.000020 ptp4l[787.056]: config item (null).max_frequency is 900000000 ptp4l[787.056]: config item (null).tsproc_mode is 0 ptp4l[787.056]: config item (null).delay_filter is 1 ptp4l[787.056]: config item (null).delay_filter_length is 10 ptp4l[787.056]: config item (null).summary_interval is 0 ptp4l[787.056]: config item (null).sanity_freq_limit is 200000000 ptp4l[787.056]: PI servo: sync interval 1.000 kp 0.700 ki 0.300000 ptp4l[787.056]: config item /var/run/ptp4l.boundary_clock_jbod is 0 ptp4l[787.056]: config item /var/run/ptp4l.network_transport is 0 ptp4l[787.056]: config item /var/run/ptp4l.delayAsymmetry is 0 ptp4l[787.056]: config item /var/run/ptp4l.follow_up_info is 0 ptp4l[787.056]: config item /var/run/ptp4l.freq_est_interval is 1 ptp4l[787.056]: config item /var/run/ptp4l.hybrid_e2e is 0 ptp4l[787.056]: config item /var/run/ptp4l.path_trace_enabled is 0 ptp4l[787.056]: config item /var/run/ptp4l.ingressLatency is 0 ptp4l[787.056]: config item /var/run/ptp4l.egressLatency is 0 ptp4l[787.057]: config item /var/run/ptp4l.delay_mechanism is 0 ptp4l[787.057]: config item /var/run/ptp4l.fault_badpeernet_interval is 16 ptp4l[787.057]: config item /var/run/ptp4l.fault_reset_interval is 4 ptp4l[787.057]: config item /var/run/ptp4l.tsproc_mode is 0 ptp4l[787.057]: config item /var/run/ptp4l.delay_filter is 1 ptp4l[787.057]: config item /var/run/ptp4l.delay_filter_length is 1 ptp4l[787.057]: config item eth0.boundary_clock_jbod is 0 ptp4l[787.057]: config item eth0.network_transport is 1 ptp4l[787.057]: config item eth0.delayAsymmetry is 0 ptp4l[787.057]: config item eth0.follow_up_info is 0 ptp4l[787.057]: config item eth0.freq_est_interval is 1 ptp4l[787.057]: config item eth0.hybrid_e2e is 0 ptp4l[787.057]: config item eth0.path_trace_enabled is 0 ptp4l[787.057]: config item eth0.ingressLatency is 0 ptp4l[787.057]: config item eth0.egressLatency is 0 ptp4l[787.057]: config item eth0.delay_mechanism is 0 ptp4l[787.057]: config item eth0.fault_badpeernet_interval is 16 ptp4l[787.057]: config item eth0.fault_reset_interval is 4 ptp4l[787.057]: config item eth0.tsproc_mode is 0 ptp4l[787.057]: config item eth0.delay_filter is 1 ptp4l[787.057]: config item eth0.delay_filter_length is 10 ptp4l[787.057]: config item eth0.logMinDelayReqInterval is 0 ptp4l[787.057]: config item eth0.logAnnounceInterval is 1 ptp4l[787.057]: config item eth0.announceReceiptTimeout is 3 ptp4l[787.057]: config item eth0.syncReceiptTimeout is 0 ptp4l[787.057]: config item eth0.transportSpecific is 0 ptp4l[787.057]: config item eth0.logSyncInterval is 0 ptp4l[787.057]: config item eth0.logMinPdelayReqInterval is 0 ptp4l[787.057]: config item eth0.neighborPropDelayThresh is 20000000 ptp4l[787.057]: config item eth0.min_neighbor_prop_delay is -20000000 ptp4l[787.057]: config item eth0.udp_ttl is 1 ptp4l[787.057]: driver changed our HWTSTAMP options ptp4l[787.058]: tx_type 1 not 1 ptp4l[787.058]: rx_filter 1 not 12 ptp4l[787.058]: port 1: INITIALIZING to LISTENING on INITIALIZE ptp4l[787.058]: config item /var/run/ptp4l.logMinDelayReqInterval is 0 ptp4l[787.058]: config item /var/run/ptp4l.logAnnounceInterval is 1 ptp4l[787.058]: config item /var/run/ptp4l.announceReceiptTimeout is 3 ptp4l[787.058]: config item /var/run/ptp4l.syncReceiptTimeout is 0 ptp4l[787.058]: config item /var/run/ptp4l.transportSpecific is 0 ptp4l[787.058]: config item /var/run/ptp4l.logSyncInterval is 0 ptp4l[787.058]: config item /var/run/ptp4l.logMinPdelayReqInterval is 0 ptp4l[787.058]: config item /var/run/ptp4l.neighborPropDelayThresh is 20000000 ptp4l[787.058]: config item /var/run/ptp4l.min_neighbor_prop_delay is -20000000 ptp4l[787.058]: config item (null).uds_address is '/var/run/ptp4l' ptp4l[787.058]: port 0: INITIALIZING to LISTENING on INITIALIZE ptp4l[787.088]: port 1: setting asCapable ptp4l[788.070]: port 1: new foreign master 1831bf.fffe.e0ee96-1 ptp4l[792.072]: selected best master clock 1831bf.fffe.e0ee96 ptp4l[792.073]: foreign master not using PTP timescale ptp4l[792.073]: port 1: LISTENING to UNCALIBRATED on RS_SLAVE ptp4l[792.337]: port 1: delay timeout ptp4l[792.338]: delay filtered 253400 raw 253400 ptp4l[793.093]: master offset -18761 s0 freq +17431 path delay 253400 ptp4l[793.161]: port 1: delay timeout ptp4l[793.163]: delay filtered 250342 raw 247284 ptp4l[794.093]: master offset -15677 s2 freq +20514 path delay 250342 ptp4l[794.093]: port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED ptp4l[794.832]: port 0: announce timeout ptp4l[794.832]: config item (null).uds_address is '/var/run/ptp4l' ptp4l[795.071]: port 1: delay timeout ptp4l[795.072]: delay filtered 247284 raw 245531 ptp4l[795.094]: master offset -17111 s2 freq +3403 path delay 247284 ptp4l[796.095]: master offset -2342 s2 freq +13038 path delay 247284 ptp4l[796.824]: port 1: delay timeout ptp4l[796.826]: delay filtered 246596 raw 245908 ptp4l[797.095]: master offset 2292 s2 freq +16970 path delay 246596 ptp4l[798.096]: master offset 2230 s2 freq +17595 path delay 246596 ptp4l[798.297]: port 1: delay timeout ptp4l[798.298]: delay filtered 247284 raw 247840 ptp4l[799.096]: master offset 1817 s2 freq +17851 path delay 247284 ptp4l[800.098]: master offset 664 s2 freq +17243 path delay 247284 ptp4l[800.245]: port 1: delay timeout ptp4l[800.247]: delay filtered 247323 raw 247362 ptp4l[800.854]: port 1: delay timeout ptp4l[800.856]: delay filtered 247362 raw 247863 ptp4l[800.960]: port 1: delay timeout ptp4l[800.962]: delay filtered 247323 raw 245850 ptp4l[800.989]: port 1: delay timeout ptp4l[800.991]: delay filtered 247284 raw 244362 ptp4l[801.098]: master offset 946 s2 freq +17725 path delay 247284 ptp4l[802.099]: master offset 58 s2 freq +17120 path delay 247284 ptp4l[802.259]: port 1: delay timeout ptp4l[802.260]: delay filtered 246596 raw 75420 ptp4l[802.805]: port 0: announce timeout ptp4l[802.805]: config item (null).uds_address is '/var/run/ptp4l' ptp4l[802.883]: port 1: delay timeout ptp4l[802.885]: delay filtered 245879 raw 245209 ptp4l[803.100]: master offset 1841 s2 freq +18921 path delay 245879 ptp4l[803.552]: port 0: setting asCapable ptp4l[803.869]: port 1: delay timeout ptp4l[803.871]: delay filtered 245740 raw 245631 ptp4l[804.100]: master offset -447 s2 freq +17185 path delay 245740 ptp4l[805.101]: master offset 473 s2 freq +17971 path delay 245740 ptp4l[805.657]: port 1: delay timeout ptp4l[805.658]: delay filtered 245879 raw 248128 ptp4l[806.088]: port 1: delay timeout ptp4l[806.089]: delay filtered 245740 raw 76947 ptp4l[806.102]: master offset -206 s2 freq +17434 path delay 245740 ptp4l[807.102]: master offset -205 s2 freq +17373 path delay 245740 ptp4l[807.310]: port 1: delay timeout ptp4l[807.311]: delay filtered 245740 raw 246000 ptp4l[808.102]: master offset -716 s2 freq +16801 path delay 245740 ptp4l[809.102]: master offset 152 s2 freq +17454 path delay 245740 ptp4l[809.227]: port 1: delay timeout ptp4l[809.229]: delay filtered 245740 raw 248291 ptp4l[809.253]: port 1: delay timeout ptp4l[809.255]: delay filtered 245740 raw 247458 ptp4l[809.483]: port 0: announce timeout ptp4l[809.484]: config item (null).uds_address is '/var/run/ptp4l' ptp4l[810.103]: master offset -202 s2 freq +17145 path delay 245740 ptp4l[810.943]: port 1: delay timeout ptp4l[810.945]: delay filtered 245815 raw 251457 ptp4l[811.104]: master offset -264 s2 freq +17023 path delay 245815 ptp4l[811.458]: port 1: delay timeout ptp4l[811.459]: delay filtered 246729 raw 249939 ptp4l[812.104]: master offset -1414 s2 freq +15794 path delay 246729 ptp4l[812.389]: port 1: delay timeout ptp4l[812.390]: delay filtered 246729 raw 244940 ptp4l[812.806]: port 1: delay timeout ptp4l[812.809]: delay filtered 246729 raw 244842 ptp4l[813.104]: master offset 560 s2 freq +17343 path delay 246729 ptp4l[814.105]: master offset 68 s2 freq +17019 path delay 246729 ptp4l[814.714]: port 1: delay timeout ptp4l[814.716]: delay filtered 246729 raw 244296 ptp4l[814.884]: port 1: delay timeout ptp4l[814.886]: delay filtered 246641 raw 247283 ptp4l[815.105]: master offset 932 s2 freq +17904 path delay 246641 ptp4l[815.978]: port 1: delay timeout ptp4l[815.981]: delay filtered 247370 raw 250300 ptp4l[816.106]: master offset -1437 s2 freq +15814 path delay 247370 ptp4l[816.445]: port 1: delay timeout ptp4l[816.446]: delay filtered 247370 raw 245339 ptp4l[817.106]: master offset 336 s2 freq +17156 path delay 247370 ptp4l[817.249]: port 0: announce timeout ptp4l[817.249]: config item (null).uds_address is '/var/run/ptp4l' ptp4l[817.486]: port 1: delay timeout ptp4l[817.489]: delay filtered 246689 raw 246095 ptp4l[818.106]: master offset 16 s2 freq +16937 path delay 246689 ptp4l[818.587]: port 1: delay timeout ptp4l[818.589]: delay filtered 245983 raw 245871 ptp4l[819.107]: master offset 2302 s2 freq +19228 path delay 245983 ptp4l[819.695]: port 1: delay timeout ptp4l[819.697]: delay filtered 245983 raw 247913 ptp4l[820.064]: port 1: delay timeout ptp4l[820.065]: delay filtered 245983 raw 246567 ptp4l[820.107]: master offset 156 s2 freq +17773 path delay 245983 ptp4l[820.891]: port 1: delay timeout ptp4l[820.893]: delay filtered 245983 raw 245284 ptp4l[821.107]: master offset -355 s2 freq +17308 path delay 245983 ptp4l[821.938]: port 1: delay timeout ptp4l[821.940]: delay filtered 246331 raw 253515 ptp4l[822.108]: master offset -1006 s2 freq +16551 path delay 246331 ptp4l[823.108]: master offset -1808 s2 freq +15447 path delay 246331 ptp4l[823.750]: port 1: delay timeout ptp4l[823.753]: delay filtered 246331 raw 245524 ptp4l[824.109]: master offset 1892 s2 freq +18605 path delay 246331 ptp4l[824.171]: port 1: delay timeout ptp4l[824.173]: delay filtered 246331 raw 246583 ptp4l[824.329]: port 0: announce timeout ptp4l[824.329]: config item (null).uds_address is '/var/run/ptp4l' ptp4l[825.109]: master offset 314 s2 freq +17594 path delay 246331 ptp4l[825.644]: port 1: delay timeout ptp4l[825.646]: delay filtered 245983 raw 243113 ptp4l[825.804]: port 1: delay timeout ptp4l[825.806]: delay filtered 246331 raw 246749 ptp4l[826.109]: master offset -231 s2 freq +17143 path delay 246331 ptp4l[826.141]: port 1: delay timeout ptp4l[826.143]: delay filtered 246219 raw 236069 ptp4l[827.110]: master offset -120 s2 freq +17185 path delay 246219 ptp4l[827.990]: port 1: delay timeout ptp4l[827.992]: delay filtered 246575 raw 247544 ptp4l[828.093]: port 1: delay timeout ptp4l[828.095]: delay filtered 246575 raw 462584 ptp4l[828.110]: master offset -1715 s2 freq +15554 path delay 246575 ptp4l[828.456]: port 1: delay timeout ptp4l[828.457]: delay filtered 246053 raw 239535 ptp4l[829.110]: master offset 1296 s2 freq +18051 path delay 246053 ptp4l[829.489]: port 1: delay timeout ptp4l[829.491]: delay filtered 246666 raw 250280 ptp4l[830.111]: master offset 595 s2 freq +17738 path delay 246666 ptp4l[830.467]: port 1: delay timeout ptp4l[830.469]: delay filtered 246666 raw 247352 ptp4l[831.111]: master offset -203 s2 freq +17119 path delay 246666 ptp4l[831.407]: port 1: delay timeout ptp4l[831.409]: delay filtered 247050 raw 247390 ptp4l[831.972]: port 0: announce timeout ptp4l[831.972]: config item (null).uds_address is '/var/run/ptp4l' ptp4l[832.112]: master offset -497 s2 freq +16764 path delay 247050 ptp4l[833.112]: master offset -1329 s2 freq +15783 path delay 247050 ptp4l[833.379]: port 1: delay timeout ptp4l[833.381]: delay filtered 247050 raw 245222 ptp4l[833.817]: port 1: delay timeout ptp4l[833.819]: delay filtered 247050 raw 245619 ptp4l[834.112]: master offset 695 s2 freq +17408 path delay 247050 ptp4l[835.113]: master offset -469 s2 freq +16453 path delay 247050 ptp4l[835.258]: port 1: delay timeout ptp4l[835.260]: delay filtered 247220 raw 247089 ptp4l[836.113]: master offset 1857 s2 freq +18638 path delay 247220 ptp4l[836.775]: port 1: delay timeout ptp4l[836.777]: delay filtered 247220 raw 235676 ptp4l[836.997]: port 1: delay timeout ptp4l[836.999]: delay filtered 246354 raw 245402 ptp4l[837.114]: master offset 791 s2 freq +18129 path delay 246354 ptp4l[837.621]: port 1: delay timeout ptp4l[837.623]: delay filtered 246354 raw 247791 ptp4l[838.114]: master offset -575 s2 freq +17000 path delay 246354 ptp4l[838.531]: port 1: delay timeout ptp4l[838.533]: delay filtered 246354 raw 244940 ptp4l[838.886]: port 1: delay timeout ptp4l[838.889]: delay filtered 246354 raw 248736 ptp4l[838.921]: port 0: announce timeout ptp4l[838.921]: config item (null).uds_address is '/var/run/ptp4l' ptp4l[839.114]: master offset -581 s2 freq +16822 path delay 246354 ptp4l[840.114]: master offset 413 s2 freq +17642 path delay 246354 ptp4l[840.842]: port 1: delay timeout ptp4l[840.844]: delay filtered 246269 raw 246920 ptp4l[841.115]: master offset -607 s2 freq +16746 path delay 246269 ptp4l[841.219]: port 1: delay timeout ptp4l[841.220]: delay filtered 245510 raw 72236 ptp4l[842.115]: master offset 1415 s2 freq +18585 path delay 245510 ptp4l[842.321]: port 1: delay timeout ptp4l[842.323]: delay filtered 246269 raw 250306 ptp4l[842.338]: port 1: delay timeout ptp4l[842.340]: delay filtered 246173 raw 245426 ptp4l[843.115]: master offset -469 s2 freq +17126 path delay 246173 ptp4l[843.599]: port 1: delay timeout ptp4l[843.601]: delay filtered 246173 raw 248747 ptp4l[844.115]: master offset -1057 s2 freq +16397 path delay 246173 ptp4l[845.115]: master offset 54 s2 freq +17191 path delay 246173 ptp4l[845.283]: port 1: delay timeout ptp4l[845.285]: delay filtered 247355 raw 248058 ptp4l[845.781]: port 0: announce timeout ptp4l[845.781]: config item (null).uds_address is '/var/run/ptp4l' ptp4l[846.116]: master offset -697 s2 freq +16456 path delay 247355 ptp4l[846.392]: port 1: delay timeout ptp4l[846.394]: delay filtered 247355 raw 246056 ptp4l[847.116]: master offset -621 s2 freq +16323 path delay 247355 ptp4l[847.863]: port 1: delay timeout ptp4l[847.865]: delay filtered 246495 raw 246070 ptp4l[848.116]: master offset 1203 s2 freq +17961 path delay 246495 ptp4l[848.682]: port 1: delay timeout ptp4l[848.683]: delay filtered 247489 raw 248451 ptp4l[848.932]: port 1: delay timeout ptp4l[848.934]: delay filtered 247298 raw 247677 ptp4l[849.116]: master offset -134 s2 freq +16985 path delay 247298 ptp4l[850.116]: master offset 367 s2 freq +17446 path delay 247298 ptp4l[850.691]: port 1: delay timeout ptp4l[850.693]: delay filtered 247690 raw 247703 ptp4l[851.117]: master offset -133 s2 freq +17056 path delay 247690 ptp4l[851.890]: port 1: delay timeout ptp4l[851.893]: delay filtered 247880 raw 249920 ptp4l[852.117]: master offset -461 s2 freq +16688 path delay 247880
Testing on device side - (Local clock Synchronization)
The previous step allows the device to receive and make the HW time stamp available to the
Local clock source or application.
phyc2sys utility works in conjunction with the ptp4l utility to synchronize the
local system clock with the grand master clock source.
root@imx8m-var-dart:~# phc2sys -s /dev/ptp0 -w -l 6 -q -m phc2sys[804.554]: phc offset 38575518 s0 freq -308888 delay 1800 phc2sys[805.555]: phc offset 38902105 s1 freq +17534 delay 1800 phc2sys[806.556]: phc offset -178199 s2 freq -160665 delay 1799 phc2sys[807.556]: phc offset -684742 s2 freq -720668 delay 1679 phc2sys[808.557]: phc offset -516208 s2 freq -757556 delay 1680 phc2sys[809.557]: phc offset -254722 s2 freq -650933 delay 1681 phc2sys[810.557]: phc offset -43678 s2 freq -516305 delay 1681 phc2sys[811.557]: phc offset 90145 s2 freq -395586 delay 1680 phc2sys[812.558]: phc offset 154311 s2 freq -304376 delay 1680 phc2sys[813.558]: phc offset 172880 s2 freq -239514 delay 1680 phc2sys[814.559]: phc offset 164583 s2 freq -195947 delay 1800 phc2sys[815.560]: phc offset 144197 s2 freq -166958 delay 1680 phc2sys[816.560]: phc offset 122841 s2 freq -145055 delay 1800 phc2sys[817.561]: phc offset 100375 s2 freq -130669 delay 1800 phc2sys[818.562]: phc offset 93657 s2 freq -107274 delay 1800 phc2sys[819.562]: phc offset 84861 s2 freq -87973 delay 1799 phc2sys[820.563]: phc offset 71653 s2 freq -75723 delay 1800 phc2sys[821.564]: phc offset 60032 s2 freq -65848 delay 1800 phc2sys[822.564]: phc offset 51986 s2 freq -55884 delay 1800 phc2sys[823.565]: phc offset 43689 s2 freq -48585 delay 1800 phc2sys[824.566]: phc offset 39007 s2 freq -40161 delay 1680 phc2sys[825.566]: phc offset 35763 s2 freq -31703 delay 1799 phc2sys[826.566]: phc offset 30914 s2 freq -25823 delay 1800 phc2sys[827.567]: phc offset 26962 s2 freq -20500 delay 1680 phc2sys[828.567]: phc offset 22675 s2 freq -16699 delay 1800 phc2sys[829.568]: phc offset 20563 s2 freq -12008 delay 1800 phc2sys[830.569]: phc offset 18836 s2 freq -7566 delay 1800 root@imx8m-var-dart:~#
HW Events
After kernel up, run commands:
$ ptp4l -A -4 -H -m -i eth0 & $ echo 1 > /sys/class/ptp/ptp0/pps_enable