DART-MX8M UART: Difference between revisions

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{{PageHeader|DART-MX8M - UART}} {{DocImage|category1=DART-MX8M|category2=Yocto}} __toc__
<!-- Set release according to "release" parameter in URL and use RELEASE_SUMO_V1.0_DART-MX8M as default
 
--> {{INIT_RELEASE_PARAM|RELEASE_SUMO_V1.0_DART-MX8M}}<!--
= DART-MX8M UART Overview =
--> {{#lst:Yocto_Platform_Customization|{{#var:RELEASE_PARAM}}}} <!--
All 4 UARTs on DART-MX8M are enabled by default. UART1 is connected to debug console, UART2 and UART3 are connected to header J12 on DART-MX8M carrier board, UART4 is connected to Bluetooth module. On DART-MX8M SoMs without WIFI/BT module UART4 is also connected to J12 header. See carrier board datasheet https://www.variscite.com/wp-content/uploads/2018/04/VAR-DT8MCustomBoard-Datasheet.pdf for the exact pinout. Only UART4 has RTS and CTS lines.
--> {{#lst:B2QT_Platform_Customization|{{#var:RELEASE_PARAM}}}} <!--
--> {{#lst:Android_Platform_Customization|{{#var:RELEASE_PARAM}}}} <!--
--> {{#lst:Debian_Platform_Customization|{{#var:RELEASE_PARAM}}}} <!--
--> {{PageHeader|{{#var:HARDWARE_NAME}} UART}} {{DocImage|category1=Yocto|category2=Android}}[[Category:Debian]][[Category:{{#var:HARDWARE_NAME}}]] __toc__
<!-- Set local variables
--> {{#vardefine:SHOW_DART_SECTION | <!--
-->    {{#switch:{{#var:HARDWARE_NAME}} | <!--
-->      DART-MX8M | <!--
-->      DART-MX8M-PLUS | <!--
-->      DART-MX8M-MINI = true | <!--
-->      false <!--
-->    }} <!--
--> }} <!--
--> {{#vardefine:SHOW_SYMPHONY_SECTION | <!--
-->    {{#switch:{{#var:HARDWARE_NAME}} | <!--
-->      DART-MX8M = false | <!--
-->      true <!--
-->    }} <!--
--> }} <!--
--> {{#vardefine:SYMPHONY_SOM_NAME | <!--
-->    {{#switch:{{#var:HARDWARE_NAME}} | <!--
-->      DART-MX8M-MINI = VAR-SOM-MX8M-MINI | <!--
-->      DART-MX8M-PLUS = VAR-SOM-MX8M-PLUS | <!--
-->      {{#var:HARDWARE_NAME}} <!--
-->    }} <!--
--> }} <!--
--> {{#vardefine:DTS_PATH | <!--
-->    {{#switch:{{#var:ANDROID_NAME}} | <!--
-->      Pie = {{#var:BUILD_FOLDER}}/{{#var:BUILD_FOLDER_ANDROID}}/variscite/kernel_imx/ | <!--
-->    }} <!--
--> }} <!--
--> {{#vardefine:DTS_NAME | <!--
-->    {{#switch:{{#var:HARDWARE_NAME}} | <!--
-->      DART-MX8M = {{#ifeq: {{#var:YOCTO_NAME}}|Morty|variscite/imx8m-var-dart-common.dtsi|freescale/fsl-imx8mq-var-dart-common.dtsi}} | <!--
-->      DART-MX8M-MINI = freescale/fsl-imx8mm-var-dart.dts | <!--
-->      VAR-SOM-MX8M-MINI = freescale/fsl-imx8mn-var-som.dts | <!--
-->      DART-MX8M-PLUS = freescale/imx8mp-var-dart.dts | <!--
-->      VAR-SOM-MX8M-PLUS = freescale/imx8mp-var-som.dts | <!--
-->      {{#var:HARDWARE_NAME}} <!--
-->    }} <!--
--> }}
= UART Overview =
{{#ifeq: {{#var:SHOW_DART_SECTION}}|true|
On '''{{#var:HARDWARE_NAME}}''' all 4 UARTs are enabled by default.<br>
UART1 is connected to debug console.<br>
UART2 and UART3 are connected to J12 header on VAR-DT8MCustomBoard.<br>
UART4 is connected to Bluetooth module.<br>
On {{#var:HARDWARE_NAME}} SoMs without WIFI/BT module UART4 is also connected to J12 header.<br>
See the [https://www.variscite.com/wp-content/uploads/2018/04/VAR-DT8MCustomBoard-Datasheet.pdf carrier board datasheet] for the exact pinout.<br>
Only UART4 has RTS and CTS lines.
|}}


{{#ifeq: {{#var:SHOW_SYMPHONY_SECTION}}|true|
On '''{{#var:SYMPHONY_SOM_NAME}}''' all 4 UARTs are enabled by default.<br>
{{#ifeq: {{#var:SYMPHONY_SOM_NAME}}|VAR-SOM-MX8M-PLUS|
UART1 is connected to J18 header.<br>
UART2 is connected to to debug console.<br>
UART3 is connected to Bluetooth module.<br>
UART4 is connected to J18 header.<br>
On {{#var:SYMPHONY_SOM_NAME}} SoMs without WIFI/BT module UART3 is also connected to J18 header.<br>
See the [https://www.variscite.com/wp-content/uploads/2019/07/Symphony-Board-Datasheet.pdf carrier board datasheet] for the exact pinout.<br>
Only UART3 has RTS and CTS lines.
|
UART1 is connected to J30 header on Symphony-Board (located on the back of the board).<br>
UART2 is connected to Bluetooth module.<br>
UART3 is connected to J18 header.<br>
UART4 is connected to debug console.<br>
On {{#var:SYMPHONY_SOM_NAME}} SoMs without WIFI/BT module UART2 is also connected to J18 header.<br>
See the [https://www.variscite.com/wp-content/uploads/2019/07/Symphony-Board-Datasheet.pdf carrier board datasheet] for the exact pinout.<br>
Only UART2 has RTS and CTS lines.
|}}}}
= UART naming under Linux =
= UART naming under Linux =


The Linux devices corresponding to UART1 - UART4 are /dev/ttymxc0 - /dev/ttymxc3 respectively.  
The Linux devices corresponding to UART1 - UART4 are /dev/ttymxc0 - /dev/ttymxc3 respectively.  


= Testing UART2 =
{{#ifeq: {{#var:SHOW_DART_SECTION}}|true|
= Testing UART2 on {{#var:HARDWARE_NAME}} =


Short J12.4 and J12.6 pins and run the following commands:
Short J12.4 and J12.6 pins and run the following commands:
Line 17: Line 87:
</pre>
</pre>


Each time you run echo command the "hello" string should appear on the terminal.
For each time you run this echo command the "hello" string should appear on the terminal.


= Testing UART3 =
= Testing UART3 on {{#var:HARDWARE_NAME}} =


Short J12.11 and J12.13 pins and run the following commands:
Short J12.11 and J12.13 pins and run the following commands:
Line 28: Line 98:
</pre>
</pre>


Each time you run echo command the "hello" string should appear on the terminal.
For each invocation of echo command the "hello" string should appear on the terminal.
|}}


= Using UART3 for console (instead of UART1) =
{{#ifeq: {{#var:SHOW_SYMPHONY_SECTION}}|true|
In the following example we use UART3 for console.<br>
= Testing UART3 on {{#var:SYMPHONY_SOM_NAME}} =
Other UART ports can be used, similarly.<br>


== Changes needed in U-Boot ==
Short J18.3 and J18.5 pins and run the following commands:
<pre>
stty -F /dev/ttymxc2 -echo -onlcr 115200
cat /dev/ttymxc2 &
echo hello > /dev/ttymxc2
</pre>


<syntaxhighlight lang="diff">
For each invocation of echo command the "hello" string should appear on the terminal.
Subject: [PATCH] mx6ul_var_dart: Use UART3 for console (instead of UART1)
|}}


---
= Disabling UART2 =
board/variscite/mx6ul_var_dart/mx6ul_var_dart.c | 8 ++++----
include/configs/mx6ul_var_dart.h                | 4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)


diff --git a/board/variscite/mx6ul_var_dart/mx6ul_var_dart.c b/board/variscite/mx6ul_var_dart/mx6ul_var_dart.c
To disable UART2 on '''{{#var:HARDWARE_NAME}}''' edit {{#var:DTS_PATH}}arch/arm64/boot/dts/{{#var:DTS_NAME}} under kernel source directory and modify
index 63a75ec..9d70851 100755
--- a/board/variscite/mx6ul_var_dart/mx6ul_var_dart.c
+++ b/board/variscite/mx6ul_var_dart/mx6ul_var_dart.c
@@ -162,9 +162,9 @@ int dram_init(void){
}
-static iomux_v3_cfg_t const uart1_pads[] = {
- MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+static iomux_v3_cfg_t const uart3_pads[] = {
+ MX6_PAD_UART3_TX_DATA__UART3_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX6_PAD_UART3_RX_DATA__UART3_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
static iomux_v3_cfg_t const usdhc1_pads[] = {
@@ -253,7 +253,7 @@ static void setup_gpmi_nand(void)
static void setup_iomux_uart(void)
{
- imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
+ imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
}
static struct fsl_esdhc_cfg usdhc_cfg[2] = {
diff --git a/include/configs/mx6ul_var_dart.h b/include/configs/mx6ul_var_dart.h
index 5313d17..88bc1a0 100755
--- a/include/configs/mx6ul_var_dart.h
+++ b/include/configs/mx6ul_var_dart.h
@@ -55,7 +55,7 @@
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART1_BASE
+#define CONFIG_MXC_UART_BASE UART3_BASE
/* MMC Configs */
#ifdef CONFIG_FSL_USDHC
@@ -169,7 +169,7 @@
        BOOT_ENV_SETTINGS \
"script=boot.scr\0" \
"image=zImage\0" \
- "console=ttymxc0\0" \
+ "console=ttymxc2\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"var_auto_fdt_file=Y\0" \
--
1.9.1


</syntaxhighlight>
<pre>
&uart2 {
        ...
        status = "okay";
};
</pre>


You can follow the "Build U-Boot from source code" guide to get the U-Boot source code and build it.<br>
to


== Changes needed in Yocto ==
<pre>
Edit the file: sources/meta-variscite-imx/conf/machine/imx6ul-var-dart.conf<br>
&uart2 {
and change the line:<br>
        ...
SERIAL_CONSOLE = "115200 ttymxc0"<br>
        status = "disabled";
to:<br>
};
SERIAL_CONSOLE = "115200 ttymxc2"<br>
</pre>
<br>
(or you can change it on the target in /etc/inittab)
 
= Disable the console =
Disabling the serial console completely is not recommended, as it makes it hard or even impossible to analyze errors such as a user interface crash or to get control of the system if it doesn't boot successfully.<br>
If you need to do it anyway, this is how.<br>
<br>
For Debian, the only changes needed are in U-Boot.<br>
 
== Changes needed in U-Boot ==
Applying the first patch only will still allow you to stop the boot process at U-Boot and get to the U-Boot command line.<br>
Applying the second patch will eliminate that also.<br>
 
<syntaxhighlight lang="diff">
Subject: [PATCH 1/2] mx6ul_var_dart: Silence console
 
---
board/variscite/mx6ul_var_dart/mx6ul_var_dart.c | 2 ++
include/configs/mx6ul_var_dart.h                | 8 +++++++-
2 files changed, 9 insertions(+), 1 deletion(-)
 
diff --git a/board/variscite/mx6ul_var_dart/mx6ul_var_dart.c b/board/variscite/mx6ul_var_dart/mx6ul_var_dart.c
index 59c4da7f8a..139b5bc216 100755
--- a/board/variscite/mx6ul_var_dart/mx6ul_var_dart.c
+++ b/board/variscite/mx6ul_var_dart/mx6ul_var_dart.c
@@ -966,8 +966,10 @@ void board_init_f(ulong dummy)
/* setup GP timer */
timer_init();
+#ifndef CONFIG_SPL_NO_CONSOLE
/* UART clocks enabled and gd valid - init serial console */
preloader_console_init();
+#endif
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
diff --git a/include/configs/mx6ul_var_dart.h b/include/configs/mx6ul_var_dart.h
index 5313d17c21..abbcb11620 100755
--- a/include/configs/mx6ul_var_dart.h
+++ b/include/configs/mx6ul_var_dart.h
@@ -93,6 +93,11 @@
#define CONFIG_POWER_PFUZE3000_I2C_ADDR  0x08
#endif
+#define CONFIG_SYS_DEVICE_NULLDEV
+#define CONFIG_SILENT_CONSOLE
+#define CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC
+#define CONFIG_SPL_NO_CONSOLE
+
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define NAND_BOOT_ENV_SETTINGS \
@@ -169,7 +174,8 @@
        BOOT_ENV_SETTINGS \
"script=boot.scr\0" \
"image=zImage\0" \
- "console=ttymxc0\0" \
+ "silent=1\0" \
+ "console=null\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"var_auto_fdt_file=Y\0" \
--
2.11.0
</syntaxhighlight>
 
<syntaxhighlight lang="diff">
Subject: [PATCH 2/2] mx6ul_var_dart: Autoboot with no delay and no check for
abort


---
Other UARTs can be disabled in the same manner.
include/configs/mx6ul_var_common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)


diff --git a/include/configs/mx6ul_var_common.h b/include/configs/mx6ul_var_common.h
{{#ifeq: {{#var:SYMPHONY_SOM_NAME}}|VAR-SOM-MX8M-MINI|
index 8556b257be..6139ec6d55 100644
To disable UART2 on '''{{#var:SYMPHONY_SOM_NAME}}''' edit {{#var:DTS_PATH}}arch/arm64/boot/dts/freescale/freescale/fsl-imx8mm-var-som.dts in the same manner.
--- a/include/configs/mx6ul_var_common.h
|}}
+++ b/include/configs/mx6ul_var_common.h
@@ -72,7 +72,7 @@
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#ifndef CONFIG_BOOTDELAY
-#define CONFIG_BOOTDELAY 1
+#define CONFIG_BOOTDELAY -2
#endif
/* allow to overwrite serial and ethaddr */
--
2.11.0
</syntaxhighlight>


== Changes needed in Yocto ==
= Configuring RS485 Half-Duplex =
Edit the file: sources/meta-variscite-imx/conf/machine/imx6ul-var-dart.conf<br>
{{#lst:Yocto_Platform_Customization|RS485_HALF_DUPLEX}}
and change the line:<br>
SERIAL_CONSOLE = "115200 ttymxc0"<br>
to:<br>
SERIAL_CONSOLE = ""<br>
<br>
(or you can change it on the target in /etc/inittab)

Latest revision as of 15:58, 7 February 2023

Warning: This page is designed to be used with a 'release' URL parameter.

This page is using the default release RELEASE_SUMO_V1.0_DART-MX8M.
To view this page for a specific Variscite SoM and software release, please follow these steps:

  1. Visit variwiki.com
  2. Select your SoM
  3. Select the software release
DART-MX8M UART

UART Overview

On DART-MX8M all 4 UARTs are enabled by default.
UART1 is connected to debug console.
UART2 and UART3 are connected to J12 header on VAR-DT8MCustomBoard.
UART4 is connected to Bluetooth module.
On DART-MX8M SoMs without WIFI/BT module UART4 is also connected to J12 header.
See the carrier board datasheet for the exact pinout.
Only UART4 has RTS and CTS lines.


UART naming under Linux

The Linux devices corresponding to UART1 - UART4 are /dev/ttymxc0 - /dev/ttymxc3 respectively.

Testing UART2 on DART-MX8M

Short J12.4 and J12.6 pins and run the following commands:

stty -F /dev/ttymxc1 -echo -onlcr 115200
cat /dev/ttymxc1 &
echo hello > /dev/ttymxc1

For each time you run this echo command the "hello" string should appear on the terminal.

Testing UART3 on DART-MX8M

Short J12.11 and J12.13 pins and run the following commands:

stty -F /dev/ttymxc2 -echo -onlcr 115200
cat /dev/ttymxc2 &
echo hello > /dev/ttymxc2

For each invocation of echo command the "hello" string should appear on the terminal.


Disabling UART2

To disable UART2 on DART-MX8M edit arch/arm64/boot/dts/freescale/fsl-imx8mq-var-dart-common.dtsi under kernel source directory and modify

&uart2 {
        ...
        status = "okay";
};

to

&uart2 {
        ...
        status = "disabled";
};

Other UARTs can be disabled in the same manner.


Configuring RS485 Half-Duplex

Each UART can be configured for RS485 Half-Duplex mode by using a GPIO pin to drive the receive and transmit enable inputs. This can be configured in the device tree by making the following changes to the uart node and replacing X, Y & Z with the proper values:

&uartX {                                                          /* Add RS485 properties to uartX */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uartX>, <&pinctrl_uartX_rs485>;     /* Add RS485 GPIO pinctrl */
	rts-gpios = <&gpioY Z GPIO_ACTIVE_LOW>;                   /* Add rts-gpios property */
	linux,rs485-enabled-at-boot-time;                         /* Enable RS485 at boot time to skip using TIOCSRS485 ioctl */
	status = "okay";
};

Next, configure the RS485 GPIO pin by adding pinctrl_uartX_rs485 to iomuxc. Replace X, GPIO_PIN_FUNCTION, and GPIO_PIN_SETTINGS with the proper values:

&iomuxc {
	pinctrl_uartX_rs485: uartXrs485 {
		fsl,pins = <
			GPIO_PIN_FUNCTION  GPIO_PIN_SETTINGS
		>;
	};
};

Note: For more information about configuring pins, please see i.MX Device Tree Pinmux Settings Guide


After making these changes, RS485 mode will be enabled by default and can be verified from the console by running the commands below. Replace N with the proper value, which is typically X-1 relative to the device tree node uartX:

# stty -F /dev/ttymxcN -echo -onlcr 115200
# echo hello > /dev/ttymxcN

The below logic analyzer capture shows the RS485 RX/TX enable line toggling when writing to the UART:

Rs485.png


Please refer to the Linux device tree bindings for more RS485 configuration options.