MX9 UART: Difference between revisions
No edit summary |
No edit summary |
||
Line 3: | Line 3: | ||
--> {{#lst:Yocto_Platform_Customization|{{#var:RELEASE_PARAM|RELEASE_DUNFELL_V1.1_VAR-SOM-MX8}}}} <!-- | --> {{#lst:Yocto_Platform_Customization|{{#var:RELEASE_PARAM|RELEASE_DUNFELL_V1.1_VAR-SOM-MX8}}}} <!-- | ||
--> {{COMMON_YOCTO_VARS}} <!-- | --> {{COMMON_YOCTO_VARS}} <!-- | ||
--> {{#vardefine:META_VARISCITE_GIT_HTTP|{{#replace:{{#var:META_VARISCITE_GIT}}|.git|}}}} <!-- | |||
--> {{PageHeader|{{#var:HARDWARE_NAME}} UART}} {{DocImage|category1=Yocto|category2={{#var:HARDWARE_NAME}}}} __toc__ | --> {{PageHeader|{{#var:HARDWARE_NAME}} UART}} {{DocImage|category1=Yocto|category2={{#var:HARDWARE_NAME}}}} __toc__ | ||
Line 34: | Line 35: | ||
| /dev/ttyLP4 | | /dev/ttyLP4 | ||
| lpuart5 | | lpuart5 | ||
| | | 1.8V Signal level, used on SOM for Bluetooth interface and can be accessible only if the [{{#var:META_VARISCITE_GIT_HTTP}}/blob/{{#var:META_VARISCITE_BRANCH}}/recipes-connectivity/bcm43xx-utils/bcm43xx-utils/imx93-var-som/variscite-bt variscite-bt] Systemd service is disabled or SOM without "WBD" and "WB" | ||
|- | |- | ||
| UART5 | | UART5 |
Revision as of 17:47, 20 January 2023
This page is using the default release mx93-yocto-kirkstone-5.15.71_2.2.0-v1.0.
To view this page for a specific Variscite SoM and software release, please follow these steps:
- Visit variwiki.com
- Select your SoM
- Select the software release
VAR-SOM-MX93 UART Overview
The VAR-SOM-MX93 exposes up to seven LPUART interfaces, some of which are multiplexed with other peripherals.
Serial Port | Device Node | Device Tree | Note |
---|---|---|---|
UART0 | /dev/ttyLP0 | lpuart1 | Connected to Symphony board serial console |
UART2 | /dev/ttyLP2 | lpuart3 | Disabled by default, see datasheet |
UART3 | /dev/ttyLP3 | lpuart4 | Disabled by default, see datasheet |
UART4 | /dev/ttyLP4 | lpuart5 | 1.8V Signal level, used on SOM for Bluetooth interface and can be accessible only if the variscite-bt Systemd service is disabled or SOM without "WBD" and "WB" |
UART5 | /dev/ttyLP5 | lpuart6 | Connected to Symphony board J18.7 and J18.9 |
UART6 | /dev/ttyLP6 | lpuart7 | Connected to Symphony board J18.3 and J18.5 |
UART7 | /dev/ttyLP7 | lpuart8 | Disabled by default, see datasheet |
Testing UART5
Short J18.7 and J18.9 pins and run the following commands:
# stty -F /dev/ttyLP5 -echo -onlcr 115200 # cat /dev/ttyLP5 & # echo hello > /dev/ttyLP5
For each invocation of echo command the "hello" string should appear on the terminal.
Testing UART6
Short J18.3 and J18.5 pins and run the following commands:
# stty -F /dev/ttyLP6 -echo -onlcr 115200 # cat /dev/ttyLP6 & # echo hello > /dev/ttyLP6
For each invocation of echo command the "hello" string should appear on the terminal.
Disabling UART5
To disable UART5 edit arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts under kernel source directory and modify
&lpuart6 { ... status = "okay"; };
to
&lpuart6 { ... status = "disabled"; };
Other UARTs can be disabled in a similar manner by referencing the table above.