MCUXpresso Platform Customization: Difference between revisions

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== Sections ==
== Sections ==
=== Available dtbs ===
<section begin=DART-MX8M_DTBS_SECTION/><!--
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded.
These device trees contain '''m4''' label in their name.
{| class="wikitable"
|-
! scope="col" | File Name<br/>
! scope="col" | Description<br/>
|-
| style="padding: 5px;"| Image.gz-fsl-imx8mq-var-dart-'''m4'''-emmc-wifi-hdmi.dtb
| style="padding: 5px;"| Device tree blob for eMMC, WIFI and HDMI display configuration. SD card disabled.
|-
| style="padding: 5px;"| Image.gz-fsl-imx8mq-var-dart-'''m4'''-emmc-wifi-lvds.dtb
| style="padding: 5px;"| Device tree blob for eMMC, WIFI and LVDS display configuration. SD card disabled.
|-
| style="padding: 5px;"| Image.gz-fsl-imx8mq-var-dart-'''m4'''-emmc-wifi-dual-display.dtb
| style="padding: 5px;"| Device tree blob for eMMC, WIFI and dual LVDS+HDMI display configuration. SD card disabled.
|-
| style="padding: 5px;"| Image.gz-fsl-imx8mq-var-dart-'''m4'''-sd-emmc-hdmi.dtb
| style="padding: 5px;"| Device tree blob for SD, eMMC and HDMI display configuration. WIFI disabled.
|-
| style="padding: 5px;"| Image.gz-fsl-imx8mq-var-dart-'''m4'''-sd-emmc-lvds.dtb
| style="padding: 5px;"| Device tree blob for SD, eMMC and LCDIF LVDS display configuration. WIFI disabled.
|-
| style="padding: 5px;"| Image.gz-fsl-imx8mq-var-dart-'''m4'''-sd-emmc-dual-display.dtb
| style="padding: 5px;"| Device tree blob for SD, eMMC and dual LVDS+HDMI display configuration. WIFI disabled.
|-
|}<!--
--><section end=DART-MX8M_DTBS_SECTION/>


=== Available Demos ===
=== Available Demos ===
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-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:DEMOS_SECTION|DART-MX8M_DEMOS_SECTION}}<!--
-->{{#vardefine:DEMOS_SECTION|DART-MX8M_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|DART-MX8M_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M_MEMORY-TYPES_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M_MEMORY-TYPES_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|DART-MX8M_JTAG_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|DART-MX8M_JTAG_SECTION}}<!--
Line 179: Line 212:
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''

Revision as of 20:48, 5 May 2019

DART-MX8M

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded.

These device trees contain m4 label in their name.

File Name
 Description
Image.gz-fsl-imx8mq-var-dart-m4-emmc-wifi-hdmi.dtb Device tree blob for eMMC, WIFI and HDMI display configuration. SD card disabled.
Image.gz-fsl-imx8mq-var-dart-m4-emmc-wifi-lvds.dtb Device tree blob for eMMC, WIFI and LVDS display configuration. SD card disabled.
Image.gz-fsl-imx8mq-var-dart-m4-emmc-wifi-dual-display.dtb Device tree blob for eMMC, WIFI and dual LVDS+HDMI display configuration. SD card disabled.
Image.gz-fsl-imx8mq-var-dart-m4-sd-emmc-hdmi.dtb Device tree blob for SD, eMMC and HDMI display configuration. WIFI disabled.
Image.gz-fsl-imx8mq-var-dart-m4-sd-emmc-lvds.dtb Device tree blob for SD, eMMC and LCDIF LVDS display configuration. WIFI disabled.
Image.gz-fsl-imx8mq-var-dart-m4-sd-emmc-dual-display.dtb Device tree blob for SD, eMMC and dual LVDS+HDMI display configuration. WIFI disabled.

Available Demos

  • driver_examples/i2c/interrupt_b2b_transfer/slave
  • driver_examples/i2c/interrupt_b2b_transfer/master
  • driver_examples/i2c/polling_b2b_transfer/slave
  • driver_examples/i2c/polling_b2b_transfer/master
  • driver_examples/wdog
  • driver_examples/gpio/led_output
  • driver_examples/tmu/tmu_monitor_report
  • driver_examples/pwm
  • driver_examples/uart/auto_baudrate_detect
  • driver_examples/uart/interrupt
  • driver_examples/uart/interrupt_rb_transfer
  • driver_examples/uart/polling
  • driver_examples/uart/interrupt_transfer
  • driver_examples/gpt/timer
  • driver_examples/gpt/capture
  • driver_examples/ecspi/ecspi_loopback
  • driver_examples/qspi/polling_transfer
  • driver_examples/rdc
  • driver_examples/sema4/uboot
  • rtos_examples/freertos_ecspi/ecspi_loopback
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_uart
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer
  • rtos_examples/freertos_i2c
  • cmsis_driver_examples/i2c/int_b2b_transfer/slave
  • cmsis_driver_examples/i2c/int_b2b_transfer/master
  • cmsis_driver_examples/uart/interrupt_transfer
  • cmsis_driver_examples/ecspi/int_loopback_transfer
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • demo_apps/hello_world

Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type M4 memory area A53 memory area memory lentgh linker file
DDR 0x80000000-0x801FFFFF (code)
0x80200000-0x803FFFFF (data)
0x80400000-0x80FFFFFF (data2) 		0x80000000-0x801FFFFF (code)
0x80200000-0x803FFFFF (data)
0x80400000-0x80FFFFFF (data2) 		16MB (DDR) MIMX8MQ6xxxJZ_cm4_ddr_ram.ld
TCM 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x80000000-0x80FFFFFF (data2) 		0x007E0000-0x007FFFFF (code)
0x00800000-0x0081FFFF (data)
0x80000000-0x80FFFFFF (data2) 		256kB (TCM) + 16MB (DDR) MIMX8MQ6xxxJZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (stripped: no symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (not stripped: symbols available)
  • debug: containing TCM binaries compiled in debug mode (stripped: no symbols available)
  • release: containing TCM binaries compiled in release mode (not stripped: symbols available)

Further details about memory mapping are available in i.MX 8M Applications Processors Reference Manual paragraphs:

  • 2.1.2 Cortex-A53 Memory Map (pag 496)
  • 2.1.3 Cortex-M4 Memory Map (pag 498)

JTAG

The VAR-DT8MCustomBoard exports the DART-MX8M JTAG signals through J29, a standard 1.27" 10 pin header.

Here the pinout

pin signal description pin signal description
1 JTAG_VREF JTAG IO reference voltage,
connects to SOM_NVCC_3V3. 		2 JTAG_TMS JTAG Mode Select signal
3 GND Digital Ground 4 JTAG_TCK JTAG Clock signal,
requires 10K pull down.
5 GND Digital Ground 6 JTAG_TDO JTAG Data Out signal
7 GND Digital Ground 8 JTAG_TDI JTAG Data In signal
9 JTAG_NTRST_C JTAG Reset signal 10 NRST_CON Programmer Reset,
used to put the SOC in reset state.

Please refer to board schematics for further details.

Releases

mcuxpresso-2.5.1-mx8mq-v1.0

DART-MX8M-MINI

Releases

mcuxpresso-2.5.0-mx8mm-v1.0

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This page was last edited on 5 May 2019, at 20:48.

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