View source for DART-MX8M-MINI Display

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= Introduction =
== MIPI-DSI and LVDS  ==
{{#var:HARDWARE_NAME}} SoC supports MIPI-DSI interface. {{#var:HARDWARE_NAME}} can be optionally equipped with SN65DSI84 MIPI-DSI to LVDS bridge.<br>
{{#var:HARDWARE_NAME}} carrier board comes with LVDS connectors, so you can easily connect LVDS display.<br>
Connecting MIPI-DSI display to {{#var:HARDWARE_NAME}} carrier board requires designing a custom connector.<br>

= Adding custom LVDS panel =
{{#var:HARDWARE_NAME}} evaluation kit comes with 800x480 LCD panel. {{#var:HARDWARE_NAME}} DTS file was created with this panel in mind.
To support your custom LVDS panel, you should make several modifications

== Referencing custom panel in the DTS file ==
The following code references Variscite panel in arch/arm64/boot/dts/freescale/{{#var:DEFAULT_DTB}} under kernel source tree

<pre>
	dsi_lvds_bridge: sn65dsi84@2c {
		compatible = "ti,sn65dsi83";
		reg = <0x2c>;
		ti,dsi-lanes = <1>;
		ti,lvds-format = <1>;
		ti,lvds-bpp = <24>;
		ti,width-mm = <154>;
		ti,height-mm = <87>;
		enable-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_lvds>;
		status = "okay";

		display-timings {
			lvds {
				clock-frequency = <33000000>;
				hactive = <800>;
				vactive = <480>;
				hback-porch = <40>;
				hfront-porch = <40>;
				vback-porch = <29>;
				vfront-porch = <13>;
				hsync-len = <48>;
				vsync-len = <3>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <1>;
				pixelclk-active = <0>;
			};
		};
        ...
        };
</pre>

You should modify the "ti,dsi-lanes", "ti,lvds-format", "ti,lvds-bpp", "ti,width-mm", "ti,height-mm" and "display-timings" properties to match your panel specification and rebuild the DTB file.<br>
To support a dual channel LVDS panel, please add "ti,lvds-channels = <2>".