VAR-SOM-MX6 GPIO: Difference between revisions

From Variscite Wiki
No edit summary
(41 intermediate revisions by 3 users not shown)
Line 1: Line 1:
{{PageHeader|VAR-SOM-MX6 - GPIO}} {{DocImage|category1=VAR-SOM-MX6|category2=Yocto}} __toc__
{{PageHeader|VAR-SOM-MX6 - GPIO}} {{DocImage|category1=VAR-SOM-MX6|category2=Yocto}} __toc__


= GPIO state =
The current state of the system's GPIOs can be obtained in user-mode, as shown in the following example:
<pre>
root@var-som-mx6:~# cat /sys/kernel/debug/gpio
GPIOs 0-31, platform/209c000.gpio, 209c000.gpio:
gpio-25  (phy-reset          ) out lo   
GPIOs 32-63, platform/20a0000.gpio, 20a0000.gpio:
GPIOs 64-95, platform/20a4000.gpio, 20a4000.gpio:
gpio-77  (ov5640_mipi_pwdn    ) out lo   
gpio-86  (usb_otg_vbus        ) out lo   
GPIOs 96-127, platform/20a8000.gpio, 20a8000.gpio:
gpio-101 (tlv320aic3x reset  ) out lo   
gpio-106 (ov5640_mipi_reset  ) out lo   
gpio-110 (2194000.usdhc cd    ) in  hi   
gpio-111 (2194000.usdhc ro    ) in  hi   
gpio-120 (spi_imx            ) out lo   
gpio-121 (ads7846_pendown    ) in  hi   
GPIOs 128-159, platform/20ac000.gpio, 20ac000.gpio:
gpio-141 (PCIe reset          ) out lo   


= GPIO state =
GPIOs 160-191, platform/20b0000.gpio, 20b0000.gpio:
The state of the GPIO can be obtained in user-mode, as shown in the following example:
gpio-178 (sysfs              ) out lo   
<pre>$ cat /sys/kernel/debug/gpio
 
GPIOs 192-223, platform/20b4000.gpio, 20b4000.gpio:
gpio-200 (wlan-en-regulator  ) out lo 
</pre>
 
Each GPIO is defined as in or out and the state is shown as lo or hi.<br>
For example pin 110 is the SD card card-detect.
When an SD card is plugged in, the state will be:
<pre>
gpio-110 (2194000.usdhc cd    ) in  lo
</pre>
When the SD card is removed, the state will be:
<pre>
gpio-110 (2194000.usdhc cd    ) in  hi
</pre>
 
= Manipulating a single GPIO via /sys/class/gpio =
== Using a command line or a script ==
GPIOs in i.MX are grouped in groups of 32 pins.<br>
For example, GPIO1_3 belong to the first group, pin 3. Its absolute number will be 3.<br>
GPIO7_4 will be (7-1)*32+4=196.<br>
Assuming this GPIO is defined in your device tree, the following is an example of how to use it from userspace.<br>
<br>
To export the GPIO for userspace use:
<pre>
# echo 196 > /sys/class/gpio/export
</pre>
<br>
To configure as output:
<pre>
# echo out > /sys/class/gpio/gpio196/direction
</pre>
Set GPIO high:
<pre>
# echo 1 > /sys/class/gpio/gpio196/value
</pre>
Set GPIO low:
<pre>
# echo 0 > /sys/class/gpio/gpio196/value
</pre>
<br>
To configure as input:
<pre>
# echo in > /sys/class/gpio/gpio196/direction
</pre>
Read the current value:
<pre>
# cat /sys/class/gpio/gpio196/value
</pre>
</pre>
For example:
<br/> root@var-som-mx6:~# cat /sys/kernel/debug/gpio
<br/>GPIOs 0-31, platform/209c000.gpio, 209c000.gpio:
<br/> gpio-25  (phy-reset          ) out lo 
<br/>GPIOs 32-63, platform/20a0000.gpio, 20a0000.gpio:
<br/>GPIOs 64-95, platform/20a4000.gpio, 20a4000.gpio:
<br/> gpio-77  (ov5640_mipi_pwdn    ) out lo   
<br/>GPIOs 96-127, platform/20a8000.gpio, 20a8000.gpio:
<br/> gpio-101 (tlv320aic3x reset  ) out lo   
<br/> gpio-106 (ov5640_mipi_reset  ) out lo   
<br/> gpio-110 (2194000.usdhc cd    ) in  lo   
<br/> gpio-111 (2194000.usdhc ro    ) in  lo   
<br/> gpio-120 (spi_imx            ) out lo   
<br/> gpio-121 (ads7846_pendown    ) in  hi   
<br/>GPIOs 128-159, platform/20ac000.gpio, 20ac000.gpio:
<br/> gpio-141 (PCIe reset          ) out lo   
<br/>GPIOs 160-191, platform/20b0000.gpio, 20b0000.gpio:
<br/> gpio-178 (sysfs              ) out lo   
<br/>GPIOs 192-223, platform/20b4000.gpio, 20b4000.gpio:
<br/> gpio-200 (wlan-en-regulator  ) out lo 
<br/>Each GPIO is defined as in or out and the state is shown as lo or hi.
<br>
<br>
<br/>For example pin 110 is the SDCARD card detect.
To free the GPIO after you're done using it:
<br/>For SDCARD removed the state will be:
<pre>
<br/>gpio-110 (2194000.usdhc cd    ) in  hi
# echo 196 > /sys/class/gpio/unexport
<br/>For SDCARD inserted the state will be:
</pre>
<br/>gpio-110 (2194000.usdhc cd    ) in  lo
 
== Manage GPIO from a C application ==
All of the command line operations above can be translated to C code:<br>
Reserve (export) the GPIO:<br>
<pre>
#define IMX_GPIO_NR(port, index)    ((((port)-1)*32)+((index)&31))
 
int fd;
char buf[MAX_BUF];
int gpio = IMX_GPIO_NR(7, 4); /* Just an example */
 
fd = open("/sys/class/gpio/export", O_WRONLY);
 
sprintf(buf, "%d", gpio);
 
write(fd, buf, strlen(buf));
 
close(fd);
</pre>
Set the GPIO direction:<br>
<pre>
sprintf(buf, "/sys/class/gpio/gpio%d/direction", gpio);


= Manipulating single GPIO via /sys/class/gpio =
fd = open(buf, O_WRONLY);
GPIO's in i.MX6 are grouped in groups of 32 pins.<br/>For example GPIO1_3 belong to the first group pin 3. His absolute number will be 3.
 
<br/>GPIO7_4 will be (7-1)*32+4=196.
/* Set out direction */
<br/>Lets assume that you defined this GPIO in the device tree. We will show in the following sections how to define it.
write(fd, "out", 3);
<br/>For output definition:
/* Set in direction */
<pre>$ echo 196 > /sys/class/gpio/export
write(fd, "in", 2);
$ echo out > /sys/class/gpio/gpio196/direction
 
close(fd);
</pre>
</pre>
In case of out direction set the GPIO value:
<pre>
<pre>
$ echo 1 > /sys/class/gpio/gpio196/value
sprintf(buf, "/sys/class/gpio/gpio%d/value", gpio);
$ echo 0 > /sys/class/gpio/gpio196/value
 
Will write into it 1/0 respectively.
fd = open(buf, O_WRONLY);
 
/* Set GPIO high status */
write(fd, "1", 1);
/* Set GPIO low status */
write(fd, "0", 1);
 
close(fd);
</pre>
</pre>
For input definition:
 
<pre>$ echo 196 > /sys/class/gpio/export
In case of in direction get the current GPIO value:
$ echo in> /sys/class/gpio/gpio196/direction
<pre>
char value;
 
sprintf(buf, "/sys/class/gpio/gpio%d/value", gpio);
 
fd = open(buf, O_RDONLY);
 
read(fd, &value, 1);
 
if (value == '0') {
    /* Current GPIO status low */
} else {
    /* Current GPIO status high */
}
 
close(fd);
</pre>
 
Once finished, free (unexport) the GPIO:
<pre>
fd = open("/sys/class/gpio/unexport", O_WRONLY);
 
sprintf(buf, "%d", gpio);
 
write(fd, buf, strlen(buf));
 
close(fd);
</pre>
</pre>
<pre>$ cat /sys/class/gpio/gpio196/value
 
Will read the value.
Important notes:<br>
* Remember that after the first read operation the file pointer will move to the next position in the file, so to get a correct value for each read operation you simply have to set the file pointer at the beginning of the file before read by using the following command:
<pre>
lseek(fd, 0, SEEK_SET);
</pre>
</pre>
* This is only a short example. If you want to use it in your code remember add error handling to it.


= Device Tree GPIO manipulation =
= Kernel Device Tree GPIO configuration =
== Device Tree GPIO files ==
== Device Tree GPIO files ==
=== Pin Func files ===
=== Pin Func files ===
In the Linux kernel in directory arch/arm/boot/dts/ you will find the pin functions files.
In the directory arch/arm/boot/dts/ of the Linux kernel source you will find the pin functions definitions files.<br>
<br/>The relevant files are: imx6dl-pinfunc.h, imx6ul-pinfunc.h, imx6q-pinfunc.h depend on the platform we are running.
The relevant files are imx6dl-pinfunc.h and imx6q-pinfunc.h, depending on the platform you are using.<br>
If you edit imx6q-pinfunc.h and search for GPIO7_IO04 for example you will see a group of pins with same prefix "MX6QDL_PAD_SD3_DAT0".
For example, if you edit imx6q-pinfunc.h and search for GPIO7_IO04, you will see a group of of definitions with same prefix (pad name), "MX6QDL_PAD_SD3_DAT0".
<br/>#define MX6QDL_PAD_SD3_DAT0__SD3_DATA0              0x2c0 0x6a8 0x000 0x0 0x0
<pre>
<br/>#define MX6QDL_PAD_SD3_DAT0__UART1_CTS_B            0x2c0 0x6a8 0x000 0x1 0x0
#define MX6QDL_PAD_SD3_DAT0__SD3_DATA0              0x2c0 0x6a8 0x000 0x0 0x0
<br/>#define MX6QDL_PAD_SD3_DAT0__UART1_RTS_B            0x2c0 0x6a8 0x91c 0x1 0x2
#define MX6QDL_PAD_SD3_DAT0__UART1_CTS_B            0x2c0 0x6a8 0x000 0x1 0x0
<br/>#define MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX            0x2c0 0x6a8 0x000 0x2 0x0
#define MX6QDL_PAD_SD3_DAT0__UART1_RTS_B            0x2c0 0x6a8 0x91c 0x1 0x2
<br/>#define MX6QDL_PAD_SD3_DAT0__GPIO7_IO04            0x2c0 0x6a8 0x000 0x5 0x0
#define MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX            0x2c0 0x6a8 0x000 0x2 0x0
<br/>Selecting one of them and writing it in the dts file will set the functionality required for this pin.
#define MX6QDL_PAD_SD3_DAT0__GPIO7_IO04            0x2c0 0x6a8 0x000 0x5 0x0
</pre>
Adding only the one with the GPIO7_IO04 suffix (function) to your dts file will let you use the pin as GPIO.
 
=== Variscite dts files ===
=== Variscite dts files ===
Variscite defines dts file for each platform.
Variscite defines dts file for each platform.
Line 122: Line 235:
|}
|}
imx6q-var-som.dts starts with definitions and includindg dtsi files.
imx6q-var-som.dts starts with definitions and includindg dtsi files.
<br/>#define VAR_SOM_MX6
<pre>
<br/>
#define VAR_SOM_MX6
<br/>#include "imx6q.dtsi"
 
<br/>#include "imx6qdl-var-som.dtsi"
#include "imx6q.dtsi"
#include "imx6qdl-var-som.dtsi"
</pre>
<br/>The imx6q.dtsi define the CPU platform and which pinfunc file will be included. This feature allow the pin name to be agnostic to the CPU type (i.MX6Q vs i.MX6DL)
<br/>The imx6q.dtsi define the CPU platform and which pinfunc file will be included. This feature allow the pin name to be agnostic to the CPU type (i.MX6Q vs i.MX6DL)
<br/>imx6qdl-var-som.dtsi has the major VAR-SOM-MX6 definitions.
<br/>imx6qdl-var-som.dtsi has the major VAR-SOM-MX6 definitions.


== Device Tree GPIO definition ==
== Define a pin as GPIO in the kernel Device Tree ==
<br/>First you need to modify the relevnt device tree and make sure your gpio is defined.
You need to add the relevant definitions to your device tree, as explained in the [[#Pin Func files|Pin Func files]] section above.<br>
<br/>For Example:
Edit arch/arm/boot/dts/imx6qdl-var-som.dtsi (or imx6qdl-var-dart.dtsi in case of DART-MX6) and add the definition for the GPIO you need in the section below.<br>
<br/>Edit arch/arm/boot/dts/imx6qdl-var-som.dtsi and in the section below:
<pre>
<br/>hog {
pinctrl-names = "default";
<br/>pinctrl_hog_1: hoggrp-1 {
pinctrl-0 = <&pinctrl_hog>;
<br/>fsl,pins = <
 
<br/>/* CTW6120 IRQ */
imx6qdl-var-som-mx6 {
<br/>MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x80000000
 
<br/>/* Touch */
pinctrl_hog: hoggrp {
<br/>/* for Bluetooth/wifi enable */
fsl,pins = <
<br/>/* SDMMC2 CD/WP */
/* PMIC INT */
<br/>MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
<br/>MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000
/* Wifi Slow Clock */
<br/>/* USBOTG ID pin */
MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0
<br/>/* PMIC INT */
/* Audio Clock */
<br/>MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
<br/>/* Wifi Slow Clock */
/* Camera Clock */
<br/>MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0 /* WIFI Slow clock */
MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x130b0
<br/>/* Audio Clock */
                                MX6QDL_PAD_KEY_ROW0__GPIO4_IO07                0x0b0b1
<br/>MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* Audio Codec Clock */
                                MX6QDL_PAD_KEY_COL1__GPIO4_IO08                0x0b0b1
<br/>/* Camera Clock */
 
<br/>MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x130b0 /* Camera MCLK */
>;
<br/>>;
};
<br/>};
</pre>
<br/>Add the relevant GPIO to the above section in the device tree.
 
=== Device Tree GPIO attribute ===
=== Device Tree GPIO attribute ===
If you look at Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt the number to the right of the pin control spec can be used for additional attributes like pull-ups, pull-downs, keepers, drive strength, etc.  
If you look at Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt in the Linux kernel source tree, the number to the right of the pin control spec can be used for additional attributes like pull-ups, pull-downs, keepers, drive strength, etc.<br>
<br/>The value 0x80000000 is don't know value please use the default".  
The value 0x80000000 is "don't know value please use the default". Otherwise, the value consists of a bitwise-OR combination of the following values.
Else use the table below to set it to the required value.
{| class="wikitable"
{| class="wikitable"
|-
|-
Line 228: Line 342:
|-
|-
|}
|}
== Device Tree GPIO default Value ==
The Bluetooth is a good example to see how to set the default value during boot.
[https://github.com/varigit/meta-variscite-mx6/blob/imx_3.14.38_6qp-var01/recipes-core/initscripts/var-som-mx6/variscite-bluetooth variscite-bluetooth]
<br>For example how to reset the Bluetooth:
<pre>
echo 178 >/sys/class/gpio/export
echo "out" > /sys/class/gpio/gpio178/direction
echo 0 > /sys/class/gpio/gpio178/value
sleep 1
echo 1 > /sys/class/gpio/gpio178/value
sleep 1
</pre>
You can also add it to your default build file system:
[https://github.com/varigit/meta-variscite-mx6/blob/imx_3.14.38_6qp-var01/recipes-core/initscripts/initscripts_%25.bbappend initscripts]

Revision as of 19:30, 20 July 2019

VAR-SOM-MX6 - GPIO

GPIO state

The current state of the system's GPIOs can be obtained in user-mode, as shown in the following example:

root@var-som-mx6:~# cat /sys/kernel/debug/gpio 
GPIOs 0-31, platform/209c000.gpio, 209c000.gpio:
 gpio-25  (phy-reset           ) out lo    

GPIOs 32-63, platform/20a0000.gpio, 20a0000.gpio:

GPIOs 64-95, platform/20a4000.gpio, 20a4000.gpio:
 gpio-77  (ov5640_mipi_pwdn    ) out lo    
 gpio-86  (usb_otg_vbus        ) out lo    

GPIOs 96-127, platform/20a8000.gpio, 20a8000.gpio:
 gpio-101 (tlv320aic3x reset   ) out lo    
 gpio-106 (ov5640_mipi_reset   ) out lo    
 gpio-110 (2194000.usdhc cd    ) in  hi    
 gpio-111 (2194000.usdhc ro    ) in  hi    
 gpio-120 (spi_imx             ) out lo    
 gpio-121 (ads7846_pendown     ) in  hi    

GPIOs 128-159, platform/20ac000.gpio, 20ac000.gpio:
 gpio-141 (PCIe reset          ) out lo    

GPIOs 160-191, platform/20b0000.gpio, 20b0000.gpio:
 gpio-178 (sysfs               ) out lo    

GPIOs 192-223, platform/20b4000.gpio, 20b4000.gpio:
 gpio-200 (wlan-en-regulator   ) out lo  

Each GPIO is defined as in or out and the state is shown as lo or hi.
For example pin 110 is the SD card card-detect. When an SD card is plugged in, the state will be:

 gpio-110 (2194000.usdhc cd    ) in  lo

When the SD card is removed, the state will be:

 gpio-110 (2194000.usdhc cd    ) in  hi 

Manipulating a single GPIO via /sys/class/gpio

Using a command line or a script

GPIOs in i.MX are grouped in groups of 32 pins.
For example, GPIO1_3 belong to the first group, pin 3. Its absolute number will be 3.
GPIO7_4 will be (7-1)*32+4=196.
Assuming this GPIO is defined in your device tree, the following is an example of how to use it from userspace.

To export the GPIO for userspace use:

# echo 196 > /sys/class/gpio/export


To configure as output:

# echo out > /sys/class/gpio/gpio196/direction

Set GPIO high:

# echo 1 > /sys/class/gpio/gpio196/value

Set GPIO low:

# echo 0 > /sys/class/gpio/gpio196/value


To configure as input:

# echo in > /sys/class/gpio/gpio196/direction

Read the current value:

# cat /sys/class/gpio/gpio196/value


To free the GPIO after you're done using it:

# echo 196 > /sys/class/gpio/unexport

Manage GPIO from a C application

All of the command line operations above can be translated to C code:
Reserve (export) the GPIO:

#define IMX_GPIO_NR(port, index)    ((((port)-1)*32)+((index)&31))

int fd;
char buf[MAX_BUF]; 
int gpio = IMX_GPIO_NR(7, 4); /* Just an example */

fd = open("/sys/class/gpio/export", O_WRONLY);

sprintf(buf, "%d", gpio); 

write(fd, buf, strlen(buf));

close(fd);

Set the GPIO direction:

sprintf(buf, "/sys/class/gpio/gpio%d/direction", gpio);

fd = open(buf, O_WRONLY);

/* Set out direction */
write(fd, "out", 3); 
/* Set in direction */
write(fd, "in", 2); 

close(fd);

In case of out direction set the GPIO value:

sprintf(buf, "/sys/class/gpio/gpio%d/value", gpio);

fd = open(buf, O_WRONLY);

/* Set GPIO high status */
write(fd, "1", 1); 
/* Set GPIO low status */
write(fd, "0", 1); 

close(fd);

In case of in direction get the current GPIO value:

char value;

sprintf(buf, "/sys/class/gpio/gpio%d/value", gpio);

fd = open(buf, O_RDONLY);

read(fd, &value, 1);

if (value == '0') { 
     /* Current GPIO status low */
} else {
     /* Current GPIO status high */
}

close(fd);

Once finished, free (unexport) the GPIO:

fd = open("/sys/class/gpio/unexport", O_WRONLY);

sprintf(buf, "%d", gpio);

write(fd, buf, strlen(buf));

close(fd);

Important notes:

  • Remember that after the first read operation the file pointer will move to the next position in the file, so to get a correct value for each read operation you simply have to set the file pointer at the beginning of the file before read by using the following command:
lseek(fd, 0, SEEK_SET);
  • This is only a short example. If you want to use it in your code remember add error handling to it.

Kernel Device Tree GPIO configuration

Device Tree GPIO files

Pin Func files

In the directory arch/arm/boot/dts/ of the Linux kernel source you will find the pin functions definitions files.
The relevant files are imx6dl-pinfunc.h and imx6q-pinfunc.h, depending on the platform you are using.
For example, if you edit imx6q-pinfunc.h and search for GPIO7_IO04, you will see a group of of definitions with same prefix (pad name), "MX6QDL_PAD_SD3_DAT0".

#define MX6QDL_PAD_SD3_DAT0__SD3_DATA0              0x2c0 0x6a8 0x000 0x0 0x0
#define MX6QDL_PAD_SD3_DAT0__UART1_CTS_B            0x2c0 0x6a8 0x000 0x1 0x0
#define MX6QDL_PAD_SD3_DAT0__UART1_RTS_B            0x2c0 0x6a8 0x91c 0x1 0x2
#define MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX            0x2c0 0x6a8 0x000 0x2 0x0
#define MX6QDL_PAD_SD3_DAT0__GPIO7_IO04             0x2c0 0x6a8 0x000 0x5 0x0

Adding only the one with the GPIO7_IO04 suffix (function) to your dts file will let you use the pin as GPIO.

Variscite dts files

Variscite defines dts file for each platform.

Device Tree Name
Include dtsi file
SOM type
Carrier Board type
LCD Type
Evaluation Kit name
imx6q-var-som.dts imx6qdl-var-som.dtsi VAR-SOM-MX6_V2 (Quad / Dual) VAR-MX6CustomBoard Capacitive/Resistive touch VAR-DVK-MX6_V2-PRO
VAR-STK-MX6_V2
imx6q-var-som-vsc.dts imx6qdl-var-som.dtsi VAR-SOM-MX6_V2 (Quad / Dual) VAR-SOLOCustomBoard Capacitive LVDS touch N/A
imx6dl-var-som.dts imx6qdl-var-som.dtsi VAR-SOM-MX6_V2 (DualLite/ Solo) VAR-MX6CustomBoard Capacitive/Resistive touch N/A
imx6dl-var-som-solo-vsc.dts imx6qdl-var-som.dtsi VAR-SOM-SOLO / VAR-SOM-DUAL VAR-SOLOCustomBoard Capacitive LVDS touch VAR-DVK-SOLO/DUAL VAR-STK-SOLO/DUAL
imx6dl-var-som-solo.dts imx6qdl-var-som.dtsi VAR-SOM-SOLO / VAR-SOM-DUAL VAR-MX6CustomBoard Capacitive/Resistive touch N/A
imx6q-var-dart.dts imx6qdl-var-dart.dtsi VAR-SOM-SOLO / VAR-SOM-DUAL VAR-DT6CustomBoard Capacitive LVDS touch VAR-STK-DT6.VAR-DVK-DT6

imx6q-var-som.dts starts with definitions and includindg dtsi files.

#define VAR_SOM_MX6

#include "imx6q.dtsi"
#include "imx6qdl-var-som.dtsi"


The imx6q.dtsi define the CPU platform and which pinfunc file will be included. This feature allow the pin name to be agnostic to the CPU type (i.MX6Q vs i.MX6DL)
imx6qdl-var-som.dtsi has the major VAR-SOM-MX6 definitions.

Define a pin as GPIO in the kernel Device Tree

You need to add the relevant definitions to your device tree, as explained in the Pin Func files section above.
Edit arch/arm/boot/dts/imx6qdl-var-som.dtsi (or imx6qdl-var-dart.dtsi in case of DART-MX6) and add the definition for the GPIO you need in the section below.

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6qdl-var-som-mx6 {

		pinctrl_hog: hoggrp {
			fsl,pins = <
				/* PMIC INT */
				MX6QDL_PAD_GPIO_17__GPIO7_IO12			0x80000000
				/* Wifi Slow Clock */
				MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT		0x000b0
				/* Audio Clock */
				MX6QDL_PAD_GPIO_0__CCM_CLKO1 			0x130b0
				/* Camera Clock */
				MX6QDL_PAD_GPIO_3__CCM_CLKO2			0x130b0
                                MX6QDL_PAD_KEY_ROW0__GPIO4_IO07                 0x0b0b1
                                MX6QDL_PAD_KEY_COL1__GPIO4_IO08                 0x0b0b1

			>;
		};

Device Tree GPIO attribute

If you look at Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt in the Linux kernel source tree, the number to the right of the pin control spec can be used for additional attributes like pull-ups, pull-downs, keepers, drive strength, etc.
The value 0x80000000 is "don't know value please use the default". Otherwise, the value consists of a bitwise-OR combination of the following values.

CONFIG bits definition
value
PAD_CTL_HYS (1 << 16)
PAD_CTL_PUS_100K_DOWN (0 << 14)
PAD_CTL_PUS_47K_UP (1 << 14)
PAD_CTL_PUS_100K_UP (2 << 14)
PAD_CTL_PUS_22K_UP (3 << 14)
PAD_CTL_PUE (1 << 13)
PAD_CTL_PKE (1 << 12)
PAD_CTL_ODE (1 << 11)
PAD_CTL_SPEED_LOW (1 << 6)
PAD_CTL_SPEED_MED (2 << 6)
PAD_CTL_SPEED_HIGH (3 << 6)
PAD_CTL_DSE_DISABLE (0 << 3)
PAD_CTL_DSE_240ohm (1 << 3)
PAD_CTL_DSE_120ohm (2 << 3)
PAD_CTL_DSE_80ohm (3 << 3)
PAD_CTL_DSE_60ohm (4 << 3)
PAD_CTL_DSE_48ohm (5 << 3)
PAD_CTL_DSE_40ohm (6 << 3)
PAD_CTL_DSE_34ohm (7 << 3)
PAD_CTL_SRE_FAST (1 << 0)
PAD_CTL_SRE_SLOW (0 << 0)

Device Tree GPIO default Value

The Bluetooth is a good example to see how to set the default value during boot. variscite-bluetooth
For example how to reset the Bluetooth:

echo 178 >/sys/class/gpio/export
echo "out" > /sys/class/gpio/gpio178/direction
echo 0 > /sys/class/gpio/gpio178/value
sleep 1
echo 1 > /sys/class/gpio/gpio178/value
sleep 1

You can also add it to your default build file system: initscripts