Difference between revisions of "MX8M GPIO"

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{{PageHeader|DART-MX8M- GPIO}} {{DocImage|category1=DART-MX8M|category2=Yocto}} __toc__
+
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--> {{#vardefine:RELEASE_PARAM|{{#urlget:release|RELEASE_SUMO_V1.0_DART-MX8M}}}} <!--
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--> {{#lst:Yocto_Platform_Customization|{{#var:RELEASE_PARAM}}}} <!--
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--> {{#lst:B2QT_Platform_Customization|{{#var:RELEASE_PARAM}}}} <!--
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--> {{#lst:Android_Platform_Customization|{{#var:RELEASE_PARAM}}}} <!--
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--> {{PageHeader|{{#var:HARDWARE_NAME}} GPIO}} {{DocImage|category1=Yocto|category2=Android}}[[Category:Debian]][[Category:{{#var:HARDWARE_NAME}}]] __toc__
  
 
= GPIO state =
 
= GPIO state =
 
The current state of the system's GPIOs can be obtained in user-mode, as shown in the following example:
 
The current state of the system's GPIOs can be obtained in user-mode, as shown in the following example:
 +
{{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M |
 
<pre>
 
<pre>
root@imx8m-var-dart:~# cat /sys/kernel/debug/gpio
+
# cat /sys/kernel/debug/gpio
 
gpiochip0: GPIOs 0-31, parent: platform/30200000.gpio, 30200000.gpio:
 
gpiochip0: GPIOs 0-31, parent: platform/30200000.gpio, 30200000.gpio:
 
  gpio-8  (                    |eth_phy_pwr        ) out hi     
 
  gpio-8  (                    |eth_phy_pwr        ) out hi     
Line 23: Line 29:
 
  gpio-114 (                    |Up                  ) in  hi IRQ
 
  gpio-114 (                    |Up                  ) in  hi IRQ
 
</pre>
 
</pre>
 +
| {{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M-MINI |
 +
<pre>
 +
# cat /sys/kernel/debug/gpio
 +
gpiochip0: GPIOs 0-31, parent: platform/30200000.gpio, 30200000.gpio:
 +
gpio-7  (                    |eth_phy_pwr        ) out lo   
 +
gpio-9  (                    |phy-reset          ) out hi   
 +
 +
gpiochip1: GPIOs 32-63, parent: platform/30210000.gpio, 30210000.gpio:
 +
gpio-38  (                    |sysfs              ) out hi   
 +
gpio-39  (                    |sysfs              ) out hi   
 +
gpio-42  (                    |sysfs              ) out hi   
 +
gpio-43  (                    |enable              ) out hi   
 +
gpio-44  (                    |cd                  ) in  lo IRQ
 +
gpio-51  (                    |VSD_3V3            ) out hi   
 +
gpio-52  (                    |sysfs              ) out lo   
 +
 +
gpiochip2: GPIOs 64-95, parent: platform/30220000.gpio, 30220000.gpio:
 +
 +
gpiochip3: GPIOs 96-127, parent: platform/30230000.gpio, 30230000.gpio:
 +
gpio-102 (                    |Back                ) in  hi IRQ
 +
gpio-104 (                    |ov5640_mipi_pwdn    ) out lo   
 +
gpio-109 (                    |Home                ) in  hi IRQ
 +
gpio-111 (                    |Down                ) in  hi IRQ
 +
gpio-113 (                    |eMMC                ) out lo   
 +
gpio-114 (                    |Up                  ) in  hi IRQ
 +
 +
gpiochip4: GPIOs 128-159, parent: platform/30240000.gpio, 30240000.gpio:
 +
gpio-133 (                    |sysfs              ) out lo   
 +
gpio-137 (                    |spi_imx            ) in  lo   
 +
gpio-156 (                    |ov5640_mipi_reset  ) out hi
 +
</pre>
 +
| {{#ifeq: {{#var:HARDWARE_NAME}} | VAR-SOM-MX8M-NANO |
 +
<pre>
 +
# cat /sys/kernel/debug/gpio
 +
gpiochip0: GPIOs 0-31, parent: platform/30200000.gpio, 30200000.gpio:
 +
gpio-0  (                    |spi_imx            ) out hi   
 +
gpio-9  (                    |phy-reset          ) out hi   
 +
gpio-10  (                    |connect            ) in  hi IRQ
 +
gpio-13  (                    |ov5640_mipi_reset  ) out hi   
 +
gpio-14  (                    |spi_imx            ) in  lo   
 +
 +
gpiochip1: GPIOs 32-63, parent: platform/30210000.gpio, 30210000.gpio:
 +
gpio-38  (                    |sysfs              ) out hi   
 +
gpio-39  (                    |sysfs              ) out hi   
 +
gpio-41  (                    |eth_phy_pwr        ) out hi   
 +
gpio-42  (                    |sysfs              ) out hi   
 +
gpio-43  (                    |enable              ) out hi   
 +
gpio-44  (                    |cd                  ) in  lo IRQ
 +
gpio-51  (                    |VSD_3V3            ) out hi   
 +
gpio-52  (                    |sysfs              ) out hi   
 +
 +
gpiochip2: GPIOs 64-95, parent: platform/30220000.gpio, 30220000.gpio:
 +
 +
gpiochip3: GPIOs 96-127, parent: platform/30230000.gpio, 30230000.gpio:
 +
 +
gpiochip4: GPIOs 128-159, parent: platform/30240000.gpio, 30240000.gpio:
 +
gpio-133 (                    |sysfs              ) out lo   
 +
gpio-140 (                    |ov5640_mipi_pwdn    ) out lo   
 +
 +
gpiochip6: GPIOs 502-503, parent: spi/spi0.1, spi0.1, can sleep:
 +
 +
gpiochip5: GPIOs 504-511, parent: i2c/1-0020, pca9534, can sleep:
 +
gpio-504 (                    |Heartbeat          ) out lo   
 +
gpio-505 (                    |Back                ) in  hi IRQ
 +
gpio-506 (                    |Home                ) in  hi IRQ
 +
gpio-507 (                    |Menu                ) in  hi IRQ
 +
gpio-508 (                    |usb3_sel            ) out hi   
 +
gpio-509 (                    |enet_rst            ) out lo   
 +
gpio-510 (                    |som_vsel            ) out lo   
 +
gpio-511 (                    |enet_sel            ) out lo   
 +
</pre>
 +
| {{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M-PLUS |
 +
<pre>
 +
gpiochip0: GPIOs 0-31, parent: platform/30200000.gpio, 30200000.gpio:
 +
gpio-5  (                    |hdmi_on            ) out lo
 +
gpio-7  (                    |ads7846_pendown    ) in  hi IRQ
 +
gpio-10  (                    |int                ) in  hi IRQ
 +
gpio-12  (                    |spi_imx            ) out hi
 +
 +
gpiochip1: GPIOs 32-63, parent: platform/30210000.gpio, 30210000.gpio:
 +
gpio-38  (                    |sysfs              ) out hi
 +
gpio-39  (                    |sysfs              ) out hi
 +
gpio-40  (                    |sysfs              ) out hi
 +
gpio-41  (                    |sysfs              ) out lo
 +
gpio-42  (                    |spi_imx            ) out hi
 +
gpio-44  (                    |cd                  ) in  lo IRQ ACTIVE LOW
 +
gpio-51  (                    |regulator-usdhc2-vmm) out hi
 +
gpio-52  (                    |regulator-eqos-phy-p) out hi
 +
 +
gpiochip2: GPIOs 64-95, parent: platform/30220000.gpio, 30220000.gpio:
 +
 +
gpiochip3: GPIOs 96-127, parent: platform/30230000.gpio, 30230000.gpio:
 +
gpio-101 (                    |reset              ) out hi ACTIVE LOW
 +
gpio-102 (                    |Back                ) in  hi IRQ ACTIVE LOW
 +
gpio-104 (                    |powerdown          ) out hi
 +
gpio-105 (                    |powerdown          ) out hi
 +
gpio-108 (                    |reset              ) out hi ACTIVE LOW
 +
gpio-109 (                    |Home                ) in  hi IRQ ACTIVE LOW
 +
gpio-111 (                    |Down                ) in  hi IRQ ACTIVE LOW
 +
gpio-113 (                    |eMMC                ) out lo
 +
gpio-114 (                    |Up                  ) in  hi IRQ ACTIVE LOW
 +
 +
gpiochip4: GPIOs 128-159, parent: platform/30240000.gpio, 30240000.gpio:
 +
gpio-137 (                    |spi_imx            ) out hi
 +
gpio-142 (                    |scl                ) out lo
 +
gpio-143 (                    |sda                ) in  lo
 +
gpio-144 (                    |scl                ) out lo
 +
gpio-145 (                    |sda                ) in  lo
 +
gpio-146 (                    |scl                ) out lo
 +
gpio-147 (                    |sda                ) in  lo
 +
gpio-148 (                    |scl                ) out lo
 +
gpio-149 (                    |sda                ) in  lo
 +
gpio-156 (                    |reset              ) out hi ACTIVE LOW
 +
</pre>
 +
|}} }} }} }}
  
 
Each GPIO is defined as in or out and the state is shown as lo or hi.<br>
 
Each GPIO is defined as in or out and the state is shown as lo or hi.<br>
Line 34: Line 155:
 
  gpio-44  (                    |cd                  ) in  hi IRQ
 
  gpio-44  (                    |cd                  ) in  hi IRQ
 
</pre>
 
</pre>
 +
 +
= Manipulating GPIO using libgpiod =
 +
<section begin=libgpiod_section/><!--
 +
-->{{#vardefine:LIBGPIOD_URL|https://git.kernel.org/pub/scm/libs/libgpiod/libgpiod.git/}}<!--
 +
-->The Linux GPIO sysfs interface is being deprecated. Moving forward, user space should use the character device <code>/dev/gpiochip*</code> instead. libgpiod provides bindings and utilities for for manipulating GPIO via user space.
 +
 +
== libgpiod via command line ==
 +
 +
[{{#var:LIBGPIOD_URL}} libgpiod] provides command line utilities for GPIO:
 +
 +
{| class="wikitable"
 +
|-
 +
| '''gpiodetect'''
 +
| List all gpiochips present on the system, their names, labels and number of GPIO lines
 +
|-
 +
| '''gpioinfo'''
 +
| List all lines of specified gpiochips, their names, consumers, direction, active state and additional flags
 +
|-
 +
| '''gpioget'''
 +
| Read values of specified GPIO lines
 +
|-
 +
| '''gpioset'''
 +
| Set values of specified GPIO lines, potentially keep the lines exported and wait until timeout, user input or signal
 +
|-
 +
| '''gpiofind'''
 +
| Find the gpiochip name and line offset given the line name
 +
|-
 +
| '''gpiomon'''
 +
| Wait for events on GPIO lines, specify which events to watch, how many events to process before exiting or if the events should be reported to the console
 +
|}
 +
 +
i.MX GPIOs are organized in banks of 32 pins. Each bank corresponds to a character device <code>/dev/gpiochip<bank index></code>. The <code>gpiodetect</code> utility can be used to inspect the available gpiochip character devices:
 +
 +
# gpiodetect
 +
gpiochip0 [30200000.gpio] (32 lines)
 +
gpiochip1 [30210000.gpio] (32 lines)
 +
...
 +
 +
The <code>gpioinfo</code> utility can be used to inspect the lines for a given gpiochip:
 +
 +
# gpioinfo gpiochip0
 +
gpiochip0 - 32 lines:
 +
        line  0:      unnamed    "spi_imx"  output  active-high [used]
 +
        line  1:      unnamed      unused  input  active-high
 +
        line  2:      unnamed      unused  input  active-high
 +
        ...
 +
 +
The <code>gpioset</code> and <code>gpioget</code> utilities can be used to manipulate GPIO from the command line.
 +
 +
For example, assuming GPIO4_21 is configured as a GPIO in your device tree:
 +
 +
Set GPIO4_21 high:
 +
gpioset gpiochip3 21=1
 +
 +
Set GPIO4_21 low:
 +
gpioset gpiochip3 21=0
 +
 +
Read GPIO4_21:
 +
gpioget gpiochip3 21
 +
 +
== libgpiod C Application ==
 +
 +
[{{#var:LIBGPIOD_URL}} libgpiod] provides bindings for C/C++ applications. C++ examples are available in the libgpiod [{{#var:LIBGPIOD_URL}}/tree/bindings/cxx/examples /tree/bindings/cxx/examples ] directory.
 +
 +
Below is a simple C application demonstrating how to use the bindings with GPIO4_IO21:
 +
 +
'''Makefile:'''
 +
all: main.cpp
 +
$(CC) $(CCFLAGS) -Og -lgpiod main.c -g -o hello.bin
 +
clean:
 +
rm -f hello.bin
 +
 +
'''main.c'''
 +
<pre>
 +
#include <gpiod.h>
 +
#include <stdio.h>
 +
#include <unistd.h>
 +
#include <stdlib.h>
 +
#include <string.h>
 +
 +
#define    CONSUMER    "Variscite Demo"
 +
 +
int main(int argc, char **argv)
 +
{
 +
    unsigned int i, ret, val;
 +
    struct gpiod_chip *chip;
 +
    struct gpiod_line *line;
 +
    const char * chipname = "gpiochip3";
 +
    const unsigned int line_num = 21;
 +
 +
    chip = gpiod_chip_open_by_name(chipname);
 +
    if (!chip) {
 +
        perror("Open chip failed\n");
 +
        goto end;
 +
    }
 +
 +
    line = gpiod_chip_get_line(chip, line_num);
 +
    if (!line) {
 +
        perror("Get line failed\n");
 +
        goto close_chip;
 +
    }
 +
 +
    ret = gpiod_line_request_output(line, CONSUMER, 0);
 +
    if (ret < 0) {
 +
        perror("Request line as output failed\n");
 +
        goto release_line;
 +
    }
 +
 +
    /* Blink 5 times */
 +
    val = 0;
 +
    for (i = 0; i < 5; i++) {
 +
        ret = gpiod_line_set_value(line, val);
 +
        if (ret < 0) {
 +
            perror("Set line output failed\n");
 +
            goto release_line;
 +
        }
 +
        printf("Output %u on line #%u\n", val, line_num);
 +
        sleep(1);
 +
        val = !val;
 +
    }
 +
 +
release_line:
 +
    gpiod_line_release(line);
 +
close_chip:
 +
    gpiod_chip_close(chip);
 +
end:
 +
    return 0;
 +
}
 +
</pre>
 +
 +
== libgpiod Python Application ==
 +
 +
libgpiod provides bindings for python applications:
 +
 +
# pip3 install gpiod
 +
 +
Python examples are available in the libgpiod [{{#var:LIBGPIOD_URL}}/tree/bindings/python/examples /tree/bindings/python/examples ] directory.
 +
 +
<section end=libgpiod_section/>
  
 
= Manipulating a single GPIO via /sys/class/gpio =
 
= Manipulating a single GPIO via /sys/class/gpio =
 +
<section begin=gpio_sysfs_warning_section/> <!--
 +
-->{{Note|Note: The /sys/class/gpio ABI is being deprecated in the Linux kernel and is being replaced by the GPIO character device and [{{#var:LIBGPIOD_URL}} libgpiod]. Please refer to the kernel [https://github.com/varigit/linux-imx/blob/{{#var:KERNEL_BRANCH}}/Documentation/ABI/obsolete/sysfs-gpio Documentation] for the latest information.|error}}<!--
 +
--><section end=gpio_sysfs_warning_section/>
 
== Using a command line or a script ==
 
== Using a command line or a script ==
 
GPIOs in i.MX are grouped in groups of 32 pins.<br>
 
GPIOs in i.MX are grouped in groups of 32 pins.<br>
Line 160: Line 423:
 
== Device Tree GPIO files ==
 
== Device Tree GPIO files ==
 
=== Pin Func files ===
 
=== Pin Func files ===
In the directory include/dt-bindings/pinctrl/ of the Linux kernel source you will find the pin functions definition files.<br>
+
{{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M |
The relevant file is pins-imx8mq.h.<br>
+
In the directory {{#ifeq: {{#var:ANDROID_NAME}} | Pie |{{#var:BUILD_FOLDER}}/{{#var:BUILD_FOLDER_ANDROID}}/variscite/kernel_imx/}}arch/arm64/boot/dts/freescale of the Linux kernel source you will find the pin functions definition files.<br>
 +
The relevant file is imx8mq-pinfunc.h.<br>
 
If you search it for GPIO4_IO2, for example, you will see a group of definitions with same prefix (pad name), "MX8MQ_IOMUXC_SAI1_RXD0".
 
If you search it for GPIO4_IO2, for example, you will see a group of definitions with same prefix (pad name), "MX8MQ_IOMUXC_SAI1_RXD0".
 
<pre>
 
<pre>
Line 171: Line 435:
 
#define MX8MQ_IOMUXC_SAI1_RXD0_SIM_M_HADDR17                                0x164 0x3CC 0x000 0x7 0x0
 
#define MX8MQ_IOMUXC_SAI1_RXD0_SIM_M_HADDR17                                0x164 0x3CC 0x000 0x7 0x0
 
</pre>
 
</pre>
Adding only the one with the GPIO4_IO2 suffix (function) to your dts file will let you use the pin as GPIO.
+
|{{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M-MINI |
 +
In the directory {{#ifeq: {{#var:ANDROID_NAME}} | Pie |{{#var:BUILD_FOLDER}}/{{#var:BUILD_FOLDER_ANDROID}}/variscite/kernel_imx/}}arch/arm64/boot/dts/freescale of the Linux kernel source you will find the pin functions definition files.<br>
 +
The relevant file is imx8mm-pinfunc.h.<br>
 +
If you search it for GPIO4_IO2, for example, you will see a group of definitions with same prefix (pad name), "MX8MM_IOMUXC_SAI1_RXD0".
 +
<pre>
 +
#define MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0                                0x164 0x3CC 0x000 0x0 0x0
 +
#define MX8MM_IOMUXC_SAI1_RXD0_SAI5_RX_DATA0                                0x164 0x3CC 0x4D4 0x1 0x1
 +
#define MX8MM_IOMUXC_SAI1_RXD0_PDM_DATA0                                    0x164 0x3CC 0x534 0x3 0x1
 +
#define MX8MM_IOMUXC_SAI1_RXD0_CORESIGHT_TRACE0                            0x164 0x3CC 0x000 0x4 0x0
 +
#define MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2                                    0x164 0x3CC 0x000 0x5 0x0
 +
#define MX8MM_IOMUXC_SAI1_RXD0_CCMSRCGPCMIX_BOOT_CFG0                      0x164 0x3CC 0x000 0x6 0x0
 +
#define MX8MM_IOMUXC_SAI1_RXD0_SIM_M_HADDR17                                0x164 0x3CC 0x000 0x7 0x0
 +
</pre>
 +
|{{#ifeq: {{#var:HARDWARE_NAME}} | VAR-SOM-MX8M-NANO |
 +
In the directory {{#ifeq: {{#var:ANDROID_NAME}} | Pie |{{#var:BUILD_FOLDER}}/{{#var:BUILD_FOLDER_ANDROID}}/variscite/kernel_imx/}}arch/arm64/boot/dts/freescale of the Linux kernel source you will find the pin functions definition files.<br>
 +
The relevant file is imx8mn-pinfunc.h.<br>
 +
If you search it for GPIO4_IO22, for example, you will see a group of definitions with same prefix (pad name), "MX8MN_IOMUXC_SAI2_RXC".
 +
<pre>
 +
#define MX8MN_IOMUXC_SAI2_RXC_SAI2_RX_BCLK                                  0x01B4 0x041C 0x0000 0x0 0x0
 +
#define MX8MN_IOMUXC_SAI2_RXC_SAI5_TX_BCLK                                  0x01B4 0x041C 0x04E8 0x1 0x2
 +
#define MX8MN_IOMUXC_SAI2_RXC_UART1_DCE_RX                                  0x01B4 0x041C 0x04F4 0x4 0x3
 +
#define MX8MN_IOMUXC_SAI2_RXC_UART1_DTE_TX                                  0x01B4 0x041C 0x0000 0x4 0x0
 +
#define MX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22                                    0x01B4 0x041C 0x0000 0x5 0x0
 +
#define MX8MN_IOMUXC_SAI2_RXC_PDM_BIT_STREAM1                              0x01B4 0x041C 0x0538 0x6 0x8
 +
</pre>
 +
|{{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M-PLUS |
 +
In the directory {{#ifeq: {{#var:ANDROID_NAME}} | Pie |{{#var:BUILD_FOLDER}}/{{#var:BUILD_FOLDER_ANDROID}}/variscite/kernel_imx/}}arch/arm64/boot/dts/freescale of the Linux kernel source you will find the pin functions definition files.<br>
 +
The relevant file is imx8mp-pinfunc.h.<br>
 +
If you search it for GPIO4_IO22, for example, you will see a group of definitions with same prefix (pad name), "MX8MP_IOMUXC_SAI2_RXC".
 +
<pre>
 +
#define MX8MP_IOMUXC_SAI2_RXC__AUDIOMIX_SAI2_RX_BCLK                0x1A0 0x400 0x000 0x0 0x0
 +
#define MX8MP_IOMUXC_SAI2_RXC__AUDIOMIX_SAI5_TX_BCLK                0x1A0 0x400 0x50C 0x1 0x2
 +
#define MX8MP_IOMUXC_SAI2_RXC__CAN1_TX                              0x1A0 0x400 0x000 0x3 0x0
 +
#define MX8MP_IOMUXC_SAI2_RXC__UART1_DCE_RX                          0x1A0 0x400 0x5E8 0x4 0x3
 +
#define MX8MP_IOMUXC_SAI2_RXC__UART1_DTE_TX                          0x1A0 0x400 0x000 0x4 0x0
 +
#define MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22                            0x1A0 0x400 0x000 0x5 0x0
 +
#define MX8MP_IOMUXC_SAI2_RXC__AUDIOMIX_PDM_BIT_STREAM01            0x1A0 0x400 0x4C4 0x6 0x5
 +
 
 +
</pre>
 +
 
 +
|}} }} }} }}
 +
Adding only the one with the {{#ifeq: {{#var:HARDWARE_NAME}}|VAR-SOM-MX8MN|GPIO4_IO22|{{#ifeq: {{#var:HARDWARE_NAME}}|DART-MX8M-PLUS|GPIO4_IO22|GPIO4_IO2}}}} suffix (function) to your dts file will let you use the pin as GPIO.
  
 
== Define a pin as GPIO in the kernel Device Tree ==
 
== Define a pin as GPIO in the kernel Device Tree ==
 
You need to add the relevant definitions to your device tree, as explained in the [[#Pin Func files|Pin Func files]] section above.<br>
 
You need to add the relevant definitions to your device tree, as explained in the [[#Pin Func files|Pin Func files]] section above.<br>
Edit arch/arm64/boot/dts/variscite/imx8m-var-dart-common.dtsi and add the definition for the GPIO you need in the iomuxc node.<br>
+
{{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M |
 +
Edit {{#ifeq: {{#var:ANDROID_NAME}} | Pie |{{#var:BUILD_FOLDER}}/{{#var:BUILD_FOLDER_ANDROID}}/variscite/kernel_imx/}}arch/arm64/boot/dts/{{#ifeq: {{#var:YOCTO_NAME}} | Morty |variscite/imx8m-var-dart-common.dtsi|freescale/{{#var:DTB_PREFIX|fsl-imx8mq-var-dart}}{{#ifeq: {{#sub:{{#var:KERNEL_VER}}|0|2}} | 4. | -common | }}.dtsi}} and add the definition for the GPIO you need in the iomuxc node.<br>
 +
<pre>
 +
&iomuxc {
 +
pinctrl-names = "default";
 +
pinctrl-0 = <&pinctrl_hog>;
 +
 
 +
imx8m-var-dart {
 +
pinctrl_hog: hoggrp {
 +
fsl,pins = <
 +
/* Add your GPIO definitions here */
 +
>;
 +
};
 +
};
 +
 +
};
 +
</pre>
 +
|{{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M-MINI |
 +
Edit {{#ifeq: {{#var:ANDROID_NAME}} | Pie |{{#var:BUILD_FOLDER}}/{{#var:BUILD_FOLDER_ANDROID}}/variscite/kernel_imx/}}arch/arm64/boot/dts/freescale/{{#var:DTB_PREFIX|fsl-imx8mm-var-dart}}.dts and add the definition for the GPIO you need in the iomuxc node.<br>
 
<pre>
 
<pre>
 
&iomuxc {
 
&iomuxc {
Line 181: Line 504:
 
pinctrl-0 = <&pinctrl_hog>;
 
pinctrl-0 = <&pinctrl_hog>;
  
imx8mq-evk {
+
imx8mm-var-dart {
 
pinctrl_hog: hoggrp {
 
pinctrl_hog: hoggrp {
 
fsl,pins = <
 
fsl,pins = <
Line 188: Line 511:
 
};
 
};
 
};
 
};
...
+
 +
};
 +
</pre>
 +
| {{#ifeq: {{#var:HARDWARE_NAME}} | VAR-SOM-MX8M-NANO |
 +
Edit {{#ifeq: {{#var:ANDROID_NAME}} | Pie |{{#var:BUILD_FOLDER}}/{{#var:BUILD_FOLDER_ANDROID}}/variscite/kernel_imx/}}arch/arm64/boot/dts/freescale/{{#var:DTB_PREFIX|fsl-imx8mn-var-som}}.dts and add the definition for the GPIO you need in the iomuxc node.<br>
 +
<pre>
 +
&iomuxc {
 +
pinctrl-names = "default";
 +
pinctrl-0 = <&pinctrl_hog>;
 +
 
 +
imx8mn-var-som {
 +
pinctrl_hog: hoggrp {
 +
fsl,pins = <
 +
/* Add your GPIO definitions here */
 +
>;
 +
};
 +
};
 +
 
};
 
};
 +
</pre>
 +
| {{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M-PLUS |
 +
Edit {{#ifeq: {{#var:ANDROID_NAME}} | Pie |{{#var:BUILD_FOLDER}}/{{#var:BUILD_FOLDER_ANDROID}}/variscite/kernel_imx/}}arch/arm64/boot/dts/freescale/imx8mp-var-dart.dts and add the definition for the GPIO you need in the iomuxc node.<br>
 +
<pre>
 +
&iomuxc {
 +
pinctrl-names = "default";
 +
pinctrl-0 = <&pinctrl_hog>;
  
 +
pinctrl_hog: hoggrp {
 +
fsl,pins = <
 +
/* Add your GPIO definitions here */
 +
>;
 +
};
 +
 +
};
 
</pre>
 
</pre>
 +
|}} }} }} }}
  
 
=== Device Tree GPIO attribute ===
 
=== Device Tree GPIO attribute ===
If you look at Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt in the Linux kernel source tree, the number to the right of the pin control spec can be used for additional attributes like pull-ups, pull-downs, keepers, drive strength, etc.<br>
+
If you look at the pin control definitions in {{#ifeq: {{#var:ANDROID_NAME}} | Pie |{{#var:BUILD_FOLDER}}/{{#var:BUILD_FOLDER_ANDROID}}/variscite/kernel_imx/}}arch/arm64/boot/dts/{{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M |{{#ifeq: {{#var:YOCTO_NAME}} | Morty |variscite/imx8m-var-dart-common.dtsi|freescale/{{#var:DTB_PREFIX|fsl-imx8mq-var-dart}}{{#ifeq: {{#sub:{{#var:KERNEL_VER}}|0|2}} | 4. | -common | }}.dtsi}}| {{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M-MINI |freescale/{{#var:DTB_PREFIX|fsl-imx8mm-var-dart}}.dts | {{#ifeq: {{#var:HARDWARE_NAME}} | VAR-SOM-MX8M-NANO |freescale/{{#var:DTB_PREFIX|fsl-imx8mn-var-som}}.dts | {{#ifeq: {{#var:HARDWARE_NAME}} | DART-MX8M-PLUS |freescale/imx8mp-var-dart.dts}}}}}}}} in the Linux kernel source tree, the number to the right of the pin mux macro can be used for additional attributes like pull-up, slew rate, open drain, drive strength, etc.<br>
The value 0x80000000 is "don't know value please use the default". Else use the table below to set it to the required value.
+
This value is written to the IOMUXC_SW_PAD_CTRL_ register of the relevant pin.<br>
{| class="wikitable"
+
Please consult the SOC reference manual for details about the relevant register.
|-
 
! scope="col" | CONFIG bits definition<br/>
 
! scope="col" | value<br/>
 
|-
 
|PAD_CTL_HYS
 
|(1 << 16)
 
|-
 
|PAD_CTL_PUS_100K_DOWN
 
|(0 << 14)
 
|-
 
|PAD_CTL_PUS_47K_UP
 
|(1 << 14)
 
|-
 
|PAD_CTL_PUS_100K_UP
 
|(2 << 14)
 
|-
 
|PAD_CTL_PUS_22K_UP
 
|(3 << 14)
 
|-
 
|PAD_CTL_PUE
 
|(1 << 13)
 
|-
 
|PAD_CTL_PKE
 
|(1 << 12)
 
|-
 
|PAD_CTL_ODE
 
|(1 << 11)
 
|-
 
|PAD_CTL_SPEED_LOW
 
|(1 << 6)
 
|-
 
|PAD_CTL_SPEED_MED
 
|(2 << 6)
 
|-
 
|PAD_CTL_SPEED_HIGH
 
|(3 << 6)
 
|-
 
|PAD_CTL_DSE_DISABLE
 
|(0 << 3)
 
|-
 
|PAD_CTL_DSE_240ohm
 
|(1 << 3)
 
|-
 
|PAD_CTL_DSE_120ohm
 
|(2 << 3)
 
|-
 
|PAD_CTL_DSE_80ohm
 
|(3 << 3)
 
|-
 
|PAD_CTL_DSE_60ohm
 
|(4 << 3)
 
|-
 
|PAD_CTL_DSE_48ohm
 
|(5 << 3)
 
|-
 
|PAD_CTL_DSE_40ohm
 
|(6 << 3)
 
|-
 
|PAD_CTL_DSE_34ohm
 
|(7 << 3)
 
|-
 
|PAD_CTL_SRE_FAST
 
|(1 << 0)
 
|-
 
|PAD_CTL_SRE_SLOW
 
|(0 << 0)
 
|-
 
|}
 

Latest revision as of 18:47, 31 March 2022

DART-MX8M GPIO

1 GPIO state

The current state of the system's GPIOs can be obtained in user-mode, as shown in the following example:

# cat /sys/kernel/debug/gpio
gpiochip0: GPIOs 0-31, parent: platform/30200000.gpio, 30200000.gpio:
 gpio-8   (                    |eth_phy_pwr         ) out hi    
 gpio-9   (                    |phy-reset           ) out hi    
 gpio-10  (                    |connect             ) in  hi IRQ

gpiochip1: GPIOs 32-63, parent: platform/30210000.gpio, 30210000.gpio:
 gpio-44  (                    |cd                  ) in  lo IRQ
 gpio-51  (                    |VSD_3V3             ) out hi    

gpiochip2: GPIOs 64-95, parent: platform/30220000.gpio, 30220000.gpio:

gpiochip3: GPIOs 96-127, parent: platform/30230000.gpio, 30230000.gpio:
 gpio-102 (                    |Back                ) in  hi IRQ
 gpio-109 (                    |Home                ) in  hi IRQ
 gpio-111 (                    |Down                ) in  hi IRQ
 gpio-113 (                    |?                   ) out lo    
 gpio-114 (                    |Up                  ) in  hi IRQ

Each GPIO is defined as in or out and the state is shown as lo or hi.
For example pin 44 is the SD card card-detect. When an SD card is plugged in, the state will be:

 gpio-44  (                    |cd                  ) in  lo IRQ

When the SD card is removed, the state will be:

 gpio-44  (                    |cd                  ) in  hi IRQ

2 Manipulating GPIO using libgpiod

The Linux GPIO sysfs interface is being deprecated. Moving forward, user space should use the character device /dev/gpiochip* instead. libgpiod provides bindings and utilities for for manipulating GPIO via user space.

2.1 libgpiod via command line

libgpiod provides command line utilities for GPIO:

gpiodetect List all gpiochips present on the system, their names, labels and number of GPIO lines
gpioinfo List all lines of specified gpiochips, their names, consumers, direction, active state and additional flags
gpioget Read values of specified GPIO lines
gpioset Set values of specified GPIO lines, potentially keep the lines exported and wait until timeout, user input or signal
gpiofind Find the gpiochip name and line offset given the line name
gpiomon Wait for events on GPIO lines, specify which events to watch, how many events to process before exiting or if the events should be reported to the console

i.MX GPIOs are organized in banks of 32 pins. Each bank corresponds to a character device /dev/gpiochip<bank index>. The gpiodetect utility can be used to inspect the available gpiochip character devices:

# gpiodetect
gpiochip0 [30200000.gpio] (32 lines)
gpiochip1 [30210000.gpio] (32 lines)
...

The gpioinfo utility can be used to inspect the lines for a given gpiochip:

# gpioinfo gpiochip0
gpiochip0 - 32 lines:
        line   0:      unnamed    "spi_imx"  output  active-high [used]
        line   1:      unnamed       unused   input  active-high
        line   2:      unnamed       unused   input  active-high
        ...

The gpioset and gpioget utilities can be used to manipulate GPIO from the command line.

For example, assuming GPIO4_21 is configured as a GPIO in your device tree:

Set GPIO4_21 high:

gpioset gpiochip3 21=1

Set GPIO4_21 low:

gpioset gpiochip3 21=0

Read GPIO4_21:

gpioget gpiochip3 21

2.2 libgpiod C Application

libgpiod provides bindings for C/C++ applications. C++ examples are available in the libgpiod /tree/bindings/cxx/examples directory.

Below is a simple C application demonstrating how to use the bindings with GPIO4_IO21:

Makefile:

all: main.cpp
	$(CC) $(CCFLAGS) -Og -lgpiod main.c -g -o hello.bin
clean:
	rm -f hello.bin

main.c

#include <gpiod.h>
#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
#include <string.h>

#define    CONSUMER    "Variscite Demo"

int main(int argc, char **argv)
{
    unsigned int i, ret, val;
    struct gpiod_chip *chip;
    struct gpiod_line *line;
    const char * chipname = "gpiochip3";
    const unsigned int line_num = 21;

    chip = gpiod_chip_open_by_name(chipname);
    if (!chip) {
        perror("Open chip failed\n");
        goto end;
    }

    line = gpiod_chip_get_line(chip, line_num);
    if (!line) {
        perror("Get line failed\n");
        goto close_chip;
    }

    ret = gpiod_line_request_output(line, CONSUMER, 0);
    if (ret < 0) {
        perror("Request line as output failed\n");
        goto release_line;
    }

    /* Blink 5 times */
    val = 0;
    for (i = 0; i < 5; i++) {
        ret = gpiod_line_set_value(line, val);
        if (ret < 0) {
            perror("Set line output failed\n");
            goto release_line;
        }
        printf("Output %u on line #%u\n", val, line_num);
        sleep(1);
        val = !val;
    }

release_line:
    gpiod_line_release(line);
close_chip:
    gpiod_chip_close(chip);
end:
    return 0;
}

2.3 libgpiod Python Application

libgpiod provides bindings for python applications:

# pip3 install gpiod

Python examples are available in the libgpiod /tree/bindings/python/examples directory.


3 Manipulating a single GPIO via /sys/class/gpio

Note: The /sys/class/gpio ABI is being deprecated in the Linux kernel and is being replaced by the GPIO character device and libgpiod. Please refer to the kernel Documentation for the latest information.

3.1 Using a command line or a script

GPIOs in i.MX are grouped in groups of 32 pins.
For example, GPIO1_3 belong to the first group, pin 3. Its absolute number will be 3.
GPIO4_21 will be (4-1)*32+21=117.
Assuming this GPIO is defined in your device tree, the following is an example of how to use it from userspace.

To export the GPIO for userspace use:

$ echo 117 > /sys/class/gpio/export


To configure as output:

$ echo out > /sys/class/gpio/gpio117/direction

Set GPIO high:

$ echo 1 > /sys/class/gpio/gpio117/value

Set GPIO low:

$ echo 0 > /sys/class/gpio/gpio117/value


To configure as input:

$ echo in > /sys/class/gpio/gpio117/direction

Read the current value:

$ cat /sys/class/gpio/gpio117/value


To free the GPIO after you're done using it:

$ echo 117 > /sys/class/gpio/unexport

3.2 Using a C application

All of the command line operations above can be translated to C code:
Reserve (export) the GPIO:

#define IMX_GPIO_NR(port, index)    ((((port)-1)*32)+((index)&31))

int fd;
char buf[MAX_BUF]; 
int gpio = IMX_GPIO_NR(4, 21); /* Just an example */

fd = open("/sys/class/gpio/export", O_WRONLY);

sprintf(buf, "%d", gpio); 

write(fd, buf, strlen(buf));

close(fd);

Set the GPIO direction:

sprintf(buf, "/sys/class/gpio/gpio%d/direction", gpio);

fd = open(buf, O_WRONLY);

/* Set out direction */
write(fd, "out", 3); 
/* Set in direction */
write(fd, "in", 2); 

close(fd);

In case of out direction set the GPIO value:

sprintf(buf, "/sys/class/gpio/gpio%d/value", gpio);

fd = open(buf, O_WRONLY);

/* Set GPIO high status */
write(fd, "1", 1); 
/* Set GPIO low status */
write(fd, "0", 1); 

close(fd);

In case of in direction get the current GPIO value:

char value;

sprintf(buf, "/sys/class/gpio/gpio%d/value", gpio);

fd = open(buf, O_RDONLY);

read(fd, &value, 1);

if (value == '0') { 
     /* Current GPIO status low */
} else {
     /* Current GPIO status high */
}

close(fd);

Once finished, free (unexport) the GPIO:

fd = open("/sys/class/gpio/unexport", O_WRONLY);

sprintf(buf, "%d", gpio);

write(fd, buf, strlen(buf));

close(fd);

Important notes:

  • Remember that after the first read operation the file pointer will move to the next position in the file, so to get a correct value for each read operation you simply have to set the file pointer at the beginning of the file before read by using the following command:
lseek(fd, 0, SEEK_SET);
  • This is only a short example. If you want to use it in your code remember add error handling to it.

4 Kernel Device Tree GPIO configuration

4.1 Device Tree GPIO files

4.1.1 Pin Func files

In the directory arch/arm64/boot/dts/freescale of the Linux kernel source you will find the pin functions definition files.
The relevant file is imx8mq-pinfunc.h.
If you search it for GPIO4_IO2, for example, you will see a group of definitions with same prefix (pad name), "MX8MQ_IOMUXC_SAI1_RXD0".

#define MX8MQ_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0                                0x164 0x3CC 0x000 0x0 0x0
#define MX8MQ_IOMUXC_SAI1_RXD0_SAI5_RX_DATA0                                0x164 0x3CC 0x4D4 0x1 0x1
#define MX8MQ_IOMUXC_SAI1_RXD0_CORESIGHT_TRACE0                             0x164 0x3CC 0x000 0x4 0x0
#define MX8MQ_IOMUXC_SAI1_RXD0_GPIO4_IO2                                    0x164 0x3CC 0x000 0x5 0x0
#define MX8MQ_IOMUXC_SAI1_RXD0_CCMSRCGPCMIX_BOOT_CFG0                       0x164 0x3CC 0x000 0x6 0x0
#define MX8MQ_IOMUXC_SAI1_RXD0_SIM_M_HADDR17                                0x164 0x3CC 0x000 0x7 0x0

Adding only the one with the GPIO4_IO2 suffix (function) to your dts file will let you use the pin as GPIO.

4.2 Define a pin as GPIO in the kernel Device Tree

You need to add the relevant definitions to your device tree, as explained in the Pin Func files section above.
Edit arch/arm64/boot/dts/freescale/fsl-imx8mq-var-dart-common.dtsi and add the definition for the GPIO you need in the iomuxc node.

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx8m-var-dart {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				/* Add your GPIO definitions here */ 
			>;
		};
	};
…
};

4.2.1 Device Tree GPIO attribute

If you look at the pin control definitions in arch/arm64/boot/dts/freescale/fsl-imx8mq-var-dart-common.dtsi in the Linux kernel source tree, the number to the right of the pin mux macro can be used for additional attributes like pull-up, slew rate, open drain, drive strength, etc.
This value is written to the IOMUXC_SW_PAD_CTRL_ register of the relevant pin.
Please consult the SOC reference manual for details about the relevant register.