MCUXpresso Platform Customization: Difference between revisions

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(mcuxpresso-2.11.1-mx8mn-v1.0)
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{| class="wikitable"
{| class="wikitable"
|-
|-
! scope="col" | function
! scope="col" | Function
! scope="col" | pin
! scope="col" | Pin
|-
|-
| debug UART (UART2)
| debug UART (UART2)
Line 95: Line 95:
* driver_examples/i2c/polling_b2b_transfer/master
* driver_examples/i2c/polling_b2b_transfer/master
* driver_examples/wdog
* driver_examples/wdog
* driver_examples/gpio/led_output (only for 1.x DT8CustomBoard)
* driver_examples/gpio/led_output
* driver_examples/tmu/tmu_monitor_report
* driver_examples/tmu/tmu_monitor_report
* driver_examples/pwm
* driver_examples/pwm
Line 159: Line 159:
All linker files are locate in the '''armgcc''' folder of each demo.
All linker files are locate in the '''armgcc''' folder of each demo.


The DDR reserved area must much the one declared in the kernel device tree: at least 2 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x80000000 - 0x80FFFFFF.
The DDR reserved area must match the one declared in the kernel device tree: at least 2 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x80000000 - 0x80FFFFFF.


The RPMSG area is located at 0xB8000000: at least 3 GB of RAM is required on the SoM to allow Cortex-M4 accessing the RPMSG area.
The RPMSG area is located at 0xB8000000: at least 3 GB of RAM is required on the SoM to allow Cortex-M4 accessing the RPMSG area.
Line 169: Line 169:
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)


Further details about memory mapping are available in [https://cache.nxp.com/secured/assets/documents/en/reference-manual/IMX8MDQLQRM.pdf i.MX 8M Applications Processors Reference Manual] paragraphs:
Further details about memory mapping are available in the following [https://www.nxp.com/doc/IMX8MDQLQRM i.MX 8M Applications Processor Reference Manual] paragraphs:


* 2.1.2 Cortex-A53 Memory Map
* 2.1.2 Cortex-A53 Memory Map
Line 205: Line 205:
All linker files are locate in the '''armgcc''' folder of each demo.
All linker files are locate in the '''armgcc''' folder of each demo.


The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M4 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M4.  
The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M4 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M4.  


The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M4 accessing the RPMSG area.
The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M4 accessing the RPMSG area.
Line 216: Line 216:
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)


Further details about memory mapping are available in [https://www.nxp.com/webapp/Download?colCode=IMX8MDQLQRM i.MX 8M Applications Processors Reference Manual] paragraphs:
Further details about memory mapping are available in the following [https://www.nxp.com/doc/IMX8MDQLQRM i.MX 8M Applications Processor Reference Manual] paragraphs:


* 2.1.2 Cortex-A53 Memory Map
* 2.1.2 Cortex-A53 Memory Map
Line 571: Line 571:
*BOARD_SDK = '''{{#var:BOARD_SDK}}'''
*BOARD_SDK = '''{{#var:BOARD_SDK}}'''


= DART-MX8M-MINI =
=== mcuxpresso-2.12.1-mx8mq-v1.0 ===
 
<section begin=MCUXPRESSO_2.12.1_V1.0_DART-MX8M/><!--
== Sections ==
-->{{#vardefine:OS|FreeRTOS}}<!--
 
-->{{#vardefine:HARDWARE_NAME|DART-MX8M}}<!--
=== Available dtbs ===
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.12.1-mx8mq-v1.0}}<!--
<section begin=DART-MX8M-MINI_DTBS_SECTION/><!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.12.1_V1.0_DART-MX8M}}<!--
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.
-->{{#vardefine:MCUXPRESSO_VERSION|2.12.1}}<!--
 
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
 
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.12.x-var01}}<!--
{| class="wikitable"
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
! scope="col" | File Name<br/>
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.10}}<!--
! scope="col" | Description<br/>
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mq}}<!--
|-
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| style="padding: 5px;"| imx8mm-var-dart-dt8mcustomboard-'''m4'''.dtb
-->{{#vardefine:PINS_SECTION|DART-MX8M_PINS_SECTION}}<!--
| style="padding: 5px;"| DART-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell)
-->{{#vardefine:DEMOS_SECTION|DART-MX8M_DEMOS_SECTION}}<!--
|-
-->{{#vardefine:DTBS_SECTION|DART-MX8M_DTBS_SECTION}}<!--
| style="padding: 5px;"| imx8mm-var-dart-'''m4'''.dtb
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M_MEMORY-TYPES_VAR_SECTION}}<!--
| style="padding: 5px;"| DART-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
-->{{#vardefine:JTAG_SECTION|DART-MX8M_JTAG_SECTION}}<!--
|-
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf}}<!--
| style="padding: 5px;"| fsl-imx8mm-var-dart-'''m4'''.dtb
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MQ}}<!--
| style="padding: 5px;"| DART-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. > 1.0
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mq_mcuxpresso-2.12.1_v10}}<!--
|-
-->{{#vardefine:RELEASE_DATE|12/13/2022}}<!--
| style="padding: 5px;"| imx8mm-var-som-symphony-'''m4'''.dtb
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
|-
-->{{#vardefine:YOCTO_RELEASE_TAG|mx8m-yocto-kirkstone-5.15-2.0.x-v1.0}}<!--
| style="padding: 5px;"| imx8mm-var-som-symphony-legacy-'''m4'''.dtb
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-iMX8MQ-deactivated-the-LMEM-caches-to-debug-in-exter.patch}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
-->{{#vardefine:BOARD_SDK|dart_mx8mq}}<!--
|-
--><section end=MCUXPRESSO_2.12.1_V1.0_DART-MX8M/><!--
| style="padding: 5px;"| imx8mm-var-som-'''m4'''.dtb
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
|-
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
| style="padding: 5px;"| imx8mm-var-som-rev10-'''m4'''.dtb
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. 1.0
*SDK_PATH = '''{{#var:SDK_PATH}}'''
|-
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
| style="padding: 5px;"| fsl-imx8mm-var-som-'''m4'''.dtb
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. > 1.0
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
|-
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
| style="padding: 5px;"| fsl-imx8mm-var-som-rev10-'''m4'''.dtb
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. 1.0
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
|-
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
|}
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*DEACTIVATE_LMEM_CACHE_PATCH = '''{{#var:DEACTIVATE_LMEM_CACHE_PATCH}}'''
*BOARD_SDK = '''{{#var:BOARD_SDK}}'''
 
=== mcuxpresso-2.13.0-mx8mq-v1.0 ===
<section begin=MCUXPRESSO_2.13.0_V1.0_DART-MX8M/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|DART-MX8M}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.13.0-mx8mq-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.13.0_V1.0_DART-MX8M}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.13.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.13.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.10}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mq}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:PINS_SECTION|DART-MX8M_PINS_SECTION}}<!--
-->{{#vardefine:DEMOS_SECTION|DART-MX8M_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|DART-MX8M_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M_MEMORY-TYPES_VAR_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|DART-MX8M_JTAG_SECTION}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MQ}}<!--
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mq_mcuxpresso-2.13.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|02/17/2023}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|mx8m-yocto-kirkstone-5.15-2.0.x-v1.2}}<!--
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-iMX8MQ-deactivated-the-LMEM-caches-to-debug-in-exter.patch}}<!--
-->{{#vardefine:BOARD_SDK|dart_mx8mq}}<!--
--><section end=MCUXPRESSO_2.13.0_V1.0_DART-MX8M/>


<section end=DART-MX8M-MINI_DTBS_SECTION/>
= DART-MX8M-MINI =


=== Default M4 pins ===
== Sections ==
<section begin=DART-MX8M-MINI_PINS_SECTION/><!--
-->Default M4 pins used by the demos are:


{| class="wikitable"
=== Available dtbs ===
|-
<section begin=DART-MX8M-MINI_DTBS_SECTION/><!--
! scope="col" | function
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.
! scope="col" | pin
 
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.
 
{| class="wikitable"
|-
|-
| debug UART (UART2)
! scope="col" | File Name<br/>
| RX: J12.6 / TX: J12.4
! scope="col" | Description<br/>
|-
|-
| GPIO (GPIO4_IO03)
| style="padding: 5px;"| imx8mm-var-dart-dt8mcustomboard-'''m4'''.dtb
| LED7
| style="padding: 5px;"| DART-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell)
|-
|-
| I2C (I2C4)
| style="padding: 5px;"| imx8mm-var-dart-'''m4'''.dtb
| SCL: J12.17 / SDA: J12.19
| style="padding: 5px;"| DART-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
|-
|-
| PWM (PWM2)
| style="padding: 5px;"| fsl-imx8mm-var-dart-'''m4'''.dtb
| J14.3
| style="padding: 5px;"| DART-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. > 1.0
|-
|-
|}<!--
| style="padding: 5px;"| imx8mm-var-som-symphony-'''m4'''.dtb
--><section end=DART-MX8M-MINI_PINS_SECTION/>
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above
 
=== Default M4 pins v2 ===
<section begin=DART-MX8M-MINI_PINS_SECTION_V2/><!--
-->Default M4 pins used by the demos are:
 
{| class="wikitable"
|-
|-
! scope="col" | function
| style="padding: 5px;"| imx8mm-var-som-symphony-legacy-'''m4'''.dtb
! scope="col" | SoC balls
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
! scope="col" | DART-MX8M-MINI pins
|-
! scope="col" | DT8MCB pins
| style="padding: 5px;"| imx8mm-var-som-'''m4'''.dtb
! scope="col" | VAR-SOM-MX8M-MINI pins
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
! scope="col" | Symphony pins
! scope="col" | notes
|-
|-
| UART3 RX/TX
| style="padding: 5px;"| imx8mm-var-som-rev10-'''m4'''.dtb
| E18 / D18
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. 1.0
| J2.87 / J2.89
| J12.11 / J12.13
| J1.175 / J1.124
| J18.5 / J18.3
|
|-
|-
| GPIO4_IO03
| style="padding: 5px;"| fsl-imx8mm-var-som-'''m4'''.dtb
| AF15
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. > 1.0
| J2.59
| GPLED1
| J1.84
| J17.3
|
|-
|-
| I2C4 SCL/SDA
| style="padding: 5px;"| fsl-imx8mm-var-som-rev10-'''m4'''.dtb
| D13 / E13
| style="padding: 5px;"| VAR-SOM-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. 1.0
| J1.17 / J1.19
| J12.17/ J12.19
| J1.174 / J1.176
| J16.10 / J16.12
|
|-
|-
| PWM3
|}
| AF9
 
| J3.36
<section end=DART-MX8M-MINI_DTBS_SECTION/>
| J14.7
 
| J1.69
=== Default M4 pins ===
| J18.2
<section begin=DART-MX8M-MINI_PINS_SECTION/><!--
|
-->Default M4 pins used by the demos are:
 
{| class="wikitable"
|-
! scope="col" | Function
! scope="col" | Pin
|-
| Debug UART (UART2)
| RX: J12.6 / TX: J12.4
|-
| GPIO (GPIO4_IO03)
| LED7
|-
| I2C (I2C4)
| SCL: J12.17 / SDA: J12.19
|-
|-
| SPI1 CS0/SCK/SDI/SDO
| PWM (PWM2)
| B6 / D6 / A7 / B7
| J14.3
| J2.79 / J2.77 / J2.81 / J2.83
| J16.4/ J16.2 / J16.8 / J16.6
| J1.39 / J1.43 / J1.41 / J1.45
| J16.4/ J16.2 / J16.6 / J16.8
| enablind it SPI devices will be no longer visible from Linux
|-
|-
|}<!--
|}<!--
--><section end=DART-MX8M-MINI_PINS_SECTION_V2/>
--><section end=DART-MX8M-MINI_PINS_SECTION/>


=== Available Demos ===
=== Default M4 pins v2 ===
<section begin=DART-MX8M-MINI_DEMOS_SECTION/><!--
<section begin=DART-MX8M-MINI_PINS_SECTION_V2/><!--
-->* driver_examples/i2c/interrupt_b2b_transfer/slave
-->Default M4 pins used by the demos are:
* driver_examples/i2c/interrupt_b2b_transfer/master
 
* driver_examples/i2c/polling_b2b_transfer/slave
{| class="wikitable"
* driver_examples/i2c/polling_b2b_transfer/master
|-
* driver_examples/wdog
! scope="col" | Function
* driver_examples/sdma/scatter_gather
! scope="col" | SoC balls
* driver_examples/sdma/memory_to_memory
! scope="col" | DART-MX8M-MINI pins
* driver_examples/gpio/led_output (only for 1.x DT8CustomBoard)
! scope="col" | DT8MCB pins
* driver_examples/pwm
! scope="col" | VAR-SOM-MX8M-MINI pins
* driver_examples/uart/auto_baudrate_detect
! scope="col" | Symphony pins
* driver_examples/uart/interrupt
! scope="col" | Notes
* driver_examples/uart/idle_detect_sdma_transfer
|-
* driver_examples/uart/interrupt_rb_transfer
| UART3 RX/TX
* driver_examples/uart/sdma_transfer
| E18 / D18
* driver_examples/uart/polling
| J2.87 / J2.89
* driver_examples/uart/interrupt_transfer
| J12.11 / J12.13
* driver_examples/gpt/timer
| J1.175 / J1.124
* driver_examples/gpt/capture
| J18.5 / J18.3
* driver_examples/ecspi/ecspi_loopback
|
* driver_examples/ecspi/interrupt_b2b_transfer/slave
|-
* driver_examples/ecspi/interrupt_b2b_transfer/master
| GPIO4_IO03
* driver_examples/ecspi/polling_b2b_transfer/slave
| AF15
* driver_examples/ecspi/polling_b2b_transfer/master
| J2.59
* driver_examples/rdc
| GPLED1
* driver_examples/tmu_1/monitor_threshold
| J1.84
* driver_examples/tmu_1/temperature_polling
| J17.3
* driver_examples/sema4/uboot
| The led_output demo makes the GPLED1 blink for only DT8MCustomBoard 1.x, use the scope on one of the following test points for DT8MCustomBoard >= 2.x (U43.2/R228/MIPI-CSI pin 20)
* rtos_examples/freertos_ecspi/ecspi_loopback
|-
* rtos_examples/freertos_hello
| I2C4 SCL/SDA
* rtos_examples/freertos_queue
| D13 / E13
* rtos_examples/freertos_sem
| J1.17 / J1.19
* rtos_examples/freertos_generic
| J12.17/ J12.19
* rtos_examples/freertos_uart
| J1.174 / J1.176
* rtos_examples/freertos_tickless
| J16.10 / J16.12
* rtos_examples/freertos_mutex
|
* rtos_examples/freertos_event
|-
* rtos_examples/freertos_swtimer
| PWM3
* rtos_examples/freertos_i2c
| AF9
* cmsis_driver_examples/i2c/int_b2b_transfer/slave
| J3.36
* cmsis_driver_examples/i2c/int_b2b_transfer/master
| J14.7
* cmsis_driver_examples/uart/sdma_transfer
| J1.69
* cmsis_driver_examples/uart/interrupt_transfer
| J18.2
* cmsis_driver_examples/ecspi/int_loopback_transfer
|
* cmsis_driver_examples/ecspi/sdma_loopback_transfer
* multicore_examples/rpmsg_lite_str_echo_rtos
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
* demo_apps/hello_world<!--
--><section end=DART-MX8M-MINI_DEMOS_SECTION/>
 
=== Variscite Memory types ===
<section begin=DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
 
Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.
 
{| class="wikitable"
|-
|-
! scope="col" | memory type
| SPI1 CS0/SCK/SDI/SDO
! scope="col" | M4 memory area
| B6 / D6 / A7 / B7
! scope="col" | A53 memory area
| J2.79 / J2.77 / J2.81 / J2.83
! scope="col" | memory lentgh
| J16.4/ J16.2 / J16.8 / J16.6
! scope="col" | linker file
| J1.39 / J1.43 / J1.41 / J1.45
| J16.4/ J16.2 / J16.6 / J16.8
| Enabling it SPI devices will be no longer visible from Linux
|-
|-
| DDR
|}<!--
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
--><section end=DART-MX8M-MINI_PINS_SECTION_V2/>
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
 
| 16MB (DDR)
=== Available Demos ===
| MIMX8MM6xxxxx_cm4_ddr_ram.ld
<section begin=DART-MX8M-MINI_DEMOS_SECTION/><!--
|-
-->* driver_examples/i2c/interrupt_b2b_transfer/slave
| TCM
* driver_examples/i2c/interrupt_b2b_transfer/master
| 0x1FFE0000-0x1FFFFFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
* driver_examples/i2c/polling_b2b_transfer/slave
| 0x007E0000-0x007FFFFF (code)<br>0x00800000-0x0081FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
* driver_examples/i2c/polling_b2b_transfer/master
| 256kB (TCM) + 16MB (DDR)
* driver_examples/wdog
| MIMX8MM6xxxxx_cm4_ram.ld
* driver_examples/sdma/scatter_gather
|-
* driver_examples/sdma/memory_to_memory
|}
* driver_examples/gpio/led_output
 
* driver_examples/pwm
All linker files are locate in the '''armgcc''' folder of each demo.
* driver_examples/uart/auto_baudrate_detect
 
* driver_examples/uart/interrupt
The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M4 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M4.
* driver_examples/uart/idle_detect_sdma_transfer
 
* driver_examples/uart/interrupt_rb_transfer
The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M4 accessing the RPMSG area.
* driver_examples/uart/sdma_transfer
 
* driver_examples/uart/polling
After launching the build_all.sh command the following folder will be created in the armgcc folder
* driver_examples/uart/interrupt_transfer
 
* driver_examples/gpt/timer
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/gpt/capture
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* driver_examples/ecspi/ecspi_loopback
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/ecspi/interrupt_b2b_transfer/slave
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
* driver_examples/ecspi/interrupt_b2b_transfer/master
* driver_examples/ecspi/polling_b2b_transfer/slave
* driver_examples/ecspi/polling_b2b_transfer/master
* driver_examples/rdc
* driver_examples/tmu_1/monitor_threshold
* driver_examples/tmu_1/temperature_polling
* driver_examples/sema4/uboot
* rtos_examples/freertos_ecspi/ecspi_loopback
* rtos_examples/freertos_hello
* rtos_examples/freertos_queue
* rtos_examples/freertos_sem
* rtos_examples/freertos_generic
* rtos_examples/freertos_uart
* rtos_examples/freertos_tickless
* rtos_examples/freertos_mutex
* rtos_examples/freertos_event
* rtos_examples/freertos_swtimer
* rtos_examples/freertos_i2c
* cmsis_driver_examples/i2c/int_b2b_transfer/slave
* cmsis_driver_examples/i2c/int_b2b_transfer/master
* cmsis_driver_examples/uart/sdma_transfer
* cmsis_driver_examples/uart/interrupt_transfer
* cmsis_driver_examples/ecspi/int_loopback_transfer
* cmsis_driver_examples/ecspi/sdma_loopback_transfer
* multicore_examples/rpmsg_lite_str_echo_rtos
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
* demo_apps/hello_world<!--
--><section end=DART-MX8M-MINI_DEMOS_SECTION/>


Further details about memory mapping are available in [https://www.nxp.com/webapp/Download?colCode=IMX8MMRM i.MX 8M-Mini Applications Processors Reference Manual] paragraphs:
=== Variscite Memory types ===
<section begin=DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
 
Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.
 
{| class="wikitable"
|-
! scope="col" | memory type
! scope="col" | M4 memory area
! scope="col" | A53 memory area
! scope="col" | memory lentgh
! scope="col" | linker file
|-
| DDR
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
| 16MB (DDR)
| MIMX8MM6xxxxx_cm4_ddr_ram.ld
|-
| TCM
| 0x1FFE0000-0x1FFFFFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
| 0x007E0000-0x007FFFFF (code)<br>0x00800000-0x0081FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
| 256kB (TCM) + 16MB (DDR)
| MIMX8MM6xxxxx_cm4_ram.ld
|-
|}
 
All linker files are locate in the '''armgcc''' folder of each demo.
 
The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M4 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M4.
 
The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M4 accessing the RPMSG area.
 
After launching the build_all.sh command the following folder will be created in the armgcc folder
 
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
 
Further details about memory mapping are available in the following [https://www.nxp.com/doc/IMX8MMRM i.MX 8M Mini Applications Processor Reference Manual] paragraphs:


* 2.1.2 Cortex-A53 Memory Map
* 2.1.2 Cortex-A53 Memory Map
Line 1,051: Line 1,135:
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''


= VAR-SOM-MX8M-NANO =
=== mcuxpresso-2.11.1-mx8mm-v1.0 ===
 
<section begin=MCUXPRESSO_2.11.1_V1.0_DART-MX8M-MINI/><!--
== Sections ==
-->{{#vardefine:OS|FreeRTOS}}<!--
 
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-MINI}}<!--
=== Available dtbs ===
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.11.1-mx8mm-v1.0}}<!--
<section begin=VAR-SOM-MX8M-NANO_DTBS_SECTION/><!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.11.1_V1.0_DART-MX8M-MINI}}<!--
-->To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m7''' label in the name, using the fdt_file environment variable in U-Boot.
-->{{#vardefine:MCUXPRESSO_VERSION|2.11.1}}<!--
 
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
{| class="wikitable"
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
|-
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.11.x-var01}}<!--
! scope="col" | File Name<br/>
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
! scope="col" | Description<br/>
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.07}}<!--
| style="padding: 5px;"| imx8mn-var-som-symphony-'''m7'''.dtb
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mm}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
|-
-->{{#vardefine:PINS_SECTION|DART-MX8M-MINI_PINS_SECTION_V2}}<!--
| style="padding: 5px;"| imx8mn-var-som-symphony-legacy-'''m7'''.dtb
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-MINI_DEMOS_SECTION}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
-->{{#vardefine:DTBS_SECTION|DART-MX8M-MINI_DTBS_SECTION}}<!--
|-
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION}}<!--
| style="padding: 5px;"| imx8mn-var-som-'''m7'''.dtb
-->{{#vardefine:JTAG_SECTION|DART-MX8M_JTAG_SECTION}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev > 1.0
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mm_mcuxpresso-2.11.1_v10}} <!--
|-
-->{{#vardefine:RELEASE_DATE|07/01/2022}} <!--
| style="padding: 5px;"| imx8mn-var-som-rev10-'''m7'''.dtb
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev 1.0
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
|-
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf}}<!--
| style="padding: 5px;"| fsl-imx8mn-var-som-'''m7'''.dtb
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MM}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev > 1.0
-->{{#vardefine:YOCTO_RELEASE_TAG|hardknott-fslc-5.4-2.3.x-mx8mm-v1.4}}<!--
|-
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch}}<!--
| style="padding: 5px;"| fsl-imx8mn-var-som-rev10-'''m7'''.dtb
-->{{#vardefine:BOARD_SDK|dart_mx8mm}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev 1.0
--><section end=MCUXPRESSO_2.11.1_V1.0_DART-MX8M-MINI/><!--
|-
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
|}
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DEACTIVATE_LMEM_CACHE_PATCH = '''{{#var:DEACTIVATE_LMEM_CACHE_PATCH}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''


This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.<!--
=== mcuxpresso-2.12.1-mx8mm-v1.0 ===
--><section end=VAR-SOM-MX8M-NANO_DTBS_SECTION/>
<section begin=MCUXPRESSO_2.12.1_V1.0_DART-MX8M-MINI/><!--
 
-->{{#vardefine:OS|FreeRTOS}}<!--
=== Default M7 pins ===
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-MINI}}<!--
<section begin=VAR-SOM-MX8M-NANO_PINS_SECTION/><!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.12.1-mx8mm-v1.0}}<!--
-->Default M7 pins used by the demos are:
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.12.1_V1.0_DART-MX8M-MINI}}<!--
 
-->{{#vardefine:MCUXPRESSO_VERSION|2.12.1}}<!--
{| class="wikitable"
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
|-
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
! scope="col" | function
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.12.x-var01}}<!--
! scope="col" | SoC balls
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
! scope="col" | VAR-SOM-MX8M-NANO pins
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
! scope="col" | Symphony pins
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.10}}<!--
! scope="col" | notes
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mm}}<!--
|-
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| UART3 RX/TX
-->{{#vardefine:PINS_SECTION|DART-MX8M-MINI_PINS_SECTION_V2}}<!--
| E18 / D18
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-MINI_DEMOS_SECTION}}<!--
| J1.175 / J1.124
-->{{#vardefine:DTBS_SECTION|DART-MX8M-MINI_DTBS_SECTION}}<!--
| J18.5 / J18.3
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION}}<!--
|
-->{{#vardefine:JTAG_SECTION|DART-MX8M_JTAG_SECTION}}<!--
|-
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mm_mcuxpresso-2.12.1_v10}} <!--
| GPIO4_IO23
-->{{#vardefine:RELEASE_DATE|11/04/2022}} <!--
| AC24
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| J1.21
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
| J16.5
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf}}<!--
|
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MM}}<!--
|-
-->{{#vardefine:YOCTO_RELEASE_TAG|mx8mm-yocto-kirkstone-5.15-2.0.x-v1.0}}<!--
| I2C4 SCL/SDA
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch}}<!--
| D13 / E13
-->{{#vardefine:BOARD_SDK|dart_mx8mm}}<!--
| J1.174 / J1.176
--><section end=MCUXPRESSO_2.12.1_V1.0_DART-MX8M-MINI/><!--
| J16.10 / J16.12
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
|
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
|-
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
| PWM3
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
| AF9
*SDK_PATH = '''{{#var:SDK_PATH}}'''
| J1.69
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
| J18.2
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
|
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DEACTIVATE_LMEM_CACHE_PATCH = '''{{#var:DEACTIVATE_LMEM_CACHE_PATCH}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
 
=== mcuxpresso-2.13.0-mx8mm-v1.0 ===
<section begin=MCUXPRESSO_2.13.0_V1.0_DART-MX8M-MINI/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-MINI}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.13.0-mx8mm-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.13.0_V1.0_DART-MX8M-MINI}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.13.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.13.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.10}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mm}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:PINS_SECTION|DART-MX8M-MINI_PINS_SECTION_V2}}<!--
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-MINI_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|DART-MX8M-MINI_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|DART-MX8M_JTAG_SECTION}}<!--
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mm_mcuxpresso-2.13.0_v10}} <!--
-->{{#vardefine:RELEASE_DATE|02/02/2023}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MM}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|mx8mm-yocto-kirkstone-5.15-2.0.x-v1.1}}<!--
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch}}<!--
-->{{#vardefine:BOARD_SDK|dart_mx8mm}}<!--
--><section end=MCUXPRESSO_2.13.0_V1.0_DART-MX8M-MINI/>
 
= VAR-SOM-MX8M-NANO =
 
== Sections ==
 
=== Available dtbs ===
<section begin=VAR-SOM-MX8M-NANO_DTBS_SECTION/><!--
-->To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m7''' label in the name, using the fdt_file environment variable in U-Boot.
 
{| class="wikitable"
|-
! scope="col" | File Name<br/>
! scope="col" | Description<br/>
|-
|-
| SPI1 CS0/SCK/SDI/SDO
| style="padding: 5px;"| imx8mn-var-som-symphony-'''m7'''.dtb
| B6 / D6 / A7 / B7
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel = 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above and for kernel >= 5.10.72 (Yocto Hardknott) on all Symphony-Boards
| J1.39 / J1.43 / J1.41 / J1.45
| J16.4/ J16.2 / J16.6 / J16.8
| enablind it SPI devices will be no longer visible from Linux
|-
|-
|}<!--
| style="padding: 5px;"| imx8mn-var-som-symphony-legacy-'''m7'''.dtb
--><section end=VAR-SOM-MX8M-NANO_PINS_SECTION/>
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel = 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
|-
| style="padding: 5px;"| imx8mn-var-som-'''m7'''.dtb
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev > 1.0
|-
| style="padding: 5px;"| imx8mn-var-som-rev10-'''m7'''.dtb
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev 1.0
|-
| style="padding: 5px;"| fsl-imx8mn-var-som-'''m7'''.dtb
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev > 1.0
|-
| style="padding: 5px;"| fsl-imx8mn-var-som-rev10-'''m7'''.dtb
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev 1.0
|-
|}


=== Available Demos ===
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.<!--
<section begin=VAR-SOM-MX8M-NANO_DEMOS_SECTION/><!--
--><section end=VAR-SOM-MX8M-NANO_DTBS_SECTION/>
-->* driver_examples/i2c/interrupt_b2b_transfer/slave
 
* driver_examples/i2c/interrupt_b2b_transfer/master
=== Default M7 pins ===
* driver_examples/i2c/polling_b2b_transfer/slave
<section begin=VAR-SOM-MX8M-NANO_PINS_SECTION/><!--
* driver_examples/i2c/polling_b2b_transfer/master
-->Default M7 pins used by the demos are:
* driver_examples/wdog
 
* driver_examples/sdma/scatter_gather
{| class="wikitable"
* driver_examples/sdma/memory_to_memory
|-
* driver_examples/gpio/led_output
! scope="col" | Function
* driver_examples/pwm
! scope="col" | SoC balls
* driver_examples/uart/auto_baudrate_detect
! scope="col" | VAR-SOM-MX8M-NANO pins
* driver_examples/uart/interrupt
! scope="col" | Symphony pins
* driver_examples/uart/idle_detect_sdma_transfer
! scope="col" | Notes
* driver_examples/uart/interrupt_rb_transfer
|-
* driver_examples/uart/sdma_transfer
| UART3 RX/TX
* driver_examples/uart/polling
| E18 / D18
* driver_examples/uart/interrupt_transfer
| J1.175 / J1.124
* driver_examples/gpt/timer
| J18.5 / J18.3
* driver_examples/gpt/capture
|
* driver_examples/ecspi/ecspi_loopback
|-
* driver_examples/ecspi/interrupt_b2b_transfer/slave
| GPIO4_IO23
* driver_examples/ecspi/interrupt_b2b_transfer/master
| AC24
* driver_examples/ecspi/polling_b2b_transfer/slave
| J1.21
* driver_examples/ecspi/polling_b2b_transfer/master
| J16.5
* driver_examples/rdc
|
* driver_examples/tmu_1/monitor_threshold
|-
* driver_examples/tmu_1/temperature_polling
| I2C4 SCL/SDA
* driver_examples/sema4/uboot
| D13 / E13
* rtos_examples/freertos_ecspi/ecspi_loopback
| J1.174 / J1.176
* rtos_examples/freertos_hello
| J16.10 / J16.12
* rtos_examples/freertos_queue
|
* rtos_examples/freertos_sem
|-
* rtos_examples/freertos_generic
| PWM3
* rtos_examples/freertos_uart
| AF9
* rtos_examples/freertos_tickless
| J1.69
* rtos_examples/freertos_mutex
| J18.2
* rtos_examples/freertos_event
|
* rtos_examples/freertos_swtimer
* rtos_examples/freertos_i2c
* cmsis_driver_examples/i2c/int_b2b_transfer/slave
* cmsis_driver_examples/i2c/int_b2b_transfer/master
* cmsis_driver_examples/uart/sdma_transfer
* cmsis_driver_examples/uart/interrupt_transfer
* cmsis_driver_examples/ecspi/int_loopback_transfer
* cmsis_driver_examples/ecspi/sdma_loopback_transfer
* multicore_examples/rpmsg_lite_str_echo_rtos
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
* demo_apps/hello_world<!--
--><section end=VAR-SOM-MX8M-NANO_DEMOS_SECTION/>
 
=== Memory types ===
<section begin=VAR-SOM-MX8MN_MEMORY-TYPES/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
 
Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.
 
{| class="wikitable"
|-
|-
! scope="col" | memory type
| SPI1 CS0/SCK/SDI/SDO
! scope="col" | M7 memory area
| B6 / D6 / A7 / B7
! scope="col" | A53 memory area
| J1.39 / J1.43 / J1.41 / J1.45
! scope="col" | memory lentgh
| J16.4/ J16.2 / J16.6 / J16.8
! scope="col" | linker file
| Enabling it SPI devices will be no longer visible from Linux
|-
|-
| DDR
|}<!--
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
--><section end=VAR-SOM-MX8M-NANO_PINS_SECTION/>
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
| 16MB (DDR)
| MIMX8MN6xxxxx_cm7_ddr_ram.ld
|-
| TCM
| 0x00000000-0x0001FFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
| 0x007E0000-0x007FFFFF (code)<br>0x00800000-0x0081FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
| 256kB (TCM) + 16MB (DDR)
| MIMX8MN6xxxxx_cm7_ram.ld
|-
|}


All linker files are locate in the '''armgcc''' folder of each demo.
=== Available Demos ===
 
<section begin=VAR-SOM-MX8M-NANO_DEMOS_SECTION/><!--
The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M7 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M7.
-->* driver_examples/i2c/interrupt_b2b_transfer/slave
 
* driver_examples/i2c/interrupt_b2b_transfer/master
The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.
* driver_examples/i2c/polling_b2b_transfer/slave
 
* driver_examples/i2c/polling_b2b_transfer/master
After launching the build_all.sh command the following folder will be created in the armgcc folder
* driver_examples/wdog
 
* driver_examples/sdma/scatter_gather
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/sdma/memory_to_memory
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* driver_examples/gpio/led_output
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/pwm
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
* driver_examples/uart/auto_baudrate_detect
 
* driver_examples/uart/interrupt
Further details about memory mapping are available in [https://www.nxp.com/webapp/Download?colCode=IMX8MNRM i.MX 8M Applications Processors Reference Manual] paragraphs:
* driver_examples/uart/idle_detect_sdma_transfer
 
* driver_examples/uart/interrupt_rb_transfer
* 2.1.2 Cortex-A53 Memory Map
* driver_examples/uart/sdma_transfer
* 2.1.3 Cortex-M7 Memory Map<!--
* driver_examples/uart/polling
--><section end=VAR-SOM-MX8MN_MEMORY-TYPES/>
* driver_examples/uart/interrupt_transfer
 
* driver_examples/gpt/timer
=== JTAG ===
* driver_examples/gpt/capture
<section begin=VAR-SOM-MX8MN_JTAG_SECTION/><!--
* driver_examples/ecspi/ecspi_loopback
-->VAR-SOM-MX8M-NANO exposes JTAG signals on a header (not assembled by default) on the SOM top left side.
* driver_examples/ecspi/interrupt_b2b_transfer/slave
 
* driver_examples/ecspi/interrupt_b2b_transfer/master
Here is the pinout:
* driver_examples/ecspi/polling_b2b_transfer/slave
 
* driver_examples/ecspi/polling_b2b_transfer/master
{| class="wikitable"
* driver_examples/rdc
|-
* driver_examples/tmu_1/monitor_threshold
! scope="col" | pin
* driver_examples/tmu_1/temperature_polling
! scope="col" | signal
* driver_examples/sema4/uboot
! scope="col" | description
* rtos_examples/freertos_ecspi/ecspi_loopback
! scope="col" | pin
* rtos_examples/freertos_hello
! scope="col" | signal
* rtos_examples/freertos_queue
! scope="col" | description
* rtos_examples/freertos_sem
* rtos_examples/freertos_generic
* rtos_examples/freertos_uart
* rtos_examples/freertos_tickless
* rtos_examples/freertos_mutex
* rtos_examples/freertos_event
* rtos_examples/freertos_swtimer
* rtos_examples/freertos_i2c
* cmsis_driver_examples/i2c/int_b2b_transfer/slave
* cmsis_driver_examples/i2c/int_b2b_transfer/master
* cmsis_driver_examples/uart/sdma_transfer
* cmsis_driver_examples/uart/interrupt_transfer
* cmsis_driver_examples/ecspi/int_loopback_transfer
* cmsis_driver_examples/ecspi/sdma_loopback_transfer
* multicore_examples/rpmsg_lite_str_echo_rtos
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
* demo_apps/hello_world<!--
--><section end=VAR-SOM-MX8M-NANO_DEMOS_SECTION/>
 
=== Memory types ===
<section begin=VAR-SOM-MX8MN_MEMORY-TYPES/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
 
Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.
 
{| class="wikitable"
|-
|-
| '''1'''
! scope="col" | memory type
| JTAG_VREF
! scope="col" | M7 memory area
| JTAG IO reference voltage,<br>connected to SOM_3V3_PER via 150 Ohm.
! scope="col" | A53 memory area
| '''2'''
! scope="col" | memory lentgh
| JTAG_TMS
! scope="col" | linker file
| JTAG Mode Select signal
|-
|-
| '''3'''
| DDR
| GND
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
| Digital Ground
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
| '''4'''
| 16MB (DDR)
| JTAG_TCK
| MIMX8MN6xxxxx_cm7_ddr_ram.ld
| JTAG Clock signal,<br>include PD of 8.2K Ohm.
|-
|-
| '''5'''
| TCM
| GND
| 0x00000000-0x0001FFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
| Digital Ground
| 0x007E0000-0x007FFFFF (code)<br>0x00800000-0x0081FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
| '''6'''
| 256kB (TCM) + 16MB (DDR)
| JTAG_TDO
| MIMX8MN6xxxxx_cm7_ram.ld
| JTAG Data Out signal
|-
|-
| '''7'''
|}
| GND
 
| Digital Ground
All linker files are locate in the '''armgcc''' folder of each demo.
| '''8'''
 
| JTAG_TDI
The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M7 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M7.
| JTAG Data In signal
 
|-
The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.
| '''9'''
| JTAG_TRST_B
| JTAG Reset signal,<br>active low signal
| '''10'''
| POR_B
| Programmer Reset,<br>used to put the SOC in reset state.
|-
|}


Please refer to SoM datasheet for further details.<!--
After launching the build_all.sh command the following folder will be created in the armgcc folder
--><section end=VAR-SOM-MX8MN_JTAG_SECTION/>


== Releases ==
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)


=== mcuxpresso-2.7.0-mx8mn-v1.0 ===
Further details about memory mapping are available in the following [https://www.nxp.com/doc/IMX8MNRM i.MX 8M Nano Applications Processor Reference Manual] paragraphs:
<section begin=MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO/><!--
                                                                                                     
-->{{#vardefine:OS|FreeRTOS}}<!--
* 2.1.2 Cortex-A53 Memory Map
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
* 2.1.3 Cortex-M7 Memory Map<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
--><section end=VAR-SOM-MX8MN_MEMORY-TYPES/>
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.7.0-mx8mn-v1.0}}<!--
 
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
=== JTAG ===
-->{{#vardefine:MCUXPRESSO_VERSION|2.7.0}}<!--
<section begin=VAR-SOM-MX8MN_JTAG_SECTION/><!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->VAR-SOM-MX8M-NANO exposes JTAG signals on a header (not assembled by default) on the SOM top left side.
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
 
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.7.x-var01}}<!--
Here is the pinout:
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/8-2019q3/RC1.1/gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2}}<!--
 
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2}}<!--
{| class="wikitable"
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-8-2019-q3-update}}<!--
|-
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
! scope="col" | pin
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
! scope="col" | signal
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8M-NANO_PINS_SECTION}}<!--
! scope="col" | description
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8M-NANO_DEMOS_SECTION}}<!--
! scope="col" | pin
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8M-NANO_DTBS_SECTION}}<!--
! scope="col" | signal
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
! scope="col" | description
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
|-
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.7.0_v10}} <!--
| '''1'''
-->{{#vardefine:RELEASE_DATE|5/3/2020}} <!--
| JTAG_VREF
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
| JTAG IO reference voltage,<br>connected to SOM_3V3_PER via 150 Ohm.
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
| '''2'''
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
| JTAG_TMS
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
| JTAG Mode Select signal
--><section end=MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO/><!--
|-
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
| '''3'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
| GND
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
| Digital Ground
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
| '''4'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
| JTAG_TCK
*SDK_PATH = '''{{#var:SDK_PATH}}'''
| JTAG Clock signal,<br>include PD of 8.2K Ohm.
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
|-
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
| '''5'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
| GND
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
| Digital Ground
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
| '''6'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
| JTAG_TDO
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
| JTAG Data Out signal
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
|-
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
| '''7'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
| GND
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
| Digital Ground
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
| '''8'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
| JTAG_TDI
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
| JTAG Data In signal
=== mcuxpresso-2.8.0-mx8mn-v1.0 ===
|-
<section begin=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO/><!--
| '''9'''
| JTAG_TRST_B
| JTAG Reset signal,<br>active low signal
| '''10'''
| POR_B
| Programmer Reset,<br>used to put the SOC in reset state.
|-
|}
 
Please refer to SoM datasheet for further details.<!--
--><section end=VAR-SOM-MX8MN_JTAG_SECTION/>
 
== Releases ==
 
=== mcuxpresso-2.7.0-mx8mn-v1.0 ===
<section begin=MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.8.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.7.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.8.0}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.7.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.8.x-var01}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.7.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/8-2019q3/RC1.1/gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-8-2019-q3-update}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
Line 1,355: Line 1,527:
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.7.0_v10}} <!--
-->{{#vardefine:RELEASE_DATE|5/3/2020}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.8.0_v10}}<!--
--><section end=MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->{{#vardefine:RELEASE_DATE|9/8/2020}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
--><section end=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
Line 1,382: Line 1,554:
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
 
=== mcuxpresso-2.8.0-mx8mn-v1.0 ===
=== mcuxpresso-2.9.0-mx8mn-v1.0 ===
<section begin=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO/><!--
<section begin=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.8.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.8.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.8.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
Line 1,406: Line 1,576:
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.9.0_v10}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.8.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|1/27/2021}}<!--
-->{{#vardefine:RELEASE_DATE|9/8/2020}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mn-v1.1}}<!--
--><section end=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO/><!--
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
Line 1,432: Line 1,601:
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''


=== mcuxpresso-2.10.0-mx8mn-v1.0 ===
=== mcuxpresso-2.9.0-mx8mn-v1.0 ===
<section begin=MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO/><!--
<section begin=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.10.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.10.0}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.10.x-var01}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10-2020-q4-major}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
Line 1,457: Line 1,625:
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.10.0_v10}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.9.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|10/21/2021}}<!--
-->{{#vardefine:RELEASE_DATE|1/27/2021}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mn-v1.6}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mn-v1.1}}<!--
-->{{#vardefine:BOARD_SDK|som_mx8mn}}<!--
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO/><!--
--><section end=MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
Line 1,486: Line 1,653:
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''


=== mcuxpresso-2.11.1-mx8mn-v1.0 ===
=== mcuxpresso-2.10.0-mx8mn-v1.0 ===
<section begin=MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO/><!--
<section begin=MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.11.1-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.10.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.11.1}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.10.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.11.x-var01}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.10.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
Line 1,509: Line 1,676:
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.11.1_v10}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.10.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|05/31/2022}}<!--
-->{{#vardefine:RELEASE_DATE|10/21/2021}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mn-v1.8}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mn-v1.6}}<!--
-->{{#vardefine:BOARD_SDK|som_mx8mn}}<!--
-->{{#vardefine:BOARD_SDK|som_mx8mn}}<!--
--><section end=MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO/><!--
--><section end=MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
Line 1,538: Line 1,705:
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''


= DART-MX8M-PLUS =
=== mcuxpresso-2.11.1-mx8mn-v1.0 ===
 
<section begin=MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO/><!--
== Sections ==
-->{{#vardefine:OS|FreeRTOS}}<!--
 
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
=== Available dtbs ===
-->{{#vardefine:SOC_HAS_M7|true}}<!--
<section begin=DART-MX8M-PLUS_DTBS_SECTION/><!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.11.1-mx8mn-v1.0}}<!--
-->To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m7''' label in the name, using the fdt_file environment variable in U-Boot.
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO}}<!--
 
-->{{#vardefine:MCUXPRESSO_VERSION|2.11.1}}<!--
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
 
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
{| class="wikitable"
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.11.x-var01}}<!--
|-
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
! scope="col" | File Name<br/>
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
! scope="col" | Description<br/>
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.07}}<!--
|-
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
| style="padding: 5px;"| imx8mp-var-dart-dt8customboard-'''m7'''.dtb
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| style="padding: 5px;"| DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on DT8MCustomBoard 2.x
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8M-NANO_PINS_SECTION}}<!--
|-
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8M-NANO_DEMOS_SECTION}}<!--
| style="padding: 5px;"| imx8mp-var-dart-dt8mcustomboard-legacy-'''m7'''.dtb
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8M-NANO_DTBS_SECTION}}<!--
| style="padding: 5px;"| DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on on DT8MCustomBoard 1.x
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
|-
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
| style="padding: 5px;"| imx8mp-var-som-symphony-'''m7'''.dtb
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
|-
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.11.1_v10}}<!--
| style="padding: 5px;"| imx8mp-var-som-symphony-2nd-ov5640'''m7'''.dtb
-->{{#vardefine:RELEASE_DATE|05/31/2022}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board with 2nd OV5640
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
|-
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
|}
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mn-v1.8}}<!--
 
-->{{#vardefine:BOARD_SDK|som_mx8mn}}<!--
<section end=DART-MX8M-PLUS_DTBS_SECTION/>
--><section end=MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO/><!--
 
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
=== Default M7 pins v1 ===
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
<section begin=DART-MX8M-PLUS_PINS_SECTION/><!--
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
-->Default M7 pins used by the demos are:
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''


{| class="wikitable"
=== mcuxpresso-2.12.1-mx8mn-v1.0 ===
|-
<section begin=MCUXPRESSO_2.12.1_V1.0_VAR-SOM-MX8M-NANO/><!--
! scope="col" | function
-->{{#vardefine:OS|FreeRTOS}}<!--
! scope="col" | SoC balls
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
! scope="col" | DART-MX8M-PLUS pins
-->{{#vardefine:SOC_HAS_M7|true}}<!--
! scope="col" | DT8MCB pins
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.12.1-mx8mn-v1.0}}<!--
! scope="col" | VAR-SOM-MX8M-PLUS pins
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.12.1_V1.0_VAR-SOM-MX8M-NANO}}<!--
! scope="col" | Symphony pins
-->{{#vardefine:MCUXPRESSO_VERSION|2.12.1}}<!--
! scope="col" | notes
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
|-
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
| UART3 RX/TX
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.12.x-var01}}<!--
| AE6 / AJ4
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
| J2.87 / J2.89
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
| J12.11 / J12.13
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.10}}<!--
|  
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
|  
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
|  
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8M-NANO_PINS_SECTION}}<!--
|-
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8M-NANO_DEMOS_SECTION}}<!--
| UART4 RX/TX
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8M-NANO_DTBS_SECTION}}<!--
| AH5 / AJ5
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
|  
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
|  
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
| J1.115 / J1.171
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
| J18.9 / J18.7
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.12.1_v10}}<!--
|  
-->{{#vardefine:RELEASE_DATE|11/14/2022}}<!--
|-
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
| GPIO3_IO14
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
| R26
-->{{#vardefine:YOCTO_RELEASE_TAG|mx8mn-yocto-hardknott-5.10.72_2.2.1-v1.0}}<!--
|  
-->{{#vardefine:BOARD_SDK|som_mx8mn}}<!--
|  
--><section end=MCUXPRESSO_2.12.1_V1.0_VAR-SOM-MX8M-NANO/><!--
| J1.79
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
| J17.10
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
|
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
|-
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
| GPIO4_IO03
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
| AF10
*SDK_PATH = '''{{#var:SDK_PATH}}'''
| J2.59
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
| GPLED1 on DT8MCB rev 1.x<br>J11.20 on DT8MCB rev 2.x
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
|  
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
|
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
|
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
|-
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
| I2C3 SCL/SDA
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
| AJ7 / AJ6
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
| J3.46 / J3.42
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
| J12.18/ J12.20
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
|
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
|
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
|
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
 
=== mcuxpresso-2.13.0-mx8mn-v1.0 ===
<section begin=MCUXPRESSO_2.13.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.13.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.13.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.13.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.13.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.10}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8M-NANO_PINS_SECTION}}<!--
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8M-NANO_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8M-NANO_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.13.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|02/13/2023}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|mx8mn-yocto-kirkstone-5.15-2.0.x-v1.0}}<!--
-->{{#vardefine:BOARD_SDK|som_mx8mn}}<!--
--><section end=MCUXPRESSO_2.13.0_V1.0_VAR-SOM-MX8M-NANO/>
 
= DART-MX8M-PLUS =
 
== Sections ==
 
=== Available dtbs ===
<section begin=DART-MX8M-PLUS_DTBS_SECTION/><!--
-->To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m7''' label in the name, using the fdt_file environment variable in U-Boot.
 
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.
 
{| class="wikitable"
|-
|-
| I2C4 SCL/SDA
! scope="col" | File Name<br/>
| AF8 / AD8
! scope="col" | Description<br/>
|
|
| J1.92 / J1.90
| J16.13 / J16.15
| enabling it SPI devices will be no longer visible from Linux
|-
|-
| PWM2
| style="padding: 5px;"| imx8mp-var-dart-dt8customboard-'''m7'''.dtb
| D8
| style="padding: 5px;"| DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on DT8MCustomBoard 2.x
|  
|
| J1.69
| J18.2
|
|-
|-
| PWM3
| style="padding: 5px;"| imx8mp-var-dart-dt8mcustomboard-legacy-'''m7'''.dtb
| AE18
| style="padding: 5px;"| DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on on DT8MCustomBoard 1.x
| J3.36
| J14.7
|
|
|
|-
|-
| SPI1 CS0/SCK/SDI/SDO
| style="padding: 5px;"| imx8mp-var-som-symphony-'''m7'''.dtb
| AE20 / AF20 / AD20 / AC20
| style="padding: 5px;"| VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board
| J2.79 / J2.77 / J2.81 / J2.83
| J16.4/ J16.2 / J16.8 / J16.6
|
|
| enabling it SPI devices will be no longer visible from Linux
|-
|-
| SPI2 CS0/SCK/SDI/SDO
| style="padding: 5px;"| imx8mp-var-som-symphony-2nd-ov5640'''m7'''.dtb
| AJ22 / AH21 / AH20 / AJ21
| style="padding: 5px;"| VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board with 2nd OV5640
|  
|  
| J1.39 / J1.43 / J1.41 / J1.45
| J16.4/ J16.2 / J16.6 / J16.8
| enabling it SPI devices will be no longer visible from Linux
|-
|-
{{#ifeq: {{#var:MCUXPRESSO_VERSION}} | 2.10.0 |
|}
{{!}}-
 
{{!}} FLEXCAN1 RX/TX {{!}}{{!}} AH15 / AJ16 {{!}}{{!}} j2.56 / j2.50 {{!}}{{!}} J13.11 / J13.5 on DT8MCB rev 1.x, TTL levels (CAN transceiver not mounted!) {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}} enabling it FLEXCAN1 devices will be no longer visible from Linux
<section end=DART-MX8M-PLUS_DTBS_SECTION/>
{{!}}-
 
{{!}}  {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}}  J16.9 / J16.7 on DT8MCB rev 2.x, CANL/CANH levels (CAN transceiver mounted!) {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}}
=== Default M7 pins v1 ===
{{!}}-
<section begin=DART-MX8M-PLUS_PINS_SECTION/><!--
{{!}} FLEXCAN2 RX/TX {{!}}{{!}} AJ4 / AE6 {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}} J1.46 / J1.44 {{!}}{{!}} J16.18 / J16.20, CANL/CANH levels (CAN transceiver mounted!) {{!}}{{!}} enabling it FLEXCAN2 devices will be no longer visible from Linux
-->Default M7 pins used by the demos are:
{{!}}-
}}
|}<!--
--><section end=DART-MX8M-PLUS_PINS_SECTION/>


=== Available Demos ===
{| class="wikitable"
<section begin=DART-MX8M-PLUS_DEMOS_SECTION/><!--
|-
-->* driver_examples/i2c/interrupt_b2b_transfer/slave
! scope="col" | Function
* driver_examples/i2c/interrupt_b2b_transfer/master
! scope="col" | SoC balls
* driver_examples/i2c/polling_b2b_transfer/slave
! scope="col" | DART-MX8M-PLUS pins
* driver_examples/i2c/polling_b2b_transfer/master
! scope="col" | DT8MCB pins
* driver_examples/wdog
! scope="col" | VAR-SOM-MX8M-PLUS pins
* driver_examples/sdma/scatter_gather
! scope="col" | Symphony pins
* driver_examples/sdma/memory_to_memory
! scope="col" | Notes
* driver_examples/gpio/led_output
|-
* driver_examples/pwm
| UART3 RX/TX
* driver_examples/uart/auto_baudrate_detect
| AE6 / AJ4
* driver_examples/uart/interrupt
| J2.87 / J2.89
* driver_examples/uart/interrupt_rb_transfer
| J12.11 / J12.13
* driver_examples/uart/polling
|
* driver_examples/uart/interrupt_transfer
|
* driver_examples/gpt/timer
|
* driver_examples/gpt/capture
|-
* driver_examples/ecspi/ecspi_loopback
| UART4 RX/TX
* driver_examples/ecspi/interrupt_b2b_transfer/slave
| AH5 / AJ5
* driver_examples/ecspi/interrupt_b2b_transfer/master
|
* driver_examples/ecspi/polling_b2b_transfer/slave
|
* driver_examples/ecspi/polling_b2b_transfer/master
| J1.115 / J1.171
* driver_examples/rdc
| J18.9 / J18.7
* driver_examples/tmu/monitor_threshold
|
* driver_examples/tmu/temperature_polling
|-
* driver_examples/sema4/uboot
| GPIO3_IO14
{{#if: {{#var:SDK_SUPPORT_CAN}} |
| R26
* driver_examples/canfd/interrupt_transfer
|
* driver_examples/canfd/loopback
|
* driver_examples/canfd/loopback_transfer
| J1.79
* driver_examples/canfd/ping_pong_buffer_transfer
| J17.10
* driver_examples/flexcan/interrupt_transfer
|
* driver_examples/flexcan/loopback
|-
* driver_examples/flexcan/loopback_transfer
| GPIO4_IO03
* driver_examples/flexcan/ping_pong_buffer_transfer
| AF10
}}
| J2.59
* rtos_examples/freertos_ecspi/ecspi_loopback
| GPLED1 on DT8MCB rev 1.x<br>J11.20 on DT8MCB rev 2.x
* rtos_examples/freertos_hello
|
* rtos_examples/freertos_queue
|
* rtos_examples/freertos_sem
|
* rtos_examples/freertos_generic
|-
* rtos_examples/freertos_uart
| I2C3 SCL/SDA
* rtos_examples/freertos_tickless
| AJ7 / AJ6
* rtos_examples/freertos_mutex
| J3.46 / J3.42
* rtos_examples/freertos_event
| J12.18/ J12.20
* rtos_examples/freertos_swtimer
|
* rtos_examples/freertos_i2c
|
* cmsis_driver_examples/i2c/int_b2b_transfer/slave
|
* cmsis_driver_examples/i2c/int_b2b_transfer/master
|-
* cmsis_driver_examples/uart/interrupt_transfer
| I2C4 SCL/SDA
* cmsis_driver_examples/ecspi/int_loopback_transfer
| AF8 / AD8
* cmsis_driver_examples/ecspi/sdma_loopback_transfer
|
* multicore_examples/rpmsg_lite_str_echo_rtos
|
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
| J1.92 / J1.90
* demo_apps/hello_world
| J16.13 / J16.15
* driver_examples/uart/idle_detect_sdma_transfer
| Enabling it SPI devices will be no longer visible from Linux
* driver_examples/uart/sdma_transfer
* cmsis_driver_examples/uart/sdma_transfer<!--
--><section end=DART-MX8M-PLUS_DEMOS_SECTION/>
 
=== Variscite Memory types ===
<section begin=DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
 
Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.
 
{| class="wikitable"
|-
|-
! scope="col" | memory type
| PWM2
! scope="col" | M7 memory area
| D8
! scope="col" | A53 memory area
|  
! scope="col" | memory lentgh
|  
! scope="col" | linker file
| J1.69
| J18.2
|
|-
|-
| DDR
| PWM3
| 0x80000000-0x801FFFFF (code)<br>0x80200000-0x803FFFFF (data)<br>0x80400000-0x80FFFFFF (data2)
| AE18
| 0x80000000-0x801FFFFF (code)<br>0x80200000-0x803FFFFF (data)<br>0x80400000-0x80FFFFFF (data2)
| J3.36
| 16MB (DDR)
| J14.7
| MIMX8MN6xxxxx_cm7_ddr_ram.ld
|
|
|
|-
| SPI1 CS0/SCK/SDI/SDO
| AE20 / AF20 / AD20 / AC20
| J2.79 / J2.77 / J2.81 / J2.83
| J16.4/ J16.2 / J16.8 / J16.6
|
|
| Enabling it SPI devices will be no longer visible from Linux
|-
|-
| TCM
| SPI2 CS0/SCK/SDI/SDO
| 0x00000000-0x0001FFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x80000000-0x80FFFFFF (data2)
| AJ22 / AH21 / AH20 / AJ21
| 0x007E0000-0x007FFFFF (code)<br>0x00800000-0x0081FFFF (data)<br>0x80000000-0x80FFFFFF (data2)
|  
| 256kB (TCM) + 16MB (DDR)
|  
| MIMX8MN6xxxxx_cm7_ram.ld
| J1.39 / J1.43 / J1.41 / J1.45
| J16.4/ J16.2 / J16.6 / J16.8
| Enabling it SPI devices will be no longer visible from Linux
|-
|-
|}
{{#ifeq: {{#var:MCUXPRESSO_VERSION}} | 2.9.0 |
|
{{!}}-
{{!}} FLEXCAN1 RX/TX {{!}}{{!}} AH15 / AJ16 {{!}}{{!}} j2.56 / j2.50 {{!}}{{!}} J13.11 / J13.5 on DT8MCB rev 1.x, TTL levels (CAN transceiver not mounted!) {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}} Enabling it FLEXCAN1 devices will be no longer visible from Linux
{{!}}-
{{!}}  {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}}  J16.9 / J16.7 on DT8MCB rev 2.x, CANL/CANH levels (CAN transceiver mounted!) {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}}
{{!}}-
{{!}} FLEXCAN2 RX/TX {{!}}{{!}} AJ4 / AE6 {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}} J1.46 / J1.44 {{!}}{{!}} J16.18 / J16.20, CANL/CANH levels (CAN transceiver mounted!) {{!}}{{!}} Enabling it FLEXCAN2 devices will be no longer visible from Linux
{{!}}-
}}
|}<!--
--><section end=DART-MX8M-PLUS_PINS_SECTION/>


All linker files are locate in the '''armgcc''' folder of each demo.
=== Available Demos ===
 
<section begin=DART-MX8M-PLUS_DEMOS_SECTION/><!--
The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x80000000 - 0x80FFFFFF.
-->* driver_examples/i2c/interrupt_b2b_transfer/slave
 
* driver_examples/i2c/interrupt_b2b_transfer/master
The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.
* driver_examples/i2c/polling_b2b_transfer/slave
 
* driver_examples/i2c/polling_b2b_transfer/master
After launching the build_all.sh command the following folder will be created in the armgcc folder
* driver_examples/wdog
 
* driver_examples/sdma/scatter_gather
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/sdma/memory_to_memory
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* driver_examples/gpio/led_output
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/pwm
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
* driver_examples/uart/auto_baudrate_detect
 
* driver_examples/uart/interrupt
Further details about memory mapping are available in [https://www.nxp.com/webapp/Download?colCode=IMX8MPRM.pdf i.MX 8M-Plus Applications Processors Reference Manual] paragraphs:
* driver_examples/uart/interrupt_rb_transfer
 
* driver_examples/uart/polling
* 2.2 Cortex-A53 Memory Map
* driver_examples/uart/interrupt_transfer
* 2.3 Cortex-M7 Memory Map<!--
* driver_examples/gpt/timer
--><section end=DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION/>
* driver_examples/gpt/capture
 
* driver_examples/ecspi/ecspi_loopback
=== JTAG ===
* driver_examples/ecspi/interrupt_b2b_transfer/slave
<section begin=DART-MX8M-PLUS_JTAG_SECTION/><!--
* driver_examples/ecspi/interrupt_b2b_transfer/master
 
* driver_examples/ecspi/polling_b2b_transfer/slave
-->The VAR-SOM-MX8M-PLUS exposes JTAG interface via an optional 10-pin header, on the SOM top left side.<br>
* driver_examples/ecspi/polling_b2b_transfer/master
The DART-MX8M-PLUS exports JTAG interface via an optional 10-pin header, on the DT8MCustomBoard top side.
* driver_examples/rdc
 
* driver_examples/tmu/monitor_threshold
Here is the pinout:
* driver_examples/tmu/temperature_polling
 
* driver_examples/sema4/uboot
{| class="wikitable"
{{#if: {{#var:SDK_SUPPORT_CAN}} |
|-
* driver_examples/canfd/interrupt_transfer
! scope="col" | pin
* driver_examples/canfd/loopback
! scope="col" | signal
* driver_examples/canfd/loopback_transfer
! scope="col" | description
* driver_examples/canfd/ping_pong_buffer_transfer
! scope="col" | pin
* driver_examples/flexcan/interrupt_transfer
! scope="col" | signal
* driver_examples/flexcan/loopback
! scope="col" | description
* driver_examples/flexcan/loopback_transfer
|-
* driver_examples/flexcan/ping_pong_buffer_transfer
| '''1'''
}}
| JTAG_VREF
* rtos_examples/freertos_ecspi/ecspi_loopback
| JTAG IO reference voltage,<br>connected to SOM_3V3_PER via 150 Ohm.
* rtos_examples/freertos_hello
| '''2'''
* rtos_examples/freertos_queue
| JTAG_TMS
* rtos_examples/freertos_sem
| JTAG Mode Select signal
* rtos_examples/freertos_generic
* rtos_examples/freertos_uart
* rtos_examples/freertos_tickless
* rtos_examples/freertos_mutex
* rtos_examples/freertos_event
* rtos_examples/freertos_swtimer
* rtos_examples/freertos_i2c
* cmsis_driver_examples/i2c/int_b2b_transfer/slave
* cmsis_driver_examples/i2c/int_b2b_transfer/master
* cmsis_driver_examples/uart/interrupt_transfer
* cmsis_driver_examples/ecspi/int_loopback_transfer
* cmsis_driver_examples/ecspi/sdma_loopback_transfer
* multicore_examples/rpmsg_lite_str_echo_rtos
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
* demo_apps/hello_world
* driver_examples/uart/idle_detect_sdma_transfer
* driver_examples/uart/sdma_transfer
* cmsis_driver_examples/uart/sdma_transfer<!--
--><section end=DART-MX8M-PLUS_DEMOS_SECTION/>
 
=== Variscite Memory types ===
<section begin=DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
 
Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.
 
{| class="wikitable"
|-
|-
| '''3'''
! scope="col" | memory type
| GND
! scope="col" | M7 memory area
| Digital Ground
! scope="col" | A53 memory area
| '''4'''
! scope="col" | memory lentgh
| JTAG_TCK
! scope="col" | linker file
| JTAG Clock signal,<br>include PD of 8.2K Ohm.
|-
|-
| '''5'''
| DDR
| GND
| 0x80000000-0x801FFFFF (code)<br>0x80200000-0x803FFFFF (data)<br>0x80400000-0x80FFFFFF (data2)
| Digital Ground
| 0x80000000-0x801FFFFF (code)<br>0x80200000-0x803FFFFF (data)<br>0x80400000-0x80FFFFFF (data2)
| '''6'''
| 16MB (DDR)
| JTAG_TDO
| MIMX8MN6xxxxx_cm7_ddr_ram.ld
| JTAG Data Out signal
|-
|-
| '''7'''
| TCM
| GND
| 0x00000000-0x0001FFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x80000000-0x80FFFFFF (data2)
| Digital Ground
| 0x007E0000-0x007FFFFF (code)<br>0x00800000-0x0081FFFF (data)<br>0x80000000-0x80FFFFFF (data2)
| '''8'''
| 256kB (TCM) + 16MB (DDR)
| JTAG_TDI
| MIMX8MN6xxxxx_cm7_ram.ld
| JTAG Data In signal
|-
| '''9'''
| JTAG_TRST_B
| JTAG Reset signal,<br>active low signal
| '''10'''
| POR_B
| Programmer Reset,<br>used to put the SOC in reset state.
|-
|-
|}
|}


Please refer to SoM datasheet for further details.<!--
All linker files are locate in the '''armgcc''' folder of each demo.
--><section end=DART-MX8M-PLUS_JTAG_SECTION/>


== Releases ==
The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x80000000 - 0x80FFFFFF.
 
The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.
 
After launching the build_all.sh command the following folder will be created in the armgcc folder
 
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
 
Further details about memory mapping are available in the following [https://www.nxp.com/doc/IMX8MPRM i.MX 8M Plus Applications Processor Reference Manual] paragraphs:
 
* 2.2 Cortex-A53 Memory Map
* 2.3 Cortex-M7 Memory Map<!--
--><section end=DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION/>
 
=== JTAG ===
<section begin=DART-MX8M-PLUS_JTAG_SECTION/><!--


=== mcuxpresso-2.9.0-mx8mp-v1.0 ===
-->The VAR-SOM-MX8M-PLUS exposes JTAG interface via an optional 10-pin header, on the SOM top left side.<br>
<section begin=MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS/><!--
The DART-MX8M-PLUS exports JTAG interface via an optional 10-pin header, on the DT8MCustomBoard top side.
-->{{#vardefine:OS|FreeRTOS}}<!--
 
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
Here is the pinout:
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8mp-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.9.0_v10}} <!--
-->{{#vardefine:RELEASE_DATE|5/27/2021}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|zeus-fsl-5.4.70_2.3.2-mx8mp-v1.1}}<!--
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
--><section end=MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''


=== mcuxpresso-2.10.0-mx8mp-v1.0 ===
{| class="wikitable"
<section begin=MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS/><!--
|-
-->{{#vardefine:OS|FreeRTOS}}<!--
! scope="col" | pin
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
! scope="col" | signal
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.10.0-mx8mp-v1.0}}<!--
! scope="col" | description
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS}}<!--
! scope="col" | pin
-->{{#vardefine:MCUXPRESSO_VERSION|2.10.0}}<!--
! scope="col" | signal
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
! scope="col" | description
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
|-
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.10.x-var01}}<!--
| '''1'''
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
| JTAG_VREF
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
| JTAG IO reference voltage,<br>connected to SOM_3V3_PER via 150 Ohm.
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10-2020-q4-major}}<!--
| '''2'''
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
| JTAG_TMS
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
| JTAG Mode Select signal
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
|-
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
| '''3'''
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
| GND
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
| Digital Ground
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
| '''4'''
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
| JTAG_TCK
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.10.0_v10}} <!--
| JTAG Clock signal,<br>include PD of 8.2K Ohm.
-->{{#vardefine:RELEASE_DATE|9/27/2021}} <!--
|-
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| '''5'''
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
| GND
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
| Digital Ground
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
| '''6'''
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
| JTAG_TDO
-->{{#vardefine:YOCTO_RELEASE_TAG|hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2}}<!--
| JTAG Data Out signal
-->{{#vardefine:BOARD_SDK|dart_mx8mp}}<!--
|-
--><section end=MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS/><!--
| '''7'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
| GND
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
| Digital Ground
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
| '''8'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
| JTAG_TDI
*SDK_PATH = '''{{#var:SDK_PATH}}'''
| JTAG Data In signal
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
|-
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
| '''9'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
| JTAG_TRST_B
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
| JTAG Reset signal,<br>active low signal
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
| '''10'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
| POR_B
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
| Programmer Reset,<br>used to put the SOC in reset state.
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
|-
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
|}
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
 
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
Please refer to SoM datasheet for further details.<!--
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
--><section end=DART-MX8M-PLUS_JTAG_SECTION/>
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
 
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
== Releases ==
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''


=== mcuxpresso-2.11.1-mx8mp-v1.0 ===
=== mcuxpresso-2.9.0-mx8mp-v1.0 ===
<section begin=MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS/><!--
<section begin=MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.11.1-mx8mp-v1.0}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8mp-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.11.1}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.11.x-var01}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.07}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
Line 1,968: Line 2,166:
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.11.1_v10}} <!--
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.9.0_v10}} <!--
-->{{#vardefine:RELEASE_DATE|5/26/2022}} <!--
-->{{#vardefine:RELEASE_DATE|5/27/2021}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|zeus-fsl-5.4.70_2.3.2-mx8mp-v1.1}}<!--
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
-->{{#vardefine:SDK_SUPPORT_CAN|yes}}<!--
--><section end=MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS/><!--
-->{{#vardefine:YOCTO_RELEASE_TAG|hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2}}<!--
-->{{#vardefine:BOARD_SDK|dart_mx8mp}}<!--
--><section end=MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
Line 2,001: Line 2,197:
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''


= VAR-SOM-MX8X =
=== mcuxpresso-2.10.0-mx8mp-v1.0 ===
 
<section begin=MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS/><!--
== Sections ==
-->{{#vardefine:OS|FreeRTOS}}<!--
 
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
=== Available dtbs ===
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.10.0-mx8mp-v1.0}}<!--
<section begin=VAR-SOM-MX8X_DTBS_SECTION/><!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS}}<!--
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.
-->{{#vardefine:MCUXPRESSO_VERSION|2.10.0}}<!--
 
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
 
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.10.x-var01}}<!--
{| class="wikitable"
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
! scope="col" | File Name<br/>
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10-2020-q4-major}}<!--
! scope="col" | Description<br/>
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
|-
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
| style="padding: 5px;"| imx8qxp-var-som-symphony-sd-'''m4'''.dtb
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| style="padding: 5px;"| VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
|-
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
| style="padding: 5px;"| imx8qxp-var-som-symphony-'''m4'''.dtb
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
| style="padding: 5px;"| VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
|-
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
|}
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.10.0_v10}} <!--
<section end=VAR-SOM-MX8X_DTBS_SECTION/>
-->{{#vardefine:RELEASE_DATE|9/27/2021}} <!--
 
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
=== Default M4 pins ===
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
<section begin=VAR-SOM-MX8X_PINS_SECTION/><!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
-->Default M4 pins used by the demos are:
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2}}<!--
-->{{#vardefine:BOARD_SDK|dart_mx8mp}}<!--
--><section end=MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''


{| class="wikitable"
=== mcuxpresso-2.11.1-mx8mp-v1.0 ===
|-
<section begin=MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS/><!--
! scope="col" | function
-->{{#vardefine:OS|FreeRTOS}}<!--
! scope="col" | pin
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
|-
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.11.1-mx8mp-v1.0}}<!--
| debug UART (UART2)
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS}}<!--
| RX: J18.5 / TX: J18.3
-->{{#vardefine:MCUXPRESSO_VERSION|2.11.1}}<!--
|-
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
| I2C (I2C3)
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
| SCL: J16.10 / SDA: J16.12
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.11.x-var01}}<!--
|-
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
| M4 GPIO (M40_GPIO0_IO00)
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
| J16.3
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.07}}<!--
|-
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
| M4 PWM (M40_TPM0_CH0)
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
| J16.7
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
|-
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
<!--
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
| CAN (CAN1)
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
| RX: J18.9 / TX: J18.7
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
|-
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
-->
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.11.1_v10}} <!--
|}<!--
-->{{#vardefine:RELEASE_DATE|5/26/2022}} <!--
--><section end=VAR-SOM-MX8X_PINS_SECTION/>
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
 
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
=== Available Demos ===
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
<section begin=VAR-SOM-MX8X_DEMOS_SECTION/><!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
-->* cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
* cmsis_driver_examples/lpi2c/int_b2b_transfer/master
-->{{#vardefine:SDK_SUPPORT_CAN|yes}}<!--
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
-->{{#vardefine:YOCTO_RELEASE_TAG|hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2}}<!--
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
-->{{#vardefine:BOARD_SDK|dart_mx8mp}}<!--
* cmsis_driver_examples/lpuart/edma_transfer
--><section end=MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS/><!--
* cmsis_driver_examples/lpuart/interrupt_transfer
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
* demo_apps/hello_world
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
* driver_examples/edma/scatter_gather
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
* driver_examples/edma/memory_to_memory
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
* driver_examples/intmux
*SDK_PATH = '''{{#var:SDK_PATH}}'''
* driver_examples/lpi2c/edma_b2b_transfer/slave
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
* driver_examples/lpi2c/edma_b2b_transfer/master
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
* driver_examples/lpi2c/interrupt_b2b_transfer/slave
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
* driver_examples/lpi2c/interrupt_b2b_transfer/master
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
* driver_examples/lpi2c/polling_b2b_transfer/slave
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
* driver_examples/lpi2c/polling_b2b_transfer/master
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
* driver_examples/lpi2c/read_accel_value_transfer
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
* driver_examples/lpit
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
* driver_examples/lpuart/edma_transfer
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
* driver_examples/lpuart/interrupt_rb_transfer
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
* driver_examples/lpuart/polling
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
* driver_examples/lpuart/interrupt_transfer
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
* driver_examples/rgpio/led_output
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
* driver_examples/sema42/uboot
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
* driver_examples/tpm/input_capture
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
* driver_examples/tpm/dual_edge_capture
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''
* driver_examples/tpm/timer
 
* driver_examples/tpm/simple_pwm
=== mcuxpresso-2.12.1-mx8mp-v1.0 ===
* driver_examples/tpm/output_compare
<section begin=MCUXPRESSO_2.12.1_V1.0_DART-MX8M-PLUS/><!--
* driver_examples/tstmr
-->{{#vardefine:OS|FreeRTOS}}<!--
* driver_examples/wdog32
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
* mmcau_examples/mmcau_api
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.12.1-mx8mp-v1.0}}<!--
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.12.1_V1.0_DART-MX8M-PLUS}}<!--
* multicore_examples/rpmsg_lite_str_echo_rtos
-->{{#vardefine:MCUXPRESSO_VERSION|2.12.1}}<!--
* rtos_examples/freertos_hello
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
* rtos_examples/freertos_queue
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
* rtos_examples/freertos_sem
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.12.x-var01}}<!--
* rtos_examples/freertos_generic
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
* rtos_examples/freertos_tickless
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
* rtos_examples/freertos_mutex
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.10}}<!--
* rtos_examples/freertos_event
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
* rtos_examples/freertos_swtimer
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
Additional demos are available as reference code, but require HW/SW customization.<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
* demo_apps/power_mode_switch
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
* driver_examples/canfd/loopback_transfer
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
* driver_examples/canfd/loopback
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
* driver_examples/canfd/interrupt_transfer
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
* driver_examples/enet/txrx_multiring_transfer
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
* driver_examples/enet/txrx_transfer
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.12.1_v10}} <!--
* driver_examples/enet/txrx_ptp1588_transfer
-->{{#vardefine:RELEASE_DATE|11/02/2022}} <!--
* driver_examples/flexcan/loopback_edma_transfer
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
* driver_examples/flexcan/loopback_transfer
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
* driver_examples/flexcan/loopback
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
* driver_examples/flexcan/interrupt_transfer
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
* driver_examples/ftm/pwm_twochannel
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
* driver_examples/ftm/combine_pwm
-->{{#vardefine:SDK_SUPPORT_CAN|yes}}<!--
* driver_examples/ftm/input_capture
-->{{#vardefine:YOCTO_RELEASE_TAG|mx8mp-yocto-kirkstone-5.15-2.0.x-v1.0}}<!--
* driver_examples/ftm/dual_edge_capture
-->{{#vardefine:BOARD_SDK|dart_mx8mp}}<!--
* driver_examples/ftm/timer
--><section end=MCUXPRESSO_2.12.1_V1.0_DART-MX8M-PLUS/><!--
* driver_examples/ftm/simple_pwm
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
* driver_examples/ftm/output_compare
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
* driver_examples/gpio/led_output
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
* driver_examples/lpadc/interrupt
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
* driver_examples/lpadc/polling
*SDK_PATH = '''{{#var:SDK_PATH}}'''
* lwip_examples/lwip_ping/bm
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
* lwip_examples/lwip_ping/freertos
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
* lwip_examples/lwip_iperf/bm
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
* lwip_examples/lwip_httpsrv/bm
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
* lwip_examples/lwip_httpsrv/freertos
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
* lwip_examples/lwip_tcpecho/bm
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
* lwip_examples/lwip_tcpecho/freertos
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
* lwip_examples/lwip_udpecho/bm
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
* lwip_examples/lwip_udpecho/freertos
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
* lwip_examples/lwip_dhcp/bm
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
* lwip_examples/lwip_dhcp/freertos
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
--><!--
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
--><section end=VAR-SOM-MX8X_DEMOS_SECTION/>
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''


=== NXP Memory types ===
=== mcuxpresso-2.13.0-mx8mp-v1.0 ===
<section begin=VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION/><!--
<section begin=MCUXPRESSO_2.13.0_V1.0_DART-MX8M-PLUS/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.13.0-mx8mp-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.13.0_V1.0_DART-MX8M-PLUS}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.13.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.13.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.10}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.13.0_v10}} <!--
-->{{#vardefine:RELEASE_DATE|02/08/2023}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
-->{{#vardefine:SDK_SUPPORT_CAN|yes}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|mx8mp-yocto-kirkstone-5.15-2.0.x-v1.2}}<!--
-->{{#vardefine:BOARD_SDK|dart_mx8mp}}<!--
--><section end=MCUXPRESSO_2.13.0_V1.0_DART-MX8M-PLUS/>
 
= VAR-SOM-MX8X =
 
== Sections ==
 
=== Available dtbs ===
<section begin=VAR-SOM-MX8X_DTBS_SECTION/><!--
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.


Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.


{| class="wikitable"
{| class="wikitable"
|-
|-
! scope="col" | memory type
! scope="col" | File Name<br/>
! scope="col" | M4 memory area
! scope="col" | Description<br/>
! scope="col" | A35 memory area
! scope="col" | memory lentgh
! scope="col" | linker file
|-
|-
| DDR
| style="padding: 5px;"| imx8qxp-var-som-symphony-sd-'''m4'''.dtb
| 0x88000000-0x881FFFFF (code)<br>0x88200000-0x883FFFFF (data)<br>0x88400000-0x8FFFFFFF (data2)
| style="padding: 5px;"| VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
| 0x88000000-0x881FFFFF (code)<br>0x88200000-0x883FFFFF (data)<br>0x88400000-0x8FFFFFFF (data2)
| 128MB (DDR)
| MIMX8QX6xxxFZ_cm4_ddr_ram.ld
|-
|-
| TCM
| style="padding: 5px;"| imx8qxp-var-som-symphony-'''m4'''.dtb
| 0x1FFE0000-0x1FFFFFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x88000000-0x8FFFFFFF (data2)
| style="padding: 5px;"| VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
| 0x34FE0000-0x34FFFFFF (code)<br>0x35000000-0x3501FFFF (data)<br>0x88000000-0x8FFFFFFF (data2)
| 256kB (TCM) + 128MB (DDR)
| MIMX8QX6xxxFZ_cm4_ram.ld
|-
|-
|}
|}
<section end=VAR-SOM-MX8X_DTBS_SECTION/>


All linker files are locate in the '''armgcc''' folder of each demo.
=== Default M4 pins ===
 
<section begin=VAR-SOM-MX8X_PINS_SECTION/><!--
After launching the build_all.sh command the following folder will be created in the armgcc folder
-->Default M4 pins used by the demos are:
 
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
 
Further details about memory mapping are available in [https://www.nxp.com/webapp/Download?colCode=IMX8DQXPRM i.MX 8DualXPlus/8QuadXPlus Applications Processor Reference Manual] paragraphs:
 
* 2.2 System Memory Map
* 2.2.9 Cortex-M4 Memory Map<!--
--><section end=VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION/>
 
=== JTAG ===
<section begin=VAR-SOM-MX8X_JTAG_SECTION/><!--
-->The VAR-SOM-MX8X exposes JTAG interface via an optional 10-pin header
 
Here is the pinout:


{| class="wikitable"
{| class="wikitable"
|-
|-
! scope="col" | pin
! scope="col" | Function
! scope="col" | signal
! scope="col" | Pin
! scope="col" | description
|-
! scope="col" | pin
| debug UART (UART2)
! scope="col" | signal (ball)
| RX: J18.5 / TX: J18.3
! scope="col" | description
|-
|-
| '''1'''
| I2C (I2C3)
| JTAG_VREF
| SCL: J16.10 / SDA: J16.12
| JTAG reference voltage (3.3V)
| '''2'''
| JTAG_TMS (AG35)
| JTAG Mode Select
|-
|-
| '''3'''
| M4 GPIO (M40_GPIO0_IO00)
| GND
| J16.3
| Digital Ground
| '''4'''
| JTAG_TCK (AE31)
| JTAG Clock
|-
|-
| '''5'''
| M4 PWM (M40_TPM0_CH0)
| GND
| J16.7
| Digital Ground
| '''6'''
| JTAG_TDO (AF32)
| JTAG Data Out
|-
|-
| '''7'''
<!--
| RTCK
| CAN (CAN1)
| JTAG Return clock
| RX: J18.9 / TX: J18.7
| '''8'''
| JTAG_TDI (AH34)
| JTAG Data In
|-
|-
| '''9'''
-->
| JTAG_TRST_B_CONN
|}<!--
| JTAG TAP reset
--><section end=VAR-SOM-MX8X_PINS_SECTION/>
| '''10'''
| JTAG_SRST_B
| JTAG System reset
|-
|}


Please refer to SOM datasheet for further details.
=== Available Demos ===
 
<section begin=VAR-SOM-MX8X_DEMOS_SECTION/><!--
<!--
-->* cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
--><section end=VAR-SOM-MX8X_JTAG_SECTION/>
* cmsis_driver_examples/lpi2c/int_b2b_transfer/master
 
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
== Releases ==
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
 
* cmsis_driver_examples/lpuart/edma_transfer
=== mcuxpresso-2.5.2-mx8qx-v1.0 ===
* cmsis_driver_examples/lpuart/interrupt_transfer
<section begin=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X/><!--
* demo_apps/hello_world
-->{{#vardefine:OS|FreeRTOS}}<!--
* driver_examples/edma/scatter_gather
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
* driver_examples/edma/memory_to_memory
-->{{#vardefine:SOC_HAS_SCU|true}}<!--
* driver_examples/intmux
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.5.2-mx8qx-v1.0}}<!--
* driver_examples/lpi2c/edma_b2b_transfer/slave
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X}}<!--
* driver_examples/lpi2c/edma_b2b_transfer/master
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
* driver_examples/lpi2c/interrupt_b2b_transfer/slave
-->{{#vardefine:MCUXPRESSO_VERSION|2.5.2}}<!--
* driver_examples/lpi2c/interrupt_b2b_transfer/master
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
* driver_examples/lpi2c/polling_b2b_transfer/slave
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
* driver_examples/lpi2c/polling_b2b_transfer/master
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.5.x-var01}}<!--
* driver_examples/lpi2c/read_accel_value_transfer
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
* driver_examples/lpit
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
* driver_examples/lpuart/edma_transfer
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-7-2018-q2-update}}<!--
* driver_examples/lpuart/interrupt_rb_transfer
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
* driver_examples/lpuart/polling
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
* driver_examples/lpuart/interrupt_transfer
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
* driver_examples/rgpio/led_output
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
* driver_examples/sema42/uboot
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
* driver_examples/tpm/input_capture
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
* driver_examples/tpm/dual_edge_capture
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
* driver_examples/tpm/timer
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for i.MX 8QuadXPlus.pdf}}<!--
* driver_examples/tpm/simple_pwm
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
* driver_examples/tpm/output_compare
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
* driver_examples/tstmr
-->{{#vardefine:SCFW_PATCH_URL|ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW}} <!--
* driver_examples/wdog32
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
* mmcau_examples/mmcau_api
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.5.2_v10}} <!--
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
-->{{#vardefine:RELEASE_DATE|2/10/2020}} <!--
* multicore_examples/rpmsg_lite_str_echo_rtos
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
* rtos_examples/freertos_hello
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
* rtos_examples/freertos_queue
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
* rtos_examples/freertos_sem
--><section end=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X/><!--
* rtos_examples/freertos_generic
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
* rtos_examples/freertos_tickless
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
* rtos_examples/freertos_mutex
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
* rtos_examples/freertos_event
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
* rtos_examples/freertos_swtimer
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
Additional demos are available as reference code, but require HW/SW customization.<!--
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
* demo_apps/power_mode_switch
*SDK_PATH = '''{{#var:SDK_PATH}}'''
* driver_examples/canfd/loopback_transfer
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
* driver_examples/canfd/loopback
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
* driver_examples/canfd/interrupt_transfer
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
* driver_examples/enet/txrx_multiring_transfer
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
* driver_examples/enet/txrx_transfer
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
* driver_examples/enet/txrx_ptp1588_transfer
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
* driver_examples/flexcan/loopback_edma_transfer
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
* driver_examples/flexcan/loopback_transfer
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
* driver_examples/flexcan/loopback
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
* driver_examples/flexcan/interrupt_transfer
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
* driver_examples/ftm/pwm_twochannel
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
* driver_examples/ftm/combine_pwm
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
* driver_examples/ftm/input_capture
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
* driver_examples/ftm/dual_edge_capture
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
* driver_examples/ftm/timer
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
* driver_examples/ftm/simple_pwm
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
* driver_examples/ftm/output_compare
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
* driver_examples/gpio/led_output
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
* driver_examples/lpadc/interrupt
* driver_examples/lpadc/polling
* lwip_examples/lwip_ping/bm
* lwip_examples/lwip_ping/freertos
* lwip_examples/lwip_iperf/bm
* lwip_examples/lwip_httpsrv/bm
* lwip_examples/lwip_httpsrv/freertos
* lwip_examples/lwip_tcpecho/bm
* lwip_examples/lwip_tcpecho/freertos
* lwip_examples/lwip_udpecho/bm
* lwip_examples/lwip_udpecho/freertos
* lwip_examples/lwip_dhcp/bm
* lwip_examples/lwip_dhcp/freertos
--><!--
--><section end=VAR-SOM-MX8X_DEMOS_SECTION/>


=== mcuxpresso-2.8.0-mx8qx-v1.0 ===
=== NXP Memory types ===
<section begin=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X/><!--
<section begin=VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
 
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.8.0-mx8qx-v1.0}}<!--
Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X}}<!--
 
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
{| class="wikitable"
-->{{#vardefine:MCUXPRESSO_VERSION|2.8.0}}<!--
|-
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
! scope="col" | memory type
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
! scope="col" | M4 memory area
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.8.x-var01}}<!--
! scope="col" | A35 memory area
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
! scope="col" | memory lentgh
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
! scope="col" | linker file
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
|-
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
| DDR
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| 0x88000000-0x881FFFFF (code)<br>0x88200000-0x883FFFFF (data)<br>0x88400000-0x8FFFFFFF (data2)
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
| 0x88000000-0x881FFFFF (code)<br>0x88200000-0x883FFFFF (data)<br>0x88400000-0x8FFFFFFF (data2)
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
| 128MB (DDR)
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
| MIMX8QX6xxxFZ_cm4_ddr_ram.ld
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
|-
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
| TCM
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf}}<!--
| 0x1FFE0000-0x1FFFFFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x88000000-0x8FFFFFFF (data2)
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
| 0x34FE0000-0x34FFFFFF (code)<br>0x35000000-0x3501FFFF (data)<br>0x88000000-0x8FFFFFFF (data2)
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
| 256kB (TCM) + 128MB (DDR)
-->{{#vardefine:SCFW_PATCH_URL|ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW}} <!--
| MIMX8QX6xxxFZ_cm4_ram.ld
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
|-
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
|}
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.8.0_v10}}<!--
 
-->{{#vardefine:RELEASE_DATE|02/18/2021}}<!--
All linker files are locate in the '''armgcc''' folder of each demo.
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
 
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
After launching the build_all.sh command the following folder will be created in the armgcc folder
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8x-v1.0}}<!--
 
--><section end=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X/><!--
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
 
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
Further details about memory mapping are available in the following [https://www.nxp.com/doc/IMX8DQXPRM i.MX 8DualX/8DualXPlus/8QuadXPlus Applications Processor Reference Manual] paragraphs:
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}


=== mcuxpresso-2.9.0-mx8qx-v1.0 ===
* 2.2 System Memory Map
<section begin=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X/><!--
* 2.2.9 Cortex-M4 Memory Map<!--
-->{{#vardefine:OS|FreeRTOS}}<!--
--><section end=VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION/>
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
 
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8qx-v1.0}}<!--
=== JTAG ===
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X}}<!--
<section begin=VAR-SOM-MX8X_JTAG_SECTION/><!--
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
-->The VAR-SOM-MX8X exposes JTAG interface via an optional 10-pin header
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
 
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
Here is the pinout:
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
 
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
{| class="wikitable"
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
! scope="col" | pin
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
! scope="col" | signal
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
! scope="col" | description
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
! scope="col" | pin
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
! scope="col" | signal (ball)
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
! scope="col" | description
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
|-
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
| '''1'''
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
| JTAG_VREF
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf}}<!--
| JTAG reference voltage (3.3V)
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
| '''2'''
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
| JTAG_TMS (AG35)
-->{{#vardefine:SCFW_PATCH_URL|ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW}} <!--
| JTAG Mode Select
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
|-
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
| '''3'''
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.9.0_v10}}<!--
| GND
-->{{#vardefine:RELEASE_DATE|03/04/2021}}<!--
| Digital Ground
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| '''4'''
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
| JTAG_TCK (AE31)
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8x-v1.0}}<!--
| JTAG Clock
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-i.MX8QX-deactivated-the-LMEM-caches-to-debug-in-exte.patch}}<!--
|-
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X/><!--
| '''5'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
| GND
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
| Digital Ground
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
| '''6'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
| JTAG_TDO (AF32)
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
| JTAG Data Out
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
|-
*SDK_PATH = '''{{#var:SDK_PATH}}'''
| '''7'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
| RTCK
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
| JTAG Return clock
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
| '''8'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
| JTAG_TDI (AH34)
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
| JTAG Data In
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
|-
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
| '''9'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
| JTAG_TRST_B_CONN
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
| JTAG TAP reset
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
| '''10'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
| JTAG_SRST_B
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
| JTAG System reset
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
|-
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
|}
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
 
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
Please refer to SOM datasheet for further details.
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}


= VAR-SOM-MX8 =
<!--
--><section end=VAR-SOM-MX8X_JTAG_SECTION/>


== Sections ==
== Releases ==


=== Available dtbs ===
=== mcuxpresso-2.5.2-mx8qx-v1.0 ===
<section begin=VAR-SOM-MX8_DTBS_SECTION/><!--
<section begin=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X/><!--
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.
-->{{#vardefine:OS|FreeRTOS}}<!--
 
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.<br>
-->{{#vardefine:SOC_HAS_SCU|true}}<!--
 
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.5.2-mx8qx-v1.0}}<!--
{| class="wikitable"
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X}}<!--
|-
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
! scope="col" | File Name<br/>
-->{{#vardefine:MCUXPRESSO_VERSION|2.5.2}}<!--
! scope="col" | Description<br/>
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
|-
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
| style="padding: 5px;"| imx8qm-var-som-symphony-dp-'''m4'''.dtb
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.5.x-var01}}<!--
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
| style="padding: 5px;"| imx8qm-var-som-symphony-hdmi-'''m4'''.dtb
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-7-2018-q2-update}}<!--
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
|-
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| style="padding: 5px;"| imx8qm-var-som-symphony-lvds-'''m4'''.dtb
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
|-
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
| style="padding: 5px;"| imx8qm-var-spear-sp8customboard-dp-'''m4'''.dtb
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
| style="padding: 5px;"| DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
|-
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for i.MX 8QuadXPlus.pdf}}<!--
| style="padding: 5px;"| imx8qm-var-spear-sp8customboard-hdmi-'''m4'''.dtb
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
| style="padding: 5px;"| DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
|-
-->{{#vardefine:SCFW_PATCH_URL|{{VAR_FILES_DOMAIN_URL}}/VAR-SOM-MX8X/Software/SCFW}} <!--
| style="padding: 5px;"| imx8qm-var-spear-sp8customboard-lvds.'''m4'''.dtb
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
| style="padding: 5px;"| DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.5.2_v10}} <!--
|-
-->{{#vardefine:RELEASE_DATE|2/10/2020}} <!--
| style="padding: 5px;"| imx8qm-var-som-dp-'''m4'''.dtb
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
|-
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
| style="padding: 5px;"| imx8qm-var-som-hdmi-'''m4'''.dtb
--><section end=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X/><!--
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
|-
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
| style="padding: 5px;"| imx8qm-var-som-lvds-'''m4'''.dtb
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
|-
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
| style="padding: 5px;"| imx8qm-var-spear-dp-'''m4'''.dtb
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
| style="padding: 5px;"| DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
*SDK_PATH = '''{{#var:SDK_PATH}}'''
|-
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
| style="padding: 5px;"| imx8qm-var-spear-hdmi-'''m4'''.dtb
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
| style="padding: 5px;"| DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
|-
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
| style="padding: 5px;"| imx8qm-var-spear-lvds-'''m4'''.dtb
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
| style="padding: 5px;"| DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
|-
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
|}
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
<section end=VAR-SOM-MX8_DTBS_SECTION/>
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}


=== Default M4 pins ===
=== mcuxpresso-2.8.0-mx8qx-v1.0 ===
<section begin=VAR-SOM-MX8_PINS_SECTION/><!--
<section begin=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X/><!--
-->Default M4 pins used by the demos are:
-->{{#vardefine:OS|FreeRTOS}}<!--
 
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
{| class="wikitable"
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.8.0-mx8qx-v1.0}}<!--
|-
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X}}<!--
! scope="col" | function
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
! scope="col" | SoC balls
-->{{#vardefine:MCUXPRESSO_VERSION|2.8.0}}<!--
! scope="col" | VAR-SOM-MX8 pins
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
! scope="col" | Symphony pins
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
! scope="col" | SPEAR-MX8 pins
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.8.x-var01}}<!--
! scope="col" | SP8CustomBoard pins
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
! scope="col" | notes
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
| M40_UART0 RX / TX
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
| AM44 / AU51
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| N/A
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
| N/A
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
| J3.32 / J3.38
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
| J40
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
| SP8CustomBoard requires SW8 ON, SW9 OFF
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
|-
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf}}<!--
| DMA_UART2 RX / TX
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
| BE35 / BE37
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
| J1.175 / J1.124
-->{{#vardefine:SCFW_PATCH_URL|{{VAR_FILES_DOMAIN_URL}}/VAR-SOM-MX8X/Software/SCFW}} <!--
| J18.5 / J18.3
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
| J1.80 / J1.82
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
| J26.19 /J26.17
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.8.0_v10}}<!--
|
-->{{#vardefine:RELEASE_DATE|02/18/2021}}<!--
|-
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| DMA_UART4 RX / TX
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
| AR47 / AU53
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8x-v1.0}}<!--
| J1.115 / J1.171
--><section end=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X/><!--
| J18.9 / J18.7
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
| J3.34 / J3.29
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
| J20.2 / J20.4
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
| SPEAR-MX8 demos do not refer it
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
|-
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
| FLEXCAN0 RX/TX
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
| C5 / H6
*SDK_PATH = '''{{#var:SDK_PATH}}'''
| J1.46 / J1.44
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
| J16.18 / J16.20
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
| J4.79 / J4.80
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
| J26.1 / J26.3
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
|
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
|-
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
| M41_I2C0 SCL/SDA
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
| AR45 / AU49
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
| N/A
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
| N/A
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
| J1.9 / J3.36
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
| J20.18 / J20.20
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
|
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
|-
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
| DMA_I2C0 SCL/SDA
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
| BN9 / BN7
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
| J1.174 / J1.176
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
| J16.10 / J16.12
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
| J2.88 / J1.90
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
| J26.2 / J26.4
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
|
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
|-
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
| DMA_SPI0 CS0 / SCK / SDI / SDO
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}
| BC1 / BB4 / BA5 / AY6
 
| J1.79 / J1.75 / J1.77 / J1.70
=== mcuxpresso-2.9.0-mx8qx-v1.0 ===
| J17.10 / J17.6 / J17.8 / J17.4
<section begin=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X/><!--
| J2.78 / j2.74 / J2.72 / J2.76
-->{{#vardefine:OS|FreeRTOS}}<!--
| J20.7 / J20.1 / J20.5 / J20.3
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
|
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8qx-v1.0}}<!--
|-
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X}}<!--
| ADC_IN6
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
| AL9
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
| J1.39
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
| J16.4
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
| J4.62
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
| J29.16
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
| VAR-SOM-MX8 requires enabling a buffer (refer to the datasheet)
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
| M40_TPM0 0 / 1
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
| AR47 / AU53
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| J1.115 / J1.171
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
| J18.9 / J18.7
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
| J3.34 / J3.29
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
| J20.2 / J20.4
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
| pins are share with with DMA_UART4
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
|-
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf}}<!--
| GPIO3_IO06
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
| BA3
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
| J1.40
-->{{#vardefine:SCFW_PATCH_URL|{{VAR_FILES_DOMAIN_URL}}/VAR-SOM-MX8X/Software/SCFW}} <!--
| J17.2
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
| J2.80
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
| J20.9
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.9.0_v10}}<!--
|
-->{{#vardefine:RELEASE_DATE|03/04/2021}}<!--
|-
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
|}<!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
--><section end=VAR-SOM-MX8_PINS_SECTION/>
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8x-v1.0}}<!--
 
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-i.MX8QX-deactivated-the-LMEM-caches-to-debug-in-exte.patch}}<!--
=== Available Demos ===
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X/><!--
<section begin=VAR-SOM-MX8_DEMOS_SECTION/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
-->* cmsis_driver_examples/lpi2c/int_b2b_transfer/master
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
* cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
* cmsis_driver_examples/lpuart/edma_transfer
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
* cmsis_driver_examples/lpuart/interrupt_transfer
*SDK_PATH = '''{{#var:SDK_PATH}}'''
* cmsis_driver_examples/lpspi/edma_b2b_transfer/master
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
* cmsis_driver_examples/lpspi/edma_b2b_transfer/slave
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
* cmsis_driver_examples/lpspi/int_b2b_transfer/master
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
* cmsis_driver_examples/lpspi/int_b2b_transfer/slave
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
* demo_apps/hello_world
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
* driver_examples/canfd/loopback_transfer
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
* driver_examples/canfd/loopback
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
* driver_examples/canfd/interrupt_transfer
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
* driver_examples/edma/scatter_gather
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
* driver_examples/edma/memory_to_memory
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
* driver_examples/flexcan/loopback_edma_transfer
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
* driver_examples/flexcan/loopback_transfer
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
* driver_examples/flexcan/loopback
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
* driver_examples/flexcan/interrupt_transfer
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
* driver_examples/intmux
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
* driver_examples/lpadc/interrupt
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
* driver_examples/lpadc/polling
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
* driver_examples/lpi2c/edma_b2b_transfer/slave
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
* driver_examples/lpi2c/edma_b2b_transfer/master
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
* driver_examples/lpi2c/interrupt_b2b_transfer/slave
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
* driver_examples/lpi2c/interrupt_b2b_transfer/master
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
* driver_examples/lpi2c/polling_b2b_transfer/slave
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
* driver_examples/lpi2c/polling_b2b_transfer/master
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}
* driver_examples/lpi2c/read_accel_value_transfer
 
* driver_examples/lpspi/edma_b2b_transfer/master
= VAR-SOM-MX8 =
* driver_examples/lpspi/edma_b2b_transfer/slave
 
* driver_examples/lpspi/interrupt_b2b/master
== Sections ==
* driver_examples/lpspi/interrupt_b2b/slave
 
* driver_examples/lpspi/interrupt_b2b_transfer/master
=== Available dtbs ===
* driver_examples/lpspi/interrupt_b2b_transfer/slave
<section begin=VAR-SOM-MX8_DTBS_SECTION/><!--
* driver_examples/lpspi/polling_b2b_transfer/master
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.
* driver_examples/lpspi/polling_b2b_transfer/slave
 
* driver_examples/lpspi/polling_b2b_transfer/master
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.<br>
* driver_examples/lpspi/polling_b2b_transfer/slave
 
* driver_examples/lpit
{| class="wikitable"
* driver_examples/lpuart/edma_transfer
|-
* driver_examples/lpuart/interrupt_rb_transfer
! scope="col" | File Name<br/>
* driver_examples/lpuart/polling
! scope="col" | Description<br/>
* driver_examples/lpuart/interrupt_transfer
|-
* driver_examples/lpuart/interrupt
| style="padding: 5px;"| imx8qm-var-som-symphony-dp-'''m4'''.dtb
* driver_examples/gpio/led_output
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
* driver_examples/rgpio/led_output
|-
* driver_examples/sema42/uboot
| style="padding: 5px;"| imx8qm-var-som-symphony-hdmi-'''m4'''.dtb
* driver_examples/sema42/dual_core
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
* driver_examples/tpm/timer
|-
* driver_examples/tpm/simple_pwm
| style="padding: 5px;"| imx8qm-var-som-symphony-lvds-'''m4'''.dtb
* driver_examples/tpm/pwm_twochannel
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
* driver_examples/tpm/output_compare
|-
* driver_examples/tpm/input_capture
| style="padding: 5px;"| imx8qm-var-spear-sp8customboard-dp-'''m4'''.dtb
* driver_examples/tpm/dual_edge_capture
| style="padding: 5px;"| DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
* driver_examples/tpm/combine_pwm
|-
* driver_examples/tstmr
| style="padding: 5px;"| imx8qm-var-spear-sp8customboard-hdmi-'''m4'''.dtb
* driver_examples/wdog32
| style="padding: 5px;"| DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
* mmcau_examples/mmcau_api
|-
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
| style="padding: 5px;"| imx8qm-var-spear-sp8customboard-lvds.'''m4'''.dtb
* multicore_examples/rpmsg_lite_str_echo_rtos
| style="padding: 5px;"| DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
* multicore_examples/rpmsg_lite_pingpong_rtos/sdk_remote
|-
* multicore_examples/rpmsg_lite_pingpong_rtos/sdk_master
| style="padding: 5px;"| imx8qm-var-som-dp-'''m4'''.dtb
* rtos_examples/freertos_hello
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
* rtos_examples/freertos_queue
|-
* rtos_examples/freertos_sem
| style="padding: 5px;"| imx8qm-var-som-hdmi-'''m4'''.dtb
* rtos_examples/freertos_generic
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
* rtos_examples/freertos_tickless
|-
* rtos_examples/freertos_mutex
| style="padding: 5px;"| imx8qm-var-som-lvds-'''m4'''.dtb
* rtos_examples/freertos_lpuart
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
* rtos_examples/freertos_event
|-
* rtos_examples/freertos_swtimer
| style="padding: 5px;"| imx8qm-var-spear-dp-'''m4'''.dtb
* rtos_examples/freertos_lpi2c
| style="padding: 5px;"| DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
* rtos_examples/freertos_lpspi_b2b/master
|-
* rtos_examples/freertos_lpspi_b2b/slave
| style="padding: 5px;"| imx8qm-var-spear-hdmi-'''m4'''.dtb
* rtos_examples/freertos_lpspi
| style="padding: 5px;"| DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
Additional demos are available as reference code, but require HW/SW customization.
|-
<!--
| style="padding: 5px;"| imx8qm-var-spear-lvds-'''m4'''.dtb
* demo_apps/power_mode_switch
| style="padding: 5px;"| DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
* driver_examples/enet/txrx_multiring_transfer
|-
* driver_examples/enet/txrx_transfer
|}
* driver_examples/enet/txrx_ptp1588_transfer
<section end=VAR-SOM-MX8_DTBS_SECTION/>
* lwip_examples/lwip_ping/bm
 
* lwip_examples/lwip_ping/freertos
=== Default M4 pins ===
* lwip_examples/lwip_iperf/bm
<section begin=VAR-SOM-MX8_PINS_SECTION/><!--
* lwip_examples/lwip_httpsrv/bm
-->Default M4 pins used by the demos are:
* lwip_examples/lwip_httpsrv/freertos
 
* lwip_examples/lwip_tcpecho/bm
{| class="wikitable"
* lwip_examples/lwip_tcpecho/freertos
|-
* lwip_examples/lwip_udpecho/bm
! scope="col" | Function
* lwip_examples/lwip_udpecho/freertos
! scope="col" | SoC balls
* lwip_examples/lwip_dhcp/bm
! scope="col" | VAR-SOM-MX8 pins
* lwip_examples/lwip_dhcp/freertos
! scope="col" | Symphony pins
--><!--
! scope="col" | SPEAR-MX8 pins
{{#if: {{#var:SOC_HAS_SCU}} |
! scope="col" | SP8CustomBoard pins
if needed, RPMSG functionality require applying the following kernel patch for the kernel 4.14.98
! scope="col" | Notes
 
|-
<pre>
| M40_UART0 RX / TX
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-som-common.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-som-common.dtsi
| AM44 / AU51
index 1814a639d8f0..dcc12eb85c0a 100644
| N/A
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-som-common.dtsi
| N/A
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-som-common.dtsi
| J3.32 / J3.38
@@ -1205,28 +1205,28 @@
| J40
};
| SP8CustomBoard requires SW8 ON, SW9 OFF
|-
&intmux_cm40 {
| DMA_UART2 RX / TX
- status = "okay";
| BE35 / BE37
+ status = "didabled";
| J1.175 / J1.124
};
| J18.5 / J18.3
| J1.80 / J1.82
&rpmsg{
| J26.19 /J26.17
/*
|
* 64K for one rpmsg instance:
|-
*/
| DMA_UART4 RX / TX
- vdev-nums = <1>;
| AR47 / AU53
- reg = <0x0 0x90000000 0x0 0x10000>;
| J1.115 / J1.171
+ vdev-nums = <2>;
| J18.9 / J18.7
+ reg = <0x0 0x90000000 0x0 0x20000>;
| J3.34 / J3.29
status = "okay";
| J20.2 / J20.4
};
| SPEAR-MX8 demos do not refer it
|-
&intmux_cm41 {
| FLEXCAN0 RX/TX
- status = "okay";
| C5 / H6
+ status = "disabled";
| J1.46 / J1.44
};
| J16.18 / J16.20
| J4.79 / J4.80
&rpmsg1{
| J26.1 / J26.3
/*
|
* 64K for one rpmsg instance:
|-
*/
| M41_I2C0 SCL/SDA
- vdev-nums = <1>;
| AR45 / AU49
- reg = <0x0 0x90100000 0x0 0x10000>;
| N/A
+ vdev-nums = <2>;
| N/A
+ reg = <0x0 0x90100000 0x0 0x20000>;
| J1.9 / J3.36
status = "okay";
| J20.18 / J20.20
};
|
|-
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-spear-common.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-spear-common.dtsi
| DMA_I2C0 SCL/SDA
index 982da0e412f8..5df8783e56aa 100644
| BN9 / BN7
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-spear-common.dtsi
| J1.174 / J1.176
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-spear-common.dtsi
| J16.10 / J16.12
@@ -1357,28 +1357,28 @@
| J2.88 / J1.90
};
| J26.2 / J26.4
|
&intmux_cm40 {
|-
- status = "okay";
| DMA_SPI0 CS0 / SCK / SDI / SDO
+ status = "disabled";
| BC1 / BB4 / BA5 / AY6
};
| J1.79 / J1.75 / J1.77 / J1.70
| J17.10 / J17.6 / J17.8 / J17.4
&rpmsg {
| J2.78 / j2.74 / J2.72 / J2.76
/*
| J20.7 / J20.1 / J20.5 / J20.3
* 64K for one rpmsg instance:
|
*/
|-
- vdev-nums = <1>;
| ADC_IN6
- reg = <0x0 0x90000000 0x0 0x10000>;
| AL9
+ vdev-nums = <2>;
| J1.39
+ reg = <0x0 0x90000000 0x0 0x20000>;
| J16.4
status = "okay";
| J4.62
};
| J29.16
| VAR-SOM-MX8 requires enabling a buffer (refer to the datasheet)
&intmux_cm41 {
|-
- status = "okay";
| M40_TPM0 0 / 1
+ status = "disabled";
| AR47 / AU53
};
| J1.115 / J1.171
| J18.9 / J18.7
&rpmsg1 {
| J3.34 / J3.29
/*
| J20.2 / J20.4
* 64K for one rpmsg instance:
| pins are share with with DMA_UART4
*/
|-
- vdev-nums = <1>;
| GPIO3_IO06
- reg = <0x0 0x90100000 0x0 0x10000>;
| BA3
+ vdev-nums = <2>;
| J1.40
+ reg = <0x0 0x90100000 0x0 0x20000>;
| J17.2
status = "okay";
| J2.80
};
| J20.9
</pre>
|
}}
|-
--><section end=VAR-SOM-MX8_DEMOS_SECTION/>
|}<!--
 
--><section end=VAR-SOM-MX8_PINS_SECTION/>
=== NXP Memory types ===
 
<section begin=VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION/><!--
=== Available Demos ===
-->The SDK allow linking using 2 different memory types: DDR, TCM.
<section begin=VAR-SOM-MX8_DEMOS_SECTION/><!--
 
-->* cmsis_driver_examples/lpi2c/int_b2b_transfer/master
Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.
* cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
 
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
{| class="wikitable"
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
|-
* cmsis_driver_examples/lpuart/edma_transfer
! scope="col" | memory type
* cmsis_driver_examples/lpuart/interrupt_transfer
! scope="col" | M4 if
* cmsis_driver_examples/lpspi/edma_b2b_transfer/master
! scope="col" | M4 memory area
* cmsis_driver_examples/lpspi/edma_b2b_transfer/slave
! scope="col" | memory lentgh
* cmsis_driver_examples/lpspi/int_b2b_transfer/master
! scope="col" | linker file
* cmsis_driver_examples/lpspi/int_b2b_transfer/slave
|-
* demo_apps/hello_world
| DDR
* driver_examples/canfd/loopback_transfer
| 0
* driver_examples/canfd/loopback
| 0x88000000-0x881FFFFF (code)<br>0x88200000-0x883FFFFF (data)<br>0x88400000-0x887FFFFF (data2)
* driver_examples/canfd/interrupt_transfer
| 8MB (DDR)
* driver_examples/edma/scatter_gather
| MIMX8QM6xxxFF_cm4_core0_ddr_ram.ld
* driver_examples/edma/memory_to_memory
|-
* driver_examples/flexcan/loopback_edma_transfer
| DDR
* driver_examples/flexcan/loopback_transfer
| 1
* driver_examples/flexcan/loopback
| 0x88800000-0x88BFFFFF (code)<br>0x88C00000-0x88FFFFFF (data)<br>0x89000000-0x8FFFFFFF (data2)
* driver_examples/flexcan/interrupt_transfer
| 120MB (DDR)
* driver_examples/intmux
| MIMX8QM6xxxFF_cm4_core1_ddr_ram.ld
* driver_examples/lpadc/interrupt
|-
* driver_examples/lpadc/polling
| TCM
* driver_examples/lpi2c/edma_b2b_transfer/slave
| 0
* driver_examples/lpi2c/edma_b2b_transfer/master
| 0x1FFE0000-0x1FFFFFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x88000000-0x887FFFFF (data2)
* driver_examples/lpi2c/interrupt_b2b_transfer/slave
| 256kB (TCM) + 8MB (DDR)
* driver_examples/lpi2c/interrupt_b2b_transfer/master
| MIMX8QM6xxxFF_cm4_core0_ram.ld
* driver_examples/lpi2c/polling_b2b_transfer/slave
|-
* driver_examples/lpi2c/polling_b2b_transfer/master
| TCM
* driver_examples/lpi2c/read_accel_value_transfer
| 1
* driver_examples/lpspi/edma_b2b_transfer/master
| 0x1FFE0000-0x1FFFFFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x88800000-0x8FFFFFFF (data2)
* driver_examples/lpspi/edma_b2b_transfer/slave
| 256kB (TCM) + 120MB (DDR)
* driver_examples/lpspi/interrupt_b2b/master
| MIMX8QM6xxxFF_cm4_core1_ram.ld
* driver_examples/lpspi/interrupt_b2b/slave
|-
* driver_examples/lpspi/interrupt_b2b_transfer/master
|}
* driver_examples/lpspi/interrupt_b2b_transfer/slave
 
* driver_examples/lpspi/polling_b2b_transfer/master
All linker files are locate in the '''armgcc''' folder of each demo.
* driver_examples/lpspi/polling_b2b_transfer/slave
 
* driver_examples/lpspi/polling_b2b_transfer/master
After launching the build_all.sh command the following folder will be created in the armgcc folder
* driver_examples/lpspi/polling_b2b_transfer/slave
 
* driver_examples/lpit
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/lpuart/edma_transfer
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* driver_examples/lpuart/interrupt_rb_transfer
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/lpuart/polling
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
* driver_examples/lpuart/interrupt_transfer
* driver_examples/lpuart/interrupt
* driver_examples/gpio/led_output
* driver_examples/rgpio/led_output
* driver_examples/sema42/uboot
* driver_examples/sema42/dual_core
* driver_examples/tpm/timer
* driver_examples/tpm/simple_pwm
* driver_examples/tpm/pwm_twochannel
* driver_examples/tpm/output_compare
* driver_examples/tpm/input_capture
* driver_examples/tpm/dual_edge_capture
* driver_examples/tpm/combine_pwm
* driver_examples/tstmr
* driver_examples/wdog32
* mmcau_examples/mmcau_api
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
* multicore_examples/rpmsg_lite_str_echo_rtos
* multicore_examples/rpmsg_lite_pingpong_rtos/sdk_remote
* multicore_examples/rpmsg_lite_pingpong_rtos/sdk_master
* rtos_examples/freertos_hello
* rtos_examples/freertos_queue
* rtos_examples/freertos_sem
* rtos_examples/freertos_generic
* rtos_examples/freertos_tickless
* rtos_examples/freertos_mutex
* rtos_examples/freertos_lpuart
* rtos_examples/freertos_event
* rtos_examples/freertos_swtimer
* rtos_examples/freertos_lpi2c
* rtos_examples/freertos_lpspi_b2b/master
* rtos_examples/freertos_lpspi_b2b/slave
* rtos_examples/freertos_lpspi
Additional demos are available as reference code, but require HW/SW customization.
<!--
<!--
--><section end=VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION/>
* demo_apps/power_mode_switch
 
* driver_examples/enet/txrx_multiring_transfer
=== JTAG ===
* driver_examples/enet/txrx_transfer
<section begin=VAR-SOM-MX8_JTAG_SECTION/><!--
* driver_examples/enet/txrx_ptp1588_transfer
-->The VAR-SOM-MX8 and SPEAR-MX8 exposes JTAG interface via an optional 10-pin header
* lwip_examples/lwip_ping/bm
 
* lwip_examples/lwip_ping/freertos
Here is the pinout:
* lwip_examples/lwip_iperf/bm
* lwip_examples/lwip_httpsrv/bm
* lwip_examples/lwip_httpsrv/freertos
* lwip_examples/lwip_tcpecho/bm
* lwip_examples/lwip_tcpecho/freertos
* lwip_examples/lwip_udpecho/bm
* lwip_examples/lwip_udpecho/freertos
* lwip_examples/lwip_dhcp/bm
* lwip_examples/lwip_dhcp/freertos
--><!--
{{#if: {{#var:SOC_HAS_SCU}} |
if needed, RPMSG functionality require applying the following kernel patch for the kernel 4.14.98


{| class="wikitable"
<pre>
|-
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-som-common.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-som-common.dtsi
! scope="col" | pin
index 1814a639d8f0..dcc12eb85c0a 100644
! scope="col" | signal
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-som-common.dtsi
! scope="col" | description
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-som-common.dtsi
! scope="col" | pin
@@ -1205,28 +1205,28 @@
! scope="col" | signal (ball)
};
! scope="col" | description
|-
&intmux_cm40 {
| '''1'''
- status = "okay";
| JTAG_VREF
+ status = "didabled";
| JTAG reference voltage (3.3V)
};
| '''2'''
| JTAG_TMS (AG35)
&rpmsg{
| JTAG Mode Select
/*
|-
* 64K for one rpmsg instance:
| '''3'''
*/
| GND
- vdev-nums = <1>;
| Digital Ground
- reg = <0x0 0x90000000 0x0 0x10000>;
| '''4'''
+ vdev-nums = <2>;
| JTAG_TCK (AE31)
+ reg = <0x0 0x90000000 0x0 0x20000>;
| JTAG Clock
status = "okay";
|-
};
| '''5'''
| GND
&intmux_cm41 {
| Digital Ground
- status = "okay";
| '''6'''
+ status = "disabled";
| JTAG_TDO (AF32)
};
| JTAG Data Out
|-
&rpmsg1{
| '''7'''
/*
| RTCK
* 64K for one rpmsg instance:
| JTAG Return clock
*/
| '''8'''
- vdev-nums = <1>;
| JTAG_TDI (AH34)
- reg = <0x0 0x90100000 0x0 0x10000>;
| JTAG Data In
+ vdev-nums = <2>;
|-
+ reg = <0x0 0x90100000 0x0 0x20000>;
| '''9'''
status = "okay";
| JTAG_TRST_B_CONN
};
| JTAG TAP reset
| '''10'''
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-spear-common.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-spear-common.dtsi
| JTAG_SRST_B
index 982da0e412f8..5df8783e56aa 100644
| JTAG System reset
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-spear-common.dtsi
|-
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-var-spear-common.dtsi
|}
@@ -1357,28 +1357,28 @@
 
};
Please refer to SOM datasheet for further details.<!--
--><section end=VAR-SOM-MX8_JTAG_SECTION/>
&intmux_cm40 {
 
- status = "okay";
== Releases ==
+ status = "disabled";
};
&rpmsg {
/*
* 64K for one rpmsg instance:
*/
- vdev-nums = <1>;
- reg = <0x0 0x90000000 0x0 0x10000>;
+ vdev-nums = <2>;
+ reg = <0x0 0x90000000 0x0 0x20000>;
status = "okay";
};
&intmux_cm41 {
- status = "okay";
+ status = "disabled";
};
&rpmsg1 {
/*
* 64K for one rpmsg instance:
*/
- vdev-nums = <1>;
- reg = <0x0 0x90100000 0x0 0x10000>;
+ vdev-nums = <2>;
+ reg = <0x0 0x90100000 0x0 0x20000>;
status = "okay";
};
</pre>
}}
--><section end=VAR-SOM-MX8_DEMOS_SECTION/>


=== mcuxpresso-2.5.2-mx8qm-v1.0 ===
=== NXP Memory types ===
<section begin=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8/><!--
<section begin=VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8}}<!--
 
-->{{#vardefine:SOC_HAS_SCU|true}}<!--
Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.
-->{{#vardefine:SOC_HAS_M40_M41|true}}<!--
 
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.5.2-mx8qm-v1.0}}<!--
{| class="wikitable"
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8}}<!--
|-
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8}}<!--
! scope="col" | memory type
-->{{#vardefine:MCUXPRESSO_VERSION|2.5.2}}<!--
! scope="col" | M4 if
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
! scope="col" | M4 memory area
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
! scope="col" | memory lentgh
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.5.x-var01}}<!--
! scope="col" | linker file
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
| DDR
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-7-2018-q2-update}}<!--
| 0
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qm}}<!--
| 0x88000000-0x881FFFFF (code)<br>0x88200000-0x883FFFFF (data)<br>0x88400000-0x887FFFFF (data2)
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| 8MB (DDR)
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8_PINS_SECTION}}<!--
| MIMX8QM6xxxFF_cm4_core0_ddr_ram.ld
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8_DEMOS_SECTION}}<!--
|-
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8_DTBS_SECTION}}<!--
| DDR
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION}}<!--
| 1
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8_JTAG_SECTION}}<!--
| 0x88800000-0x88BFFFFF (code)<br>0x88C00000-0x88FFFFFF (data)<br>0x89000000-0x8FFFFFFF (data2)
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for i.MX 8QuadMax.pdf}}<!--
| 120MB (DDR)
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QM-MEK}}<!--
| MIMX8QM6xxxFF_cm4_core1_ddr_ram.ld
-->{{#vardefine:SCFW_SOC|mx8qm_b0}} <!--
|-
-->{{#vardefine:SCFW_DEFINES_URL|https://github.com/varigit/imx-sc-firmware/blob/1.2.8/src/scfw_export_mx8qm_b0/platform/board/mx8qm_var_som/board.c#L79}} <!--
| TCM
-->{{#vardefine:SDK_GIT_TAG|som-mx8qm_mcuxpresso-2.5.2_v10}} <!--
| 0
-->{{#vardefine:RELEASE_DATE|3/9/2020}} <!--
| 0x1FFE0000-0x1FFFFFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x88000000-0x887FFFFF (data2)
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| 256kB (TCM) + 8MB (DDR)
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
| MIMX8QM6xxxFF_cm4_core0_ram.ld
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QM}} <!--
|-
--><section end=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8/><!--
| TCM
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
| 1
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
| 0x1FFE0000-0x1FFFFFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x88800000-0x8FFFFFFF (data2)
*SOC_HAS_M40_M41 = '''{{#var:SOC_HAS_M40_M41}}'''
| 256kB (TCM) + 120MB (DDR)
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
| MIMX8QM6xxxFF_cm4_core1_ram.ld
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
|-
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
|}
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
 
*SDK_PATH = '''{{#var:SDK_PATH}}'''
All linker files are locate in the '''armgcc''' folder of each demo.
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
 
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
After launching the build_all.sh command the following folder will be created in the armgcc folder
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
 
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
<!--
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
--><section end=VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION/>
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_DEFINES_URL = = '''{{#var:SCFW_DEFINES_URL}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}


=== mcuxpresso-2.8.0-mx8qm-v1.0 ===
=== JTAG ===
<section begin=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8/><!--
<section begin=VAR-SOM-MX8_JTAG_SECTION/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->The VAR-SOM-MX8 and SPEAR-MX8 exposes JTAG interface via an optional 10-pin header
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8}}<!--
 
-->{{#vardefine:SOC_HAS_M40_M41|true}}<!--
Here is the pinout:
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.8.0-mx8qm-v1.0}}<!--
 
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8}}<!--
{| class="wikitable"
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8}}<!--
|-
-->{{#vardefine:MCUXPRESSO_VERSION|2.8.0}}<!--
! scope="col" | pin
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
! scope="col" | signal
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
! scope="col" | description
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.8.x-var01}}<!--
! scope="col" | pin
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
! scope="col" | signal (ball)
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
! scope="col" | description
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
|-
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qm}}<!--
| '''1'''
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| JTAG_VREF
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8_PINS_SECTION}}<!--
| JTAG reference voltage (3.3V)
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8_DEMOS_SECTION}}<!--
| '''2'''
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8_DTBS_SECTION}}<!--
| JTAG_TMS (AG35)
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION}}<!--
| JTAG Mode Select
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8_JTAG_SECTION}}<!--
|-
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QM.pdf}}<!--
| '''3'''
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QM-MEK}}<!--
| GND
-->{{#vardefine:SCFW_SOC|mx8qm_b0}} <!--
| Digital Ground
-->{{#vardefine:SCFW_DEFINES_URL|https://github.com/varigit/imx-sc-firmware/blob/1.2.8/src/scfw_export_mx8qm_b0/platform/board/mx8qm_var_som/board.c#L79}} <!--
| '''4'''
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QM}} <!--
| JTAG_TCK (AE31)
-->{{#vardefine:SDK_GIT_TAG|som-mx8qm_mcuxpresso-2.8.0_v10}}<!--
| JTAG Clock
-->{{#vardefine:RELEASE_DATE|02/19/2021}}<!--
|-
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| '''5'''
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
| GND
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8-v1.1}}<!--
| Digital Ground
--><section end=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8/><!--
| '''6'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
| JTAG_TDO (AF32)
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
| JTAG Data Out
*SOC_HAS_M40_M41 = '''{{#var:SOC_HAS_M40_M41}}'''
|-
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
| '''7'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
| RTCK
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
| JTAG Return clock
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
| '''8'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
| JTAG_TDI (AH34)
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
| JTAG Data In
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
|-
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
| '''9'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
| JTAG_TRST_B_CONN
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
| JTAG TAP reset
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
| '''10'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
| JTAG_SRST_B
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
| JTAG System reset
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
|-
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
|}
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
 
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
Please refer to SOM datasheet for further details.<!--
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
--><section end=VAR-SOM-MX8_JTAG_SECTION/>
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_DEFINES_URL = = '''{{#var:SCFW_DEFINES_URL}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}


=== mcuxpresso-2.9.0-mx8qm-v1.0 ===
== Releases ==
<section begin=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8/><!--
 
-->{{#vardefine:OS|FreeRTOS}}<!--
=== mcuxpresso-2.5.2-mx8qm-v1.0 ===
<section begin=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8}}<!--
-->{{#vardefine:SOC_HAS_SCU|true}}<!--
-->{{#vardefine:SOC_HAS_M40_M41|true}}<!--
-->{{#vardefine:SOC_HAS_M40_M41|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8qm-v1.0}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.5.2-mx8qm-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8}}<!--
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8}}<!--
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.5.2}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.5.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-7-2018-q2-update}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qm}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qm}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
Line 3,010: Line 3,278:
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8_JTAG_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8_JTAG_SECTION}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QM.pdf}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for i.MX 8QuadMax.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QM-MEK}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QM-MEK}}<!--
-->{{#vardefine:SCFW_SOC|mx8qm_b0}} <!--
-->{{#vardefine:SCFW_SOC|mx8qm_b0}} <!--
-->{{#vardefine:SCFW_DEFINES_URL|https://github.com/varigit/imx-sc-firmware/blob/1.2.8/src/scfw_export_mx8qm_b0/platform/board/mx8qm_var_som/board.c#L79}} <!--
-->{{#vardefine:SCFW_DEFINES_URL|https://github.com/varigit/imx-sc-firmware/blob/1.2.8/src/scfw_export_mx8qm_b0/platform/board/mx8qm_var_som/board.c#L79}} <!--
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QM}} <!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8qm_mcuxpresso-2.5.2_v10}} <!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8qm_mcuxpresso-2.9.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|3/9/2020}} <!--
-->{{#vardefine:RELEASE_DATE|03/15/2021}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8-v1.1}}<!--
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QM}} <!--
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0002-i.MX8QM-CM40-deactivated-the-LMEM-caches-to-debug-in.patch}}<!--
--><section end=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8/><!--
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
Line 3,044: Line 3,310:
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_DEFINES_URL = = '''{{#var:SCFW_DEFINES_URL}}
*SCFW_DEFINES_URL = = '''{{#var:SCFW_DEFINES_URL}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
 
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
=== mcuxpresso-2.8.0-mx8qm-v1.0 ===
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
<section begin=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8/><!--
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
-->{{#vardefine:OS|FreeRTOS}}<!--
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8}}<!--
-->{{#vardefine:SOC_HAS_M40_M41|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.8.0-mx8qm-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8}}<!--
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.8.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.8.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qm}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8_PINS_SECTION}}<!--
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8_JTAG_SECTION}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QM.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QM-MEK}}<!--
-->{{#vardefine:SCFW_SOC|mx8qm_b0}} <!--
-->{{#vardefine:SCFW_DEFINES_URL|https://github.com/varigit/imx-sc-firmware/blob/1.2.8/src/scfw_export_mx8qm_b0/platform/board/mx8qm_var_som/board.c#L79}} <!--
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QM}} <!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8qm_mcuxpresso-2.8.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|02/19/2021}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8-v1.1}}<!--
--><section end=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
*SOC_HAS_M40_M41 = '''{{#var:SOC_HAS_M40_M41}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_DEFINES_URL = = '''{{#var:SCFW_DEFINES_URL}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}
 
=== mcuxpresso-2.9.0-mx8qm-v1.0 ===
<section begin=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8}}<!--
-->{{#vardefine:SOC_HAS_M40_M41|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8qm-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8}}<!--
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qm}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8_PINS_SECTION}}<!--
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8_MEMORY-TYPES_NXP_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8_JTAG_SECTION}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QM.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QM-MEK}}<!--
-->{{#vardefine:SCFW_SOC|mx8qm_b0}} <!--
-->{{#vardefine:SCFW_DEFINES_URL|https://github.com/varigit/imx-sc-firmware/blob/1.2.8/src/scfw_export_mx8qm_b0/platform/board/mx8qm_var_som/board.c#L79}} <!--
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QM}} <!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8qm_mcuxpresso-2.9.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|03/15/2021}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8-v1.1}}<!--
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0002-i.MX8QM-CM40-deactivated-the-LMEM-caches-to-debug-in.patch}}<!--
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
*SOC_HAS_M40_M41 = '''{{#var:SOC_HAS_M40_M41}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_DEFINES_URL = = '''{{#var:SCFW_DEFINES_URL}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}
 
<section begin=MCUXPRESSO_GLOBALS/>
<!--
    Set variables for all releases
 
    Cortex M4 or M7:
--> {{#vardefine:CORTEX_M_TYPE | <!--
-->    {{#switch:{{#var:HARDWARE_NAME}} | <!--
-->      VAR-SOM-MX8M-NANO = m7 | <!--
-->      DART-MX8M-PLUS = m7 | <!--
-->      VAR-SOM-MX93 = m33 | <!--
-->      m4 <!--
-->    }} <!--
--> }} <!--
--> {{#vardefine:CORTEX_M_TYPE_UC | <span style="text-transform: uppercase;">{{#var:CORTEX_M_TYPE}}</span>}}<!--
 
 
    SDK SOC_INCLUDE_PATH
--> {{#vardefine:SDK_DEVICE|<!--
-->    {{#switch:{{#var:HARDWARE_NAME}} | <!--
-->      VAR-SOM-MX8M-NANO = MIMX8MN6 | <!--
-->      DART-MX8M-MINI = MIMX8MM6 | <!--
-->      DART-MX8M-PLUS = MIMX8ML8 | <!--
-->      DART-MX8M = MIMX8MQ6 | <!--
-->      VAR-SOM-MX8 = MIMX8QM6 | <!--
-->      VAR-SOM-MX8X = MIMX8QX6 | <!--
-->    }} <!--
--> }} <!--
--> {{#vardefine:SOC_INCLUDE_PATH|{{#var:SDK_PATH}}/freertos-variscite/devices/{{#var:SDK_DEVICE}}}}<!--
--><section end=MCUXPRESSO_GLOBALS/>
{{#var:SOC_INCLUDE_PATH}}
 
 
= VAR-SOM-MX93=
 
== Sections ==
 
=== Available dtbs ===
<section begin=VAR-SOM-MX93_DTBS_SECTION/><!--
-->To allow the Cortex-M33 to access shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, by selecting the right version with the symbolic link in the /boot folder of the booting media.<br>
These device trees contain '''m33''' label in their name.
 
 
The below table lists an example dtb blob file name for VAR-SOM-MX93 (on the Symphony Board) with support for the '''M33''' for each kernel version / Yocto release:
 
{| class="wikitable"
|-
! scope="col" | File Name<br/>
! scope="col" | Description<br/>
|-
| style="padding: 5px;"| imx93-var-som-symphony-'''m33'''.dtb
| style="padding: 5px;"| VAR-SOM-MX93 (Rev 2.x+) device tree blob for kernel = 6.1.1 (Yocto Langdale) on Symphony-Board 1.4a and above.
|-
| style="padding: 5px;"| imx93-var-som-1.x-symphony-'''m33'''.dtb
| style="padding: 5px;"| VAR-SOM-MX93 (Rev 1.x) device tree blob for kernel = 6.1.1 (Yocto Langdale) on Symphony-Board 1.4a and above.
|-
|}
 
This device tree disables some of the base device tree nodes in order to avoid conflicts between the Cortex-A55 processors and Cortex-M33.
 
For the full list of device tree blob files, refer to the "Build Results" section in the appropriate wiki page for the specific Yocto/Debian release you are using.<!--
 
--><section end=VAR-SOM-MX93_DTBS_SECTION/>
 
=== Default M33 pins ===
<section begin=VAR-SOM-MX93_PINS_SECTION/><!--
-->Default M33 pins used by the demos are:
 
{| class="wikitable"
|-
! scope="col" | Function
! scope="col" | SoC balls
! scope="col" | {{#var:HARDWARE_NAME}} Pins
! scope="col" | Symphony Pins
! scope="col" | Notes
|-
| UART7 RX/TX
| M21 / M20
| J1.175 / J1.124
| J18.5 / J18.3
|
|-
| TPM6-CH3 - PWM Output or Input Capture
| W21
| J1.69
| J18.2
|
|-
| CAN1 RX/TX
| J17 / G17
| J1.46 / J1.44
| J16.18 / J16.20, CANL / CANH levels (CAN transceiver mounted!)
| If enabled, CAN devices will no longer visible from Linux
|-
| LPSPI6 CS0/SCK/SDI/SDO
| J21 / K21 / J20 / K20
| J1.39 / J1.43 / J1.41 / J1.45
| J16.4 / J16.2 / J16.6 / J16.8
| If enabled, SPI6 devices will no longer be visible from Linux
|-
| LPI2C7 SCL/SDA
| L21 / L20
| J1.174 / J1.176
| J16.10 / J16.12
| If enabled, I2C7 devices will no longer be visible from Linux
|-
| GPIO GPIO4.28
| U4
| J1.75
| J17.6
| GPIO pin is 1.8V IO level!
|-
|}<!--
--><section end=VAR-SOM-MX93_PINS_SECTION/>
 
=== Available Demos ===
<section begin=VAR-SOM-MX93_DEMOS_SECTION/><!--
-->{{#switch: {{#var:RELEASE_NAME}}
| mcuxpresso-2.13.1-mx93-v1.0 =<!--
-->* demo_apps/ethosu_apps_rpmsg
* demo_apps/hello_world
* driver_examples/canfd/loopback
* driver_examples/canfd/loopback_transfer
* driver_examples/edma/memory_to_memory
* driver_examples/edma/scatter_gather
* driver_examples/edma4/channel_link
* driver_examples/edma4/interleave_transfer
* driver_examples/edma4/memory_to_memory
* driver_examples/edma4/memory_to_memory_transfer
* driver_examples/edma4/memset
* driver_examples/edma4/ping_pong_transfer
* driver_examples/edma4/scatter_gather
* driver_examples/edma4/wrap_transfer
* driver_examples/flexcan/loopback
* driver_examples/flexcan/loopback_edma_transfer
* driver_examples/flexcan/loopback_transfer
* driver_examples/lpit/chained_channel
* driver_examples/lpit/single_channel
* driver_examples/lptmr
* driver_examples/lpuart/interrupt
* driver_examples/lpuart/interrupt_rb_transfer
* driver_examples/lpuart/interrupt_transfer
* driver_examples/lpuart/polling
* driver_examples/tpm/input_capture
* driver_examples/tpm/output_compare
* driver_examples/tpm/simple_pwm
* driver_examples/tpm/timer
* driver_examples/tstmr
* multicore_examples/rpmsg_lite_pingpong_rtos
* multicore_examples/rpmsg_lite_str_echo_rtos
* rtos_examples/freertos_event
* rtos_examples/freertos_generic
* rtos_examples/freertos_hello
* rtos_examples/freertos_mutex
* rtos_examples/freertos_queue
* rtos_examples/freertos_sem
* rtos_examples/freertos_swtimer
<br>
Additional demos may be provided on this platform in a future release.<!--
--> | #default = <!--
-->* demo_apps/ethosu_apps_rpmsg/ethosu_apps_rpmsg
* demo_apps/hello_world/hello_world
* driver_examples/canfd/efifo_interrupt_transfer/canfd_efifo_interrupt_transfer
* driver_examples/canfd/interrupt_transfer/canfd_interrupt_transfer
* driver_examples/canfd/loopback_transfer/canfd_loopback_transfer
* driver_examples/canfd/loopback/canfd_loopback
* driver_examples/canfd/ping_pong_buffer_transfer/canfd_ping_pong_buffer_transfer
* driver_examples/edma4/channel_link/edma4_channel_link
* driver_examples/edma4/interleave_transfer/edma4_interleave_transfer
* driver_examples/edma4/memory_to_memory/edma4_memory_to_memory
* driver_examples/edma4/memory_to_memory_transfer/edma4_memory_to_memory_transfer
* driver_examples/edma4/memset/edma4_memset
* driver_examples/edma4/ping_pong_transfer/edma4_ping_pong_transfer
* driver_examples/edma4/scatter_gather/edma4_scatter_gather
* driver_examples/edma4/wrap_transfer/edma4_wrap_transfer
* driver_examples/flexcan/efifo_interrupt_transfer/flexcan_efifo_interrupt_transfer
* driver_examples/flexcan/interrupt_transfer/flexcan_interrupt_transfer
* driver_examples/flexcan/loopback_edma_transfer/flexcan_loopback_edma_transfer
* driver_examples/flexcan/loopback_transfer/flexcan_loopback_transfer
* driver_examples/flexcan/loopback/flexcan_loopback
* driver_examples/flexcan/ping_pong_buffer_transfer/flexcan_ping_pong_buffer_transfer
* driver_examples/lpi2c/interrupt_b2b_transfer/master/lpi2c_interrupt_b2b_transfer_master
* driver_examples/lpi2c/interrupt_b2b_transfer/slave/lpi2c_interrupt_b2b_transfer_slave
* driver_examples/lpi2c/polling_b2b/master/lpi2c_polling_b2b_master
* driver_examples/lpi2c/polling_b2b/slave/lpi2c_polling_b2b_slave
* driver_examples/lpit/chained_channel/lpit_chained_channel
* driver_examples/lpit/single_channel/lpit_single_channel
* driver_examples/lpspi/interrupt_b2b/master/lpspi_interrupt_b2b_master
* driver_examples/lpspi/interrupt_b2b/slave/lpspi_interrupt_b2b_slave
* driver_examples/lpspi/interrupt_b2b_transfer/master/lpspi_interrupt_b2b_transfer_master
* driver_examples/lpspi/interrupt_b2b_transfer/slave/lpspi_interrupt_b2b_transfer_slave
* driver_examples/lpspi/polling_b2b/master/lpspi_polling_b2b_master
* driver_examples/lpspi/polling_b2b_transfer/slave/lpspi_polling_b2b_transfer_slave
* driver_examples/edma/memory_to_memory/dma3_memory_to_memory
* driver_examples/edma/scatter_gather/dma3_scatter_gather
* driver_examples/flexcan/loopback_transfer/flexcan_loopback_transfer
* driver_examples/flexcan/loopback/flexcan_loopback
* driver_examples/flexcan/ping_pong_buffer_transfer/flexcan_ping_pong_buffer_transfer
* driver_examples/flexcan/efifo_interrupt_transfer/flexcan_efifo_interrupt_transfer
* driver_examples/flexcan/interrupt_transfer/flexcan_interrupt_transfer
* driver_examples/rgpio/led_output/rgpio_led_output
* driver_examples/lpi2c/polling_b2b/master/lpi2c_polling_b2b_master
* driver_examples/lpi2c/polling_b2b/slave/lpi2c_polling_b2b_slave
* driver_examples/lptmr/lptmr
* driver_examples/lpuart/interrupt_rb_transfer/lpuart_interrupt_rb_transfer
* driver_examples/lpuart/interrupt_transfer/lpuart_interrupt_transfer
* driver_examples/lpuart/interrupt/lpuart_interrupt
* driver_examples/lpuart/polling/lpuart_polling
* driver_examples/tstmr/tstmr
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote/rpmsg_lite_pingpong_rtos_linux_remote
* multicore_examples/rpmsg_lite_str_echo_rtos/rpmsg_lite_str_echo_rtos_imxcm33
* rtos_examples/freertos_event/freertos_event
* rtos_examples/freertos_generic/freertos_generic
* rtos_examples/freertos_hello/freertos_hello
* rtos_examples/freertos_lpi2c_b2b/master/freertos_lpi2c_b2b_master
* rtos_examples/freertos_lpi2c_b2b/slave/freertos_lpi2c_b2b_slave
* rtos_examples/freertos_lpspi_b2b/master/freertos_lpspi_b2b_master
* rtos_examples/freertos_lpspi_b2b/slave/freertos_lpspi_b2b_slave
* rtos_examples/freertos_mutex/freertos_mutex
* rtos_examples/freertos_queue/freertos_queue
* rtos_examples/freertos_sem/freertos_sem
* rtos_examples/freertos_swtimer/freertos_swtimer
<br>
Additional demos may be provided on this platform in a future release.
<br><br>
{{note|The Wi-Fi/Bluetooth module interfaces have been disabled in the M33 device tree to not conflict with certain demos, however, if the module is present on your SoM, you should also disable the Wi-Fi service from running in Linux via "systemctl disable variscite-wifi"}}<!--
-->}}
<section end=VAR-SOM-MX93_DEMOS_SECTION/>
 
==Building Using Yocto==
<section begin=VAR-SOM-MX93_BUILDING_USING_YOCTO_SECTION/><!--
-->
In Yocto Dunfell and newer, Variscite provides a Yocto recipe for building and installing firmware into the Yocto image. Note, the examples below apply to the original release of this recipe in Dunfell and thus some of the syntax (such as the overrides) may need to be updated for newer versions.
 
https://github.com/varigit/meta-variscite-fslc/tree/dunfell/recipes-bsp/freertos-variscite
 
This recipe installs the following firmware files:
{{!}}-
{{!}} /boot/cm_<demo name>.bin.debug {{!}}{{!}} TCM {{!}}{{!}} U-Boot
{{!}}-
{{!}} /lib/firmware/cm_<demo name>.elf.debug {{!}}{{!}} TCM {{!}}{{!}} Linux Remoteproc Framework
 
If you have modified freertos-variscite in your own Git repository and kept the same directory structure, you can easily build your custom firmware by creating a bbappend file:
 
$ mkdir -p <your-layer>/recipes-bsp/freertos-variscite
$ nano <your-layer>/recipes-bsp/freertos-variscite/freertos-variscite_2.13.x.bbappend
 
Append '''SRC_URI''' and '''SRCREV''' to use your freertos-variscite Git repository
 
SRC_URI_remove = "git://github.com/varigit/freertos-variscite.git;protocol=git;branch=${MCUXPRESSO_BRANCH};"
SRC_URI_append = " <your Git repository>"
SRCREV = "<your Git commit id>"
 
Append '''CM_DEMOS''' to build your firmware. For example, to build rtos_examples/freertos_hello:
 
CM_DEMOS_append = "rtos_examples/freertos_hello"
 
Rebuild fsl-image-gui:
 
$ bitbake -c cleansstate freertos-variscite && bitbake fsl-image-gui
 
The firmware binary files should now be installed to /boot/ and elf files to /lib/firmware/
<section end=VAR-SOM-MX93_BUILDING_USING_YOCTO_SECTION/>
 
=== Running a demo ===
<section begin=VAR-SOM-MX93_RUNNING_DEMO_SECTION/><!--
-->
== Running a demo from U-Boot ==
 
To assist in loading M33 firmware from U-Boot prior to Linux boot, Variscite has created a dedicated set of U-Boot environment commands.
 
{{note|To allow Cortex-M accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded.}}
 
To enable Cortex-M U-Boot auto-loading:
=> setenv use_m33 yes; saveenv
 
To disable Cortex-M U-Boot auto-loading:
=> setenv use_m33 no; saveenv
 
Note that the Cortex A55s and M33 have a different memory addressing "view" that is documented in the reference manual. Additionally, the bootaux command for the M33 uses secure aliases from the M33's point of view. Thus, two variables must be set properly in order to set the loading address (defaults used in the example below):
=> setenv m33_addr 0x201E0000
=> setenv m33_addr_auxview 0x1FFE0000
=> saveenv
 
To set the name of the Cortex-M binary
=> setenv m33_bin cm_hello_world.bin; saveenv
 
{{note|The .bin file is expected to exist in the directory /boot of the booting media.}}
<br>
After enabling as above, the U-Boot '''boot''' command will handle loading the Cortex-M firmware when the system begins the boot process. For testing, it is possible to invoke the Cortex-M33 boot process manually:
=> run loadm33bin && run runm33bin
 
After booting in Linux, the M33 will be listed as in the "attached" state by remoteproc:
# cat /sys/class/remoteproc/remoteproc0/state
attached
 
 
Additional details and step by step procedure to run each of the demos is available [{{#var:SDK_GIT_URL}}/blob/{{#var:SDK_GIT_BRANCH}}/{{#var:DOCS_FOLDER}}/{{urlencode:{{#var:NXP_USER_GUIDE}}|PATH}} online] or in the following document:
 
{{#var:SDK_PATH}}/freertos-variscite/{{#var:DOCS_FOLDER}}/{{#var:NXP_USER_GUIDE}}
 
{{note|This process can be simplified using /etc/remoteproc/variscite-rproc-u-boot in Linux<br>
Please refer to the Yocto Scripts section below for more information}}
 
== Running a demo from Linux ==
 
The Linux remoteproc framework can be used to load the Cortex-M33 firmware from Linux userspace.
 
{{note|The U-Boot M33 auto-loading must not be currently enabled in order to allow for remoteproc control and loading of the M33.}}
 
Increase kernel loglevel while debugging:
# sysctl kernel.printk=7;
 
If the state is 'running', stop the Cortex-M33
# echo stop > /sys/class/remoteproc/remoteproc0/state
 
Load new firmware
# echo cm_hello_world.elf > /sys/class/remoteproc/remoteproc0/firmware
{{note| The .elf file is expected to exist in the /lib/firmware directory}}
 
Run the new firmware
# echo start > /sys/class/remoteproc/remoteproc0/state
 
{{note|This process can be simplified using /etc/remoteproc/variscite-rproc-linux in Linux<br>
Please refer to the Yocto Scripts section below for more information}}
 
{{note|By default, Linux disables unused clocks. Certain M33 examples may use peripherals which are not enabled in Linux. Depending on the clock source, Linux may disable the clock by default, resulting in the example/peripheral not functioning. Therefore, when running M33 examples, it is recommended to override this. The easiest way to achieve this is to append the bootarg "clk_ignore_unused." }}
 
== Running a Demo using Yocto Scripts ==
 
In Yocto, Variscite provides scripts to simplify loading firmware via U-Boot or Linux:
 
{| class="wikitable"
|-
! Script
! Description
|-
| <span id="yocto_scripts_u_boot">/etc/remoteproc/variscite-rproc-u-boot</span> || Configure U-Boot to load firmware on boot
|-
| <span id="yocto_scripts_rproc">/etc/remoteproc/variscite-rproc-linux</span> || Load and run firmware using Linux remoteproc framework
|}
 
'''Examples'''
 
variscite-rproc-u-boot example on imx93-var-som:
root@imx93-var-som:~# /etc/remoteproc/variscite-rproc-u-boot -f /boot/cm_hello_world.bin.release
Configuring for TCM memory
+ fw_setenv m33_addr 0x201E0000
Cannot read environment, using default
+ fw_setenv fdt_file imx93-var-som-symphony-m33.dtb
+ fw_setenv use_m33 yes
+ fw_setenv m33_bin cm_hello_world.bin.release
+ fw_setenv kernelargs ' clk_ignore_unused'
+ fw_setenv m33_addr_auxview 0x1FFE0000
Finished: Please reboot, the m33 firmware will run during U-Boot
 
variscite-rproc-linux example on imx93-var-som:
root@imx93-var-som:~# /etc/remoteproc/variscite-rproc-linux -f /lib/firmware/cm_hello_world.elf.release
Cortex-M: Loading cm_hello_world.elf.release
Cortex-M: Starting
[  974.434796] remoteproc remoteproc0: powering up imx-rproc
[  974.442420] remoteproc remoteproc0: Booting fw image cm_hello_world.elf.release, size 99776
[  974.451172] remoteproc remoteproc0: header-less resource table
<section end=VAR-SOM-MX93_RUNNING_DEMO_SECTION/>
 
=== NXP Memory types ===
<section begin=VAR-SOM-MX93_MEMORY-TYPES_NXP_SECTION/><!--
-->The SDK currently allows linking only out of TCM.
 
Below is a short summary of memory areas used by Cortex-M33 as described in related linker file:
 
{| class="wikitable"
|-
! scope="col" | Memory Type
! scope="col" | M33 Memory Area
! scope="col" | A55 Memory Area
! scope="col" | Memory Length
! scope="col" | Linker File
|-
| TCM
| 0x0FFE0000 - 0x0FFFFFFF (code)<br>0x20000000 – 0x2001FFFF (data)
| 0x201E0000 – 0x201FFFFF (code)<br>0x20200000 – 0x2021FFFF (data)
| 128kB (Code TCM) + 128kB (System TCM)
| MIMX9352_cm33_ram.ld
|-
|}
 
All linker files are located in the '''armgcc''' folder of each demo. Please consult the linker file for the actual memory used by each demo.
 
After launching the build_all.sh command the following folder will be created in the armgcc folder
 
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
<!--
--><section end=VAR-SOM-MX93_MEMORY-TYPES_NXP_SECTION/>
 
=== JTAG ===
<section begin=VAR-SOM-MX93_JTAG_SECTION/><!--
-->The JTAG interface is not exposed directly on the VAR-SOM-MX93 but the associated signals are exposed via the J1 SOM connector.<br>
 
{{note|Note: These signals are shared with the Wi-Fi module if present, so usage will require disabling this interface and making any appropriate pin muxing adjustments.<br><br>
Please refer to SoM datasheet for further details.}}
<!--
--><section end=VAR-SOM-MX93_JTAG_SECTION/>
 
<noinclude>{{:MPC_VAR-SOM-MX93}}</noinclude><includeonly><!--
--><section begin=MCUXPRESSO_2.13.1_V1.0_VAR-SOM-MX93/><!--
-->{{#lst:MPC_VAR-SOM-MX93|MCUXPRESSO_2.13.1_V1.0_VAR-SOM-MX93}}<!--
--><section end=MCUXPRESSO_2.13.1_V1.0_VAR-SOM-MX93/><!--
 
--><section begin=MCUXPRESSO_2.13.1_V1.1_VAR-SOM-MX93/><!--
-->{{#lst:MPC_VAR-SOM-MX93|MCUXPRESSO_2.13.1_V1.0_VAR-SOM-MX93}}<!--
-->{{#lst:MPC_VAR-SOM-MX93|MCUXPRESSO_2.13.1_V1.1_VAR-SOM-MX93}}<!--
--><section end=MCUXPRESSO_2.13.1_V1.1_VAR-SOM-MX93/><!--
-->


<section begin=MCUXPRESSO_GLOBALS/>
</includeonly>
<!--
    Set variables for all releases
 
    Cortex M4 or M7:
--> {{#vardefine:CORTEX_M_TYPE | <!--
-->    {{#switch:{{#var:HARDWARE_NAME}} | <!--
-->      VAR-SOM-MX8M-NANO = m7 | <!--
-->      DART-MX8M-PLUS = m7 | <!--
-->      m4 <!--
-->    }} <!--
--> }} <!--
--> {{#vardefine:CORTEX_M_TYPE_UC | <span style="text-transform: uppercase;">{{#var:CORTEX_M_TYPE}}</span>}}<!--
 
 
    SDK SOC_INCLUDE_PATH
--> {{#vardefine:SDK_DEVICE|<!--
-->    {{#switch:{{#var:HARDWARE_NAME}} | <!--
-->      VAR-SOM-MX8M-NANO = MIMX8MN6 | <!--
-->      DART-MX8M-MINI = MIMX8MM6 | <!--
-->      DART-MX8M-PLUS = MIMX8ML8 | <!--
-->      DART-MX8M = MIMX8MQ6 | <!--
-->      VAR-SOM-MX8 = MIMX8QM6 | <!--
-->      VAR-SOM-MX8X = MIMX8QX6 | <!--
-->    }} <!--
--> }} <!--
--> {{#vardefine:SOC_INCLUDE_PATH|{{#var:SDK_PATH}}/freertos-variscite/devices/{{#var:SDK_DEVICE}}}}<!--
--><section end=MCUXPRESSO_GLOBALS/>
{{#var:SOC_INCLUDE_PATH}}

Latest revision as of 02:49, 19 September 2023


DART-MX8M

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, by selecting the right version with the symbolic link in the /boot folder of the booting media.
These device trees contain m4 label in their name.


The below table lists an example dtb blob file name for DART-MX8M (on DT8MCustomBoard rev. 1.3 and higher) with support for M4 (and SD card and LVDS), for each kernel version / Yocto release:

File Name
Description
imx8mq-var-dart-dt8mcustomboard-m4-sd-lvds.dtb For kernel >= 5.4.85 (Yocto >= Dunfell)
imx8mq-var-dart-m4-sd-lvds.dtb For kernel = 5.4.24 (Yocto Zeus)
fsl-imx8mq-var-dart-m4-sd-lvds.dtb For kernel = 4.19.35 (Yocto Warrior)
Image.gz-fsl-imx8mq-var-dart-m4-sd-lvds.dtb For kernel = 4.14.98 (Yocto Sumo)

For the full list of device tree blob files, refer to the "Build Results" section in the appropriate wiki page for the specific Yocto/Debian release you are using.

Default M4 pins

Default M4 pins used by the demos are:

Function Pin
debug UART (UART2) RX: J12.6 / TX: J12.4
GPIO (GPIO4_IO03) LED7 for DT8CustomBoard 1.x
U43.2 / R228 for DT8CustomBoard >= 2.0 (Use Oscilloscope to observe output signal)
I2C (I2C3) SCL: J12.18 / SDA: J12.20
PWM (PWM2) J14.3

Available Demos

  • driver_examples/i2c/interrupt_b2b_transfer/slave
  • driver_examples/i2c/interrupt_b2b_transfer/master
  • driver_examples/i2c/polling_b2b_transfer/slave
  • driver_examples/i2c/polling_b2b_transfer/master
  • driver_examples/wdog
  • driver_examples/gpio/led_output
  • driver_examples/tmu/tmu_monitor_report
  • driver_examples/pwm
  • driver_examples/uart/auto_baudrate_detect
  • driver_examples/uart/interrupt
  • driver_examples/uart/interrupt_rb_transfer
  • driver_examples/uart/polling
  • driver_examples/uart/interrupt_transfer
  • driver_examples/gpt/timer
  • driver_examples/gpt/capture
  • driver_examples/ecspi/ecspi_loopback
  • driver_examples/qspi/polling_transfer
  • driver_examples/rdc
  • driver_examples/sema4/uboot
  • rtos_examples/freertos_ecspi/ecspi_loopback
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_uart
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer
  • rtos_examples/freertos_i2c
  • cmsis_driver_examples/i2c/int_b2b_transfer/slave
  • cmsis_driver_examples/i2c/int_b2b_transfer/master
  • cmsis_driver_examples/uart/interrupt_transfer
  • cmsis_driver_examples/ecspi/int_loopback_transfer
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • demo_apps/hello_world

NXP Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type M4 memory area A53 memory area memory lentgh linker file
DDR 0x80000000-0x801FFFFF (code)
0x80200000-0x803FFFFF (data)
0x80400000-0x80FFFFFF (data2)
0x80000000-0x801FFFFF (code)
0x80200000-0x803FFFFF (data)
0x80400000-0x80FFFFFF (data2)
16MB (DDR) MIMX8MQ6xxxJZ_cm4_ddr_ram.ld
TCM 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x80000000-0x80FFFFFF (data2)
0x007E0000-0x007FFFFF (code)
0x00800000-0x0081FFFF (data)
0x80000000-0x80FFFFFF (data2)
256kB (TCM) + 16MB (DDR) MIMX8MQ6xxxJZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must match the one declared in the kernel device tree: at least 2 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x80000000 - 0x80FFFFFF.

The RPMSG area is located at 0xB8000000: at least 3 GB of RAM is required on the SoM to allow Cortex-M4 accessing the RPMSG area. After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8M Applications Processor Reference Manual paragraphs:

  • 2.1.2 Cortex-A53 Memory Map
  • 2.1.3 Cortex-M4 Memory Map

Variscite Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type M4 memory area A53 memory area memory lentgh linker file
DDR 0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
16MB (DDR) MIMX8MQ6xxxJZ_cm4_ddr_ram.ld
TCM 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
0x007E0000-0x007FFFFF (code)
0x00800000-0x0081FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
256kB (TCM) + 16MB (DDR) MIMX8MQ6xxxJZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M4 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M4.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M4 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8M Applications Processor Reference Manual paragraphs:

  • 2.1.2 Cortex-A53 Memory Map
  • 2.1.3 Cortex-M4 Memory Map

JTAG

The VAR-DT8MCustomBoard exports the DART-MX8M JTAG signals through J29, a standard 1.27" 10 pin header.

Here is the pinout:

pin signal description pin signal description
1 JTAG_VREF JTAG IO reference voltage,
connects to SOM_NVCC_3V3.
2 JTAG_TMS JTAG Mode Select signal
3 GND Digital Ground 4 JTAG_TCK JTAG Clock signal,
requires 10K pull down.
5 GND Digital Ground 6 JTAG_TDO JTAG Data Out signal
7 GND Digital Ground 8 JTAG_TDI JTAG Data In signal
9 JTAG_NTRST_C JTAG Reset signal 10 NRST_CON Programmer Reset,
used to put the SOC in reset state.

Please refer to board schematics for further details.

Releases

mcuxpresso-2.5.1-mx8mq-v1.0

  • HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.5.1-mx8mq-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.5.1_V1.0_DART-MX8M
  • MCUXPRESSO_VERSION = 2.5.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_NXP_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK i.MX 8M Devices.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ

mcuxpresso-2.5.1-mx8mq-v1.1

   *HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.5.1-mx8mq-v1.1
  • RELEASE_LINK = MCUXPRESSO_2.5.1_V1.1_DART-MX8M
  • MCUXPRESSO_VERSION = 2.5.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK i.MX 8M Devices.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ

mcuxpresso-2.8.0-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.8.0-mx8mq-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_DART-MX8M
  • MCUXPRESSO_VERSION = 2.8.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ

mcuxpresso-2.9.0-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.9.0-mx8mq-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_DART-MX8M
  • MCUXPRESSO_VERSION = 2.9.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mq-v1.0

mcuxpresso-2.10.0-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.10.0-mx8mq-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_DART-MX8M
  • MCUXPRESSO_VERSION = 2.10.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mq-v1.3
  • DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8MQ-deactivated-the-LMEM-caches-to-debug-in-exter.patch
  • BOARD_SDK = dart_mx8mq

mcuxpresso-2.11.1-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.11.1-mx8mq-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_DART-MX8M
  • MCUXPRESSO_VERSION = 2.11.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mq-v1.5
  • DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8MQ-deactivated-the-LMEM-caches-to-debug-in-exter.patch
  • BOARD_SDK = dart_mx8mq

mcuxpresso-2.12.1-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.12.1-mx8mq-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.12.1_V1.0_DART-MX8M
  • MCUXPRESSO_VERSION = 2.12.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.12.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.10
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ
  • YOCTO_RELEASE_TAG = mx8m-yocto-kirkstone-5.15-2.0.x-v1.0
  • DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8MQ-deactivated-the-LMEM-caches-to-debug-in-exter.patch
  • BOARD_SDK = dart_mx8mq

mcuxpresso-2.13.0-mx8mq-v1.0


DART-MX8M-MINI

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m4 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.

File Name
Description
imx8mm-var-dart-dt8mcustomboard-m4.dtb DART-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell)
imx8mm-var-dart-m4.dtb DART-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
fsl-imx8mm-var-dart-m4.dtb DART-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. > 1.0
imx8mm-var-som-symphony-m4.dtb VAR-SOM-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above
imx8mm-var-som-symphony-legacy-m4.dtb VAR-SOM-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
imx8mm-var-som-m4.dtb VAR-SOM-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
imx8mm-var-som-rev10-m4.dtb VAR-SOM-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. 1.0
fsl-imx8mm-var-som-m4.dtb VAR-SOM-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. > 1.0
fsl-imx8mm-var-som-rev10-m4.dtb VAR-SOM-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. 1.0


Default M4 pins

Default M4 pins used by the demos are:

Function Pin
Debug UART (UART2) RX: J12.6 / TX: J12.4
GPIO (GPIO4_IO03) LED7
I2C (I2C4) SCL: J12.17 / SDA: J12.19
PWM (PWM2) J14.3

Default M4 pins v2

Default M4 pins used by the demos are:

Function SoC balls DART-MX8M-MINI pins DT8MCB pins VAR-SOM-MX8M-MINI pins Symphony pins Notes
UART3 RX/TX E18 / D18 J2.87 / J2.89 J12.11 / J12.13 J1.175 / J1.124 J18.5 / J18.3
GPIO4_IO03 AF15 J2.59 GPLED1 J1.84 J17.3 The led_output demo makes the GPLED1 blink for only DT8MCustomBoard 1.x, use the scope on one of the following test points for DT8MCustomBoard >= 2.x (U43.2/R228/MIPI-CSI pin 20)
I2C4 SCL/SDA D13 / E13 J1.17 / J1.19 J12.17/ J12.19 J1.174 / J1.176 J16.10 / J16.12
PWM3 AF9 J3.36 J14.7 J1.69 J18.2
SPI1 CS0/SCK/SDI/SDO B6 / D6 / A7 / B7 J2.79 / J2.77 / J2.81 / J2.83 J16.4/ J16.2 / J16.8 / J16.6 J1.39 / J1.43 / J1.41 / J1.45 J16.4/ J16.2 / J16.6 / J16.8 Enabling it SPI devices will be no longer visible from Linux

Available Demos

  • driver_examples/i2c/interrupt_b2b_transfer/slave
  • driver_examples/i2c/interrupt_b2b_transfer/master
  • driver_examples/i2c/polling_b2b_transfer/slave
  • driver_examples/i2c/polling_b2b_transfer/master
  • driver_examples/wdog
  • driver_examples/sdma/scatter_gather
  • driver_examples/sdma/memory_to_memory
  • driver_examples/gpio/led_output
  • driver_examples/pwm
  • driver_examples/uart/auto_baudrate_detect
  • driver_examples/uart/interrupt
  • driver_examples/uart/idle_detect_sdma_transfer
  • driver_examples/uart/interrupt_rb_transfer
  • driver_examples/uart/sdma_transfer
  • driver_examples/uart/polling
  • driver_examples/uart/interrupt_transfer
  • driver_examples/gpt/timer
  • driver_examples/gpt/capture
  • driver_examples/ecspi/ecspi_loopback
  • driver_examples/ecspi/interrupt_b2b_transfer/slave
  • driver_examples/ecspi/interrupt_b2b_transfer/master
  • driver_examples/ecspi/polling_b2b_transfer/slave
  • driver_examples/ecspi/polling_b2b_transfer/master
  • driver_examples/rdc
  • driver_examples/tmu_1/monitor_threshold
  • driver_examples/tmu_1/temperature_polling
  • driver_examples/sema4/uboot
  • rtos_examples/freertos_ecspi/ecspi_loopback
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_uart
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer
  • rtos_examples/freertos_i2c
  • cmsis_driver_examples/i2c/int_b2b_transfer/slave
  • cmsis_driver_examples/i2c/int_b2b_transfer/master
  • cmsis_driver_examples/uart/sdma_transfer
  • cmsis_driver_examples/uart/interrupt_transfer
  • cmsis_driver_examples/ecspi/int_loopback_transfer
  • cmsis_driver_examples/ecspi/sdma_loopback_transfer
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • demo_apps/hello_world

Variscite Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type M4 memory area A53 memory area memory lentgh linker file
DDR 0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
16MB (DDR) MIMX8MM6xxxxx_cm4_ddr_ram.ld
TCM 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
0x007E0000-0x007FFFFF (code)
0x00800000-0x0081FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
256kB (TCM) + 16MB (DDR) MIMX8MM6xxxxx_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M4 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M4.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M4 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8M Mini Applications Processor Reference Manual paragraphs:

  • 2.1.2 Cortex-A53 Memory Map
  • 2.1.3 Cortex-M4 Memory Map

Releases

freertos-1.0.1-mx7-v1.0


mcuxpresso-2.5.0-mx8mm-v1.0

  • HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.5.0-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.5.0_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.5.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
  • BOARD_FOLDER = boards/dart_mx8mm
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for i.MX 8M Mini.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM

mcuxpresso-2.5.0-mx8mm-v1.1

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.5.0-mx8mm-v1.1
  • RELEASE_LINK = MCUXPRESSO_2.5.0_V1.1_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.5.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
  • BOARD_FOLDER = boards/dart_mx8mm
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for i.MX 8M Mini.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM

mcuxpresso-2.8.0-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.8.0-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.8.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/dart_mx8mm
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM

mcuxpresso-2.9.0-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.9.0-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.9.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/dart_mx8mm
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mm-v1.1

mcuxpresso-2.10.0-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.10.0-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.10.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
  • BOARD_FOLDER = boards/dart_mx8mm
  • DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM
  • YOCTO_RELEASE_TAG = hardknott-fslc-5.4-2.3.x-mx8mm-v1.1

mcuxpresso-2.11.1-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.11.1-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.11.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
  • BOARD_FOLDER = boards/dart_mx8mm
  • DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM
  • YOCTO_RELEASE_TAG = hardknott-fslc-5.4-2.3.x-mx8mm-v1.4

mcuxpresso-2.12.1-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.12.1-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.12.1_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.12.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.12.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.10
  • BOARD_FOLDER = boards/dart_mx8mm
  • DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM
  • YOCTO_RELEASE_TAG = mx8mm-yocto-kirkstone-5.15-2.0.x-v1.0

mcuxpresso-2.13.0-mx8mm-v1.0


VAR-SOM-MX8M-NANO

Sections

Available dtbs

To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m7 label in the name, using the fdt_file environment variable in U-Boot.

File Name
Description
imx8mn-var-som-symphony-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel = 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above and for kernel >= 5.10.72 (Yocto Hardknott) on all Symphony-Boards
imx8mn-var-som-symphony-legacy-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel = 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
imx8mn-var-som-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev > 1.0
imx8mn-var-som-rev10-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev 1.0
fsl-imx8mn-var-som-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev > 1.0
fsl-imx8mn-var-som-rev10-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev 1.0

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.

Default M7 pins

Default M7 pins used by the demos are:

Function SoC balls VAR-SOM-MX8M-NANO pins Symphony pins Notes
UART3 RX/TX E18 / D18 J1.175 / J1.124 J18.5 / J18.3
GPIO4_IO23 AC24 J1.21 J16.5
I2C4 SCL/SDA D13 / E13 J1.174 / J1.176 J16.10 / J16.12
PWM3 AF9 J1.69 J18.2
SPI1 CS0/SCK/SDI/SDO B6 / D6 / A7 / B7 J1.39 / J1.43 / J1.41 / J1.45 J16.4/ J16.2 / J16.6 / J16.8 Enabling it SPI devices will be no longer visible from Linux

Available Demos

  • driver_examples/i2c/interrupt_b2b_transfer/slave
  • driver_examples/i2c/interrupt_b2b_transfer/master
  • driver_examples/i2c/polling_b2b_transfer/slave
  • driver_examples/i2c/polling_b2b_transfer/master
  • driver_examples/wdog
  • driver_examples/sdma/scatter_gather
  • driver_examples/sdma/memory_to_memory
  • driver_examples/gpio/led_output
  • driver_examples/pwm
  • driver_examples/uart/auto_baudrate_detect
  • driver_examples/uart/interrupt
  • driver_examples/uart/idle_detect_sdma_transfer
  • driver_examples/uart/interrupt_rb_transfer
  • driver_examples/uart/sdma_transfer
  • driver_examples/uart/polling
  • driver_examples/uart/interrupt_transfer
  • driver_examples/gpt/timer
  • driver_examples/gpt/capture
  • driver_examples/ecspi/ecspi_loopback
  • driver_examples/ecspi/interrupt_b2b_transfer/slave
  • driver_examples/ecspi/interrupt_b2b_transfer/master
  • driver_examples/ecspi/polling_b2b_transfer/slave
  • driver_examples/ecspi/polling_b2b_transfer/master
  • driver_examples/rdc
  • driver_examples/tmu_1/monitor_threshold
  • driver_examples/tmu_1/temperature_polling
  • driver_examples/sema4/uboot
  • rtos_examples/freertos_ecspi/ecspi_loopback
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_uart
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer
  • rtos_examples/freertos_i2c
  • cmsis_driver_examples/i2c/int_b2b_transfer/slave
  • cmsis_driver_examples/i2c/int_b2b_transfer/master
  • cmsis_driver_examples/uart/sdma_transfer
  • cmsis_driver_examples/uart/interrupt_transfer
  • cmsis_driver_examples/ecspi/int_loopback_transfer
  • cmsis_driver_examples/ecspi/sdma_loopback_transfer
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • demo_apps/hello_world

Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.

memory type M7 memory area A53 memory area memory lentgh linker file
DDR 0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
16MB (DDR) MIMX8MN6xxxxx_cm7_ddr_ram.ld
TCM 0x00000000-0x0001FFFF (code)
0x20000000-0x2001FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
0x007E0000-0x007FFFFF (code)
0x00800000-0x0081FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
256kB (TCM) + 16MB (DDR) MIMX8MN6xxxxx_cm7_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M7 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M7.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8M Nano Applications Processor Reference Manual paragraphs:

  • 2.1.2 Cortex-A53 Memory Map
  • 2.1.3 Cortex-M7 Memory Map

JTAG

VAR-SOM-MX8M-NANO exposes JTAG signals on a header (not assembled by default) on the SOM top left side.

Here is the pinout:

pin signal description pin signal description
1 JTAG_VREF JTAG IO reference voltage,
connected to SOM_3V3_PER via 150 Ohm.
2 JTAG_TMS JTAG Mode Select signal
3 GND Digital Ground 4 JTAG_TCK JTAG Clock signal,
include PD of 8.2K Ohm.
5 GND Digital Ground 6 JTAG_TDO JTAG Data Out signal
7 GND Digital Ground 8 JTAG_TDI JTAG Data In signal
9 JTAG_TRST_B JTAG Reset signal,
active low signal
10 POR_B Programmer Reset,
used to put the SOC in reset state.

Please refer to SoM datasheet for further details.

Releases

mcuxpresso-2.7.0-mx8mn-v1.0

   *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.7.0-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.7.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.7.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/8-2019q3/RC1.1/gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-8-2019-q3-update
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN

mcuxpresso-2.8.0-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.8.0-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.8.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN

mcuxpresso-2.9.0-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.9.0-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.9.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mn-v1.1

mcuxpresso-2.10.0-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.10.0-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.10.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mn-v1.6

mcuxpresso-2.11.1-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.11.1-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.11.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mn-v1.8

mcuxpresso-2.12.1-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.12.1-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.12.1_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.12.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.12.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.10
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN
  • YOCTO_RELEASE_TAG = mx8mn-yocto-hardknott-5.10.72_2.2.1-v1.0

mcuxpresso-2.13.0-mx8mn-v1.0


DART-MX8M-PLUS

Sections

Available dtbs

To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m7 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.

File Name
Description
imx8mp-var-dart-dt8customboard-m7.dtb DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on DT8MCustomBoard 2.x
imx8mp-var-dart-dt8mcustomboard-legacy-m7.dtb DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on on DT8MCustomBoard 1.x
imx8mp-var-som-symphony-m7.dtb VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board
imx8mp-var-som-symphony-2nd-ov5640m7.dtb VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board with 2nd OV5640


Default M7 pins v1

Default M7 pins used by the demos are:

Function SoC balls DART-MX8M-PLUS pins DT8MCB pins VAR-SOM-MX8M-PLUS pins Symphony pins Notes
UART3 RX/TX AE6 / AJ4 J2.87 / J2.89 J12.11 / J12.13
UART4 RX/TX AH5 / AJ5 J1.115 / J1.171 J18.9 / J18.7
GPIO3_IO14 R26 J1.79 J17.10
GPIO4_IO03 AF10 J2.59 GPLED1 on DT8MCB rev 1.x
J11.20 on DT8MCB rev 2.x
I2C3 SCL/SDA AJ7 / AJ6 J3.46 / J3.42 J12.18/ J12.20
I2C4 SCL/SDA AF8 / AD8 J1.92 / J1.90 J16.13 / J16.15 Enabling it SPI devices will be no longer visible from Linux
PWM2 D8 J1.69 J18.2
PWM3 AE18 J3.36 J14.7
SPI1 CS0/SCK/SDI/SDO AE20 / AF20 / AD20 / AC20 J2.79 / J2.77 / J2.81 / J2.83 J16.4/ J16.2 / J16.8 / J16.6 Enabling it SPI devices will be no longer visible from Linux
SPI2 CS0/SCK/SDI/SDO AJ22 / AH21 / AH20 / AJ21 J1.39 / J1.43 / J1.41 / J1.45 J16.4/ J16.2 / J16.6 / J16.8 Enabling it SPI devices will be no longer visible from Linux
FLEXCAN1 RX/TX AH15 / AJ16 j2.56 / j2.50 J13.11 / J13.5 on DT8MCB rev 1.x, TTL levels (CAN transceiver not mounted!) Enabling it FLEXCAN1 devices will be no longer visible from Linux
J16.9 / J16.7 on DT8MCB rev 2.x, CANL/CANH levels (CAN transceiver mounted!)
FLEXCAN2 RX/TX AJ4 / AE6 J1.46 / J1.44 J16.18 / J16.20, CANL/CANH levels (CAN transceiver mounted!) Enabling it FLEXCAN2 devices will be no longer visible from Linux

Available Demos

  • driver_examples/i2c/interrupt_b2b_transfer/slave
  • driver_examples/i2c/interrupt_b2b_transfer/master
  • driver_examples/i2c/polling_b2b_transfer/slave
  • driver_examples/i2c/polling_b2b_transfer/master
  • driver_examples/wdog
  • driver_examples/sdma/scatter_gather
  • driver_examples/sdma/memory_to_memory
  • driver_examples/gpio/led_output
  • driver_examples/pwm
  • driver_examples/uart/auto_baudrate_detect
  • driver_examples/uart/interrupt
  • driver_examples/uart/interrupt_rb_transfer
  • driver_examples/uart/polling
  • driver_examples/uart/interrupt_transfer
  • driver_examples/gpt/timer
  • driver_examples/gpt/capture
  • driver_examples/ecspi/ecspi_loopback
  • driver_examples/ecspi/interrupt_b2b_transfer/slave
  • driver_examples/ecspi/interrupt_b2b_transfer/master
  • driver_examples/ecspi/polling_b2b_transfer/slave
  • driver_examples/ecspi/polling_b2b_transfer/master
  • driver_examples/rdc
  • driver_examples/tmu/monitor_threshold
  • driver_examples/tmu/temperature_polling
  • driver_examples/sema4/uboot
  • rtos_examples/freertos_ecspi/ecspi_loopback
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_uart
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer
  • rtos_examples/freertos_i2c
  • cmsis_driver_examples/i2c/int_b2b_transfer/slave
  • cmsis_driver_examples/i2c/int_b2b_transfer/master
  • cmsis_driver_examples/uart/interrupt_transfer
  • cmsis_driver_examples/ecspi/int_loopback_transfer
  • cmsis_driver_examples/ecspi/sdma_loopback_transfer
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • demo_apps/hello_world
  • driver_examples/uart/idle_detect_sdma_transfer
  • driver_examples/uart/sdma_transfer
  • cmsis_driver_examples/uart/sdma_transfer

Variscite Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.

memory type M7 memory area A53 memory area memory lentgh linker file
DDR 0x80000000-0x801FFFFF (code)
0x80200000-0x803FFFFF (data)
0x80400000-0x80FFFFFF (data2)
0x80000000-0x801FFFFF (code)
0x80200000-0x803FFFFF (data)
0x80400000-0x80FFFFFF (data2)
16MB (DDR) MIMX8MN6xxxxx_cm7_ddr_ram.ld
TCM 0x00000000-0x0001FFFF (code)
0x20000000-0x2001FFFF (data)
0x80000000-0x80FFFFFF (data2)
0x007E0000-0x007FFFFF (code)
0x00800000-0x0081FFFF (data)
0x80000000-0x80FFFFFF (data2)
256kB (TCM) + 16MB (DDR) MIMX8MN6xxxxx_cm7_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must match the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x80000000 - 0x80FFFFFF.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8M Plus Applications Processor Reference Manual paragraphs:

  • 2.2 Cortex-A53 Memory Map
  • 2.3 Cortex-M7 Memory Map

JTAG

The VAR-SOM-MX8M-PLUS exposes JTAG interface via an optional 10-pin header, on the SOM top left side.
The DART-MX8M-PLUS exports JTAG interface via an optional 10-pin header, on the DT8MCustomBoard top side.

Here is the pinout:

pin signal description pin signal description
1 JTAG_VREF JTAG IO reference voltage,
connected to SOM_3V3_PER via 150 Ohm.
2 JTAG_TMS JTAG Mode Select signal
3 GND Digital Ground 4 JTAG_TCK JTAG Clock signal,
include PD of 8.2K Ohm.
5 GND Digital Ground 6 JTAG_TDO JTAG Data Out signal
7 GND Digital Ground 8 JTAG_TDI JTAG Data In signal
9 JTAG_TRST_B JTAG Reset signal,
active low signal
10 POR_B Programmer Reset,
used to put the SOC in reset state.

Please refer to SoM datasheet for further details.

Releases

mcuxpresso-2.9.0-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS
  • RELEASE_NAME = mcuxpresso-2.9.0-mx8mp-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS
  • MCUXPRESSO_VERSION = 2.9.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/dart_mx8mp
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MP
  • YOCTO_RELEASE_TAG = zeus-fsl-5.4.70_2.3.2-mx8mp-v1.1
  • SOM_CAN_SUPPORT_1GB_DDR = yes

mcuxpresso-2.10.0-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS
  • RELEASE_NAME = mcuxpresso-2.10.0-mx8mp-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS
  • MCUXPRESSO_VERSION = 2.10.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
  • BOARD_FOLDER = boards/dart_mx8mp
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MP
  • YOCTO_RELEASE_TAG = hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2
  • SOM_CAN_SUPPORT_1GB_DDR = yes

mcuxpresso-2.11.1-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS
  • RELEASE_NAME = mcuxpresso-2.11.1-mx8mp-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS
  • MCUXPRESSO_VERSION = 2.11.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
  • BOARD_FOLDER = boards/dart_mx8mp
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MP
  • YOCTO_RELEASE_TAG = hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2
  • SOM_CAN_SUPPORT_1GB_DDR = yes

mcuxpresso-2.12.1-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS
  • RELEASE_NAME = mcuxpresso-2.12.1-mx8mp-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.12.1_V1.0_DART-MX8M-PLUS
  • MCUXPRESSO_VERSION = 2.12.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.12.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.10
  • BOARD_FOLDER = boards/dart_mx8mp
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MP
  • YOCTO_RELEASE_TAG = mx8mp-yocto-kirkstone-5.15-2.0.x-v1.0
  • SOM_CAN_SUPPORT_1GB_DDR = yes

mcuxpresso-2.13.0-mx8mp-v1.0


VAR-SOM-MX8X

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m4 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.

File Name
Description
imx8qxp-var-som-symphony-sd-m4.dtb VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
imx8qxp-var-som-symphony-m4.dtb VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)


Default M4 pins

Default M4 pins used by the demos are:

Function Pin
debug UART (UART2) RX: J18.5 / TX: J18.3
I2C (I2C3) SCL: J16.10 / SDA: J16.12
M4 GPIO (M40_GPIO0_IO00) J16.3
M4 PWM (M40_TPM0_CH0) J16.7

Available Demos

  • cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
  • cmsis_driver_examples/lpi2c/int_b2b_transfer/master
  • cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
  • cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
  • cmsis_driver_examples/lpuart/edma_transfer
  • cmsis_driver_examples/lpuart/interrupt_transfer
  • demo_apps/hello_world
  • driver_examples/edma/scatter_gather
  • driver_examples/edma/memory_to_memory
  • driver_examples/intmux
  • driver_examples/lpi2c/edma_b2b_transfer/slave
  • driver_examples/lpi2c/edma_b2b_transfer/master
  • driver_examples/lpi2c/interrupt_b2b_transfer/slave
  • driver_examples/lpi2c/interrupt_b2b_transfer/master
  • driver_examples/lpi2c/polling_b2b_transfer/slave
  • driver_examples/lpi2c/polling_b2b_transfer/master
  • driver_examples/lpi2c/read_accel_value_transfer
  • driver_examples/lpit
  • driver_examples/lpuart/edma_transfer
  • driver_examples/lpuart/interrupt_rb_transfer
  • driver_examples/lpuart/polling
  • driver_examples/lpuart/interrupt_transfer
  • driver_examples/rgpio/led_output
  • driver_examples/sema42/uboot
  • driver_examples/tpm/input_capture
  • driver_examples/tpm/dual_edge_capture
  • driver_examples/tpm/timer
  • driver_examples/tpm/simple_pwm
  • driver_examples/tpm/output_compare
  • driver_examples/tstmr
  • driver_examples/wdog32
  • mmcau_examples/mmcau_api
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer

Additional demos are available as reference code, but require HW/SW customization.

NXP Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type M4 memory area A35 memory area memory lentgh linker file
DDR 0x88000000-0x881FFFFF (code)
0x88200000-0x883FFFFF (data)
0x88400000-0x8FFFFFFF (data2)
0x88000000-0x881FFFFF (code)
0x88200000-0x883FFFFF (data)
0x88400000-0x8FFFFFFF (data2)
128MB (DDR) MIMX8QX6xxxFZ_cm4_ddr_ram.ld
TCM 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x88000000-0x8FFFFFFF (data2)
0x34FE0000-0x34FFFFFF (code)
0x35000000-0x3501FFFF (data)
0x88000000-0x8FFFFFFF (data2)
256kB (TCM) + 128MB (DDR) MIMX8QX6xxxFZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in the following i.MX 8DualX/8DualXPlus/8QuadXPlus Applications Processor Reference Manual paragraphs:

  • 2.2 System Memory Map
  • 2.2.9 Cortex-M4 Memory Map

JTAG

The VAR-SOM-MX8X exposes JTAG interface via an optional 10-pin header

Here is the pinout:

pin signal description pin signal (ball) description
1 JTAG_VREF JTAG reference voltage (3.3V) 2 JTAG_TMS (AG35) JTAG Mode Select
3 GND Digital Ground 4 JTAG_TCK (AE31) JTAG Clock
5 GND Digital Ground 6 JTAG_TDO (AF32) JTAG Data Out
7 RTCK JTAG Return clock 8 JTAG_TDI (AH34) JTAG Data In
9 JTAG_TRST_B_CONN JTAG TAP reset 10 JTAG_SRST_B JTAG System reset

Please refer to SOM datasheet for further details.


Releases

mcuxpresso-2.5.2-mx8qx-v1.0

       *HARDWARE_NAME = VAR-SOM-MX8X

mcuxpresso-2.8.0-mx8qx-v1.0

     *HARDWARE_NAME = VAR-SOM-MX8X
  • SOC_HAS_SCU = true
  • RELEASE_NAME = mcuxpresso-2.8.0-mx8qx-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X
  • YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8X
  • MCUXPRESSO_VERSION = 2.8.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/som_mx8qx
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8X_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8X_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8X_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION
  • JTAG_SECTION = VAR-SOM-MX8X_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf
  • NXP_REFERENCE_KIT = IMX8QXP-MEK
  • SCFW_SOC = = mx8qx_b0
  • SCFW_PATCH_URL = = https://variscite-public.nyc3.cdn.digitaloceanspaces.com/VAR-SOM-MX8X/Software/SCFW
  • SCFW_M4_PATCH = = 0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff
  • IMX_MKIMAGE_SOC = = iMX8QX
  • SDK_GIT_TAG = som-mx8qx_mcuxpresso-2.8.0_v10
  • RELEASE_DATE = 02/18/2021
  • SUPPORTED_REV_SOM = v1.1 and higher
  • SUPPORTED_REV_CARRIER = v1.1 and higher
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8x-v1.0

mcuxpresso-2.9.0-mx8qx-v1.0

     *HARDWARE_NAME = VAR-SOM-MX8X
  • SOC_HAS_SCU = true
  • RELEASE_NAME = mcuxpresso-2.9.0-mx8qx-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X
  • YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8X
  • MCUXPRESSO_VERSION = 2.9.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/som_mx8qx
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8X_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8X_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8X_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION
  • JTAG_SECTION = VAR-SOM-MX8X_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf
  • NXP_REFERENCE_KIT = IMX8QXP-MEK
  • SCFW_SOC = = mx8qx_b0
  • SCFW_PATCH_URL = = https://variscite-public.nyc3.cdn.digitaloceanspaces.com/VAR-SOM-MX8X/Software/SCFW
  • SCFW_M4_PATCH = = 0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff
  • IMX_MKIMAGE_SOC = = iMX8QX
  • SDK_GIT_TAG = som-mx8qx_mcuxpresso-2.9.0_v10
  • RELEASE_DATE = 03/04/2021
  • SUPPORTED_REV_SOM = v1.1 and higher
  • SUPPORTED_REV_CARRIER = v1.1 and higher
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8x-v1.0

VAR-SOM-MX8

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m4 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.

File Name
Description
imx8qm-var-som-symphony-dp-m4.dtb DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-som-symphony-hdmi-m4.dtb DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-som-symphony-lvds-m4.dtb DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-spear-sp8customboard-dp-m4.dtb DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-spear-sp8customboard-hdmi-m4.dtb DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-spear-sp8customboard-lvds.m4.dtb DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-som-dp-m4.dtb DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-som-hdmi-m4.dtb DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-som-lvds-m4.dtb DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-spear-dp-m4.dtb DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-spear-hdmi-m4.dtb DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-spear-lvds-m4.dtb DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)


Default M4 pins

Default M4 pins used by the demos are:

Function SoC balls VAR-SOM-MX8 pins Symphony pins SPEAR-MX8 pins SP8CustomBoard pins Notes
M40_UART0 RX / TX AM44 / AU51 N/A N/A J3.32 / J3.38 J40 SP8CustomBoard requires SW8 ON, SW9 OFF
DMA_UART2 RX / TX BE35 / BE37 J1.175 / J1.124 J18.5 / J18.3 J1.80 / J1.82 J26.19 /J26.17
DMA_UART4 RX / TX AR47 / AU53 J1.115 / J1.171 J18.9 / J18.7 J3.34 / J3.29 J20.2 / J20.4 SPEAR-MX8 demos do not refer it
FLEXCAN0 RX/TX C5 / H6 J1.46 / J1.44 J16.18 / J16.20 J4.79 / J4.80 J26.1 / J26.3
M41_I2C0 SCL/SDA AR45 / AU49 N/A N/A J1.9 / J3.36 J20.18 / J20.20
DMA_I2C0 SCL/SDA BN9 / BN7 J1.174 / J1.176 J16.10 / J16.12 J2.88 / J1.90 J26.2 / J26.4
DMA_SPI0 CS0 / SCK / SDI / SDO BC1 / BB4 / BA5 / AY6 J1.79 / J1.75 / J1.77 / J1.70 J17.10 / J17.6 / J17.8 / J17.4 J2.78 / j2.74 / J2.72 / J2.76 J20.7 / J20.1 / J20.5 / J20.3
ADC_IN6 AL9 J1.39 J16.4 J4.62 J29.16 VAR-SOM-MX8 requires enabling a buffer (refer to the datasheet)
M40_TPM0 0 / 1 AR47 / AU53 J1.115 / J1.171 J18.9 / J18.7 J3.34 / J3.29 J20.2 / J20.4 pins are share with with DMA_UART4
GPIO3_IO06 BA3 J1.40 J17.2 J2.80 J20.9

Available Demos

  • cmsis_driver_examples/lpi2c/int_b2b_transfer/master
  • cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
  • cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
  • cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
  • cmsis_driver_examples/lpuart/edma_transfer
  • cmsis_driver_examples/lpuart/interrupt_transfer
  • cmsis_driver_examples/lpspi/edma_b2b_transfer/master
  • cmsis_driver_examples/lpspi/edma_b2b_transfer/slave
  • cmsis_driver_examples/lpspi/int_b2b_transfer/master
  • cmsis_driver_examples/lpspi/int_b2b_transfer/slave
  • demo_apps/hello_world
  • driver_examples/canfd/loopback_transfer
  • driver_examples/canfd/loopback
  • driver_examples/canfd/interrupt_transfer
  • driver_examples/edma/scatter_gather
  • driver_examples/edma/memory_to_memory
  • driver_examples/flexcan/loopback_edma_transfer
  • driver_examples/flexcan/loopback_transfer
  • driver_examples/flexcan/loopback
  • driver_examples/flexcan/interrupt_transfer
  • driver_examples/intmux
  • driver_examples/lpadc/interrupt
  • driver_examples/lpadc/polling
  • driver_examples/lpi2c/edma_b2b_transfer/slave
  • driver_examples/lpi2c/edma_b2b_transfer/master
  • driver_examples/lpi2c/interrupt_b2b_transfer/slave
  • driver_examples/lpi2c/interrupt_b2b_transfer/master
  • driver_examples/lpi2c/polling_b2b_transfer/slave
  • driver_examples/lpi2c/polling_b2b_transfer/master
  • driver_examples/lpi2c/read_accel_value_transfer
  • driver_examples/lpspi/edma_b2b_transfer/master
  • driver_examples/lpspi/edma_b2b_transfer/slave
  • driver_examples/lpspi/interrupt_b2b/master
  • driver_examples/lpspi/interrupt_b2b/slave
  • driver_examples/lpspi/interrupt_b2b_transfer/master
  • driver_examples/lpspi/interrupt_b2b_transfer/slave
  • driver_examples/lpspi/polling_b2b_transfer/master
  • driver_examples/lpspi/polling_b2b_transfer/slave
  • driver_examples/lpspi/polling_b2b_transfer/master
  • driver_examples/lpspi/polling_b2b_transfer/slave
  • driver_examples/lpit
  • driver_examples/lpuart/edma_transfer
  • driver_examples/lpuart/interrupt_rb_transfer
  • driver_examples/lpuart/polling
  • driver_examples/lpuart/interrupt_transfer
  • driver_examples/lpuart/interrupt
  • driver_examples/gpio/led_output
  • driver_examples/rgpio/led_output
  • driver_examples/sema42/uboot
  • driver_examples/sema42/dual_core
  • driver_examples/tpm/timer
  • driver_examples/tpm/simple_pwm
  • driver_examples/tpm/pwm_twochannel
  • driver_examples/tpm/output_compare
  • driver_examples/tpm/input_capture
  • driver_examples/tpm/dual_edge_capture
  • driver_examples/tpm/combine_pwm
  • driver_examples/tstmr
  • driver_examples/wdog32
  • mmcau_examples/mmcau_api
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • multicore_examples/rpmsg_lite_pingpong_rtos/sdk_remote
  • multicore_examples/rpmsg_lite_pingpong_rtos/sdk_master
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_lpuart
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer
  • rtos_examples/freertos_lpi2c
  • rtos_examples/freertos_lpspi_b2b/master
  • rtos_examples/freertos_lpspi_b2b/slave
  • rtos_examples/freertos_lpspi

Additional demos are available as reference code, but require HW/SW customization.


NXP Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type M4 if M4 memory area memory lentgh linker file
DDR 0 0x88000000-0x881FFFFF (code)
0x88200000-0x883FFFFF (data)
0x88400000-0x887FFFFF (data2)
8MB (DDR) MIMX8QM6xxxFF_cm4_core0_ddr_ram.ld
DDR 1 0x88800000-0x88BFFFFF (code)
0x88C00000-0x88FFFFFF (data)
0x89000000-0x8FFFFFFF (data2)
120MB (DDR) MIMX8QM6xxxFF_cm4_core1_ddr_ram.ld
TCM 0 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x88000000-0x887FFFFF (data2)
256kB (TCM) + 8MB (DDR) MIMX8QM6xxxFF_cm4_core0_ram.ld
TCM 1 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x88800000-0x8FFFFFFF (data2)
256kB (TCM) + 120MB (DDR) MIMX8QM6xxxFF_cm4_core1_ram.ld

All linker files are locate in the armgcc folder of each demo.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)


JTAG

The VAR-SOM-MX8 and SPEAR-MX8 exposes JTAG interface via an optional 10-pin header

Here is the pinout:

pin signal description pin signal (ball) description
1 JTAG_VREF JTAG reference voltage (3.3V) 2 JTAG_TMS (AG35) JTAG Mode Select
3 GND Digital Ground 4 JTAG_TCK (AE31) JTAG Clock
5 GND Digital Ground 6 JTAG_TDO (AF32) JTAG Data Out
7 RTCK JTAG Return clock 8 JTAG_TDI (AH34) JTAG Data In
9 JTAG_TRST_B_CONN JTAG TAP reset 10 JTAG_SRST_B JTAG System reset

Please refer to SOM datasheet for further details.

Releases

mcuxpresso-2.5.2-mx8qm-v1.0

      *HARDWARE_NAME = VAR-SOM-MX8

mcuxpresso-2.8.0-mx8qm-v1.0

    *HARDWARE_NAME = VAR-SOM-MX8

mcuxpresso-2.9.0-mx8qm-v1.0

    *HARDWARE_NAME = VAR-SOM-MX8


~/var-mcuxpresso/freertos-variscite/devices/MIMX8QM6


VAR-SOM-MX93

Sections

Available dtbs

To allow the Cortex-M33 to access shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, by selecting the right version with the symbolic link in the /boot folder of the booting media.
These device trees contain m33 label in their name.


The below table lists an example dtb blob file name for VAR-SOM-MX93 (on the Symphony Board) with support for the M33 for each kernel version / Yocto release:

File Name
Description
imx93-var-som-symphony-m33.dtb VAR-SOM-MX93 (Rev 2.x+) device tree blob for kernel = 6.1.1 (Yocto Langdale) on Symphony-Board 1.4a and above.
imx93-var-som-1.x-symphony-m33.dtb VAR-SOM-MX93 (Rev 1.x) device tree blob for kernel = 6.1.1 (Yocto Langdale) on Symphony-Board 1.4a and above.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the Cortex-A55 processors and Cortex-M33.

For the full list of device tree blob files, refer to the "Build Results" section in the appropriate wiki page for the specific Yocto/Debian release you are using.

Default M33 pins

Default M33 pins used by the demos are:

Function SoC balls VAR-SOM-MX8 Pins Symphony Pins Notes
UART7 RX/TX M21 / M20 J1.175 / J1.124 J18.5 / J18.3
TPM6-CH3 - PWM Output or Input Capture W21 J1.69 J18.2
CAN1 RX/TX J17 / G17 J1.46 / J1.44 J16.18 / J16.20, CANL / CANH levels (CAN transceiver mounted!) If enabled, CAN devices will no longer visible from Linux
LPSPI6 CS0/SCK/SDI/SDO J21 / K21 / J20 / K20 J1.39 / J1.43 / J1.41 / J1.45 J16.4 / J16.2 / J16.6 / J16.8 If enabled, SPI6 devices will no longer be visible from Linux
LPI2C7 SCL/SDA L21 / L20 J1.174 / J1.176 J16.10 / J16.12 If enabled, I2C7 devices will no longer be visible from Linux
GPIO GPIO4.28 U4 J1.75 J17.6 GPIO pin is 1.8V IO level!

Available Demos

  • demo_apps/ethosu_apps_rpmsg/ethosu_apps_rpmsg
  • demo_apps/hello_world/hello_world
  • driver_examples/canfd/efifo_interrupt_transfer/canfd_efifo_interrupt_transfer
  • driver_examples/canfd/interrupt_transfer/canfd_interrupt_transfer
  • driver_examples/canfd/loopback_transfer/canfd_loopback_transfer
  • driver_examples/canfd/loopback/canfd_loopback
  • driver_examples/canfd/ping_pong_buffer_transfer/canfd_ping_pong_buffer_transfer
  • driver_examples/edma4/channel_link/edma4_channel_link
  • driver_examples/edma4/interleave_transfer/edma4_interleave_transfer
  • driver_examples/edma4/memory_to_memory/edma4_memory_to_memory
  • driver_examples/edma4/memory_to_memory_transfer/edma4_memory_to_memory_transfer
  • driver_examples/edma4/memset/edma4_memset
  • driver_examples/edma4/ping_pong_transfer/edma4_ping_pong_transfer
  • driver_examples/edma4/scatter_gather/edma4_scatter_gather
  • driver_examples/edma4/wrap_transfer/edma4_wrap_transfer
  • driver_examples/flexcan/efifo_interrupt_transfer/flexcan_efifo_interrupt_transfer
  • driver_examples/flexcan/interrupt_transfer/flexcan_interrupt_transfer
  • driver_examples/flexcan/loopback_edma_transfer/flexcan_loopback_edma_transfer
  • driver_examples/flexcan/loopback_transfer/flexcan_loopback_transfer
  • driver_examples/flexcan/loopback/flexcan_loopback
  • driver_examples/flexcan/ping_pong_buffer_transfer/flexcan_ping_pong_buffer_transfer
  • driver_examples/lpi2c/interrupt_b2b_transfer/master/lpi2c_interrupt_b2b_transfer_master
  • driver_examples/lpi2c/interrupt_b2b_transfer/slave/lpi2c_interrupt_b2b_transfer_slave
  • driver_examples/lpi2c/polling_b2b/master/lpi2c_polling_b2b_master
  • driver_examples/lpi2c/polling_b2b/slave/lpi2c_polling_b2b_slave
  • driver_examples/lpit/chained_channel/lpit_chained_channel
  • driver_examples/lpit/single_channel/lpit_single_channel
  • driver_examples/lpspi/interrupt_b2b/master/lpspi_interrupt_b2b_master
  • driver_examples/lpspi/interrupt_b2b/slave/lpspi_interrupt_b2b_slave
  • driver_examples/lpspi/interrupt_b2b_transfer/master/lpspi_interrupt_b2b_transfer_master
  • driver_examples/lpspi/interrupt_b2b_transfer/slave/lpspi_interrupt_b2b_transfer_slave
  • driver_examples/lpspi/polling_b2b/master/lpspi_polling_b2b_master
  • driver_examples/lpspi/polling_b2b_transfer/slave/lpspi_polling_b2b_transfer_slave
  • driver_examples/edma/memory_to_memory/dma3_memory_to_memory
  • driver_examples/edma/scatter_gather/dma3_scatter_gather
  • driver_examples/flexcan/loopback_transfer/flexcan_loopback_transfer
  • driver_examples/flexcan/loopback/flexcan_loopback
  • driver_examples/flexcan/ping_pong_buffer_transfer/flexcan_ping_pong_buffer_transfer
  • driver_examples/flexcan/efifo_interrupt_transfer/flexcan_efifo_interrupt_transfer
  • driver_examples/flexcan/interrupt_transfer/flexcan_interrupt_transfer
  • driver_examples/rgpio/led_output/rgpio_led_output
  • driver_examples/lpi2c/polling_b2b/master/lpi2c_polling_b2b_master
  • driver_examples/lpi2c/polling_b2b/slave/lpi2c_polling_b2b_slave
  • driver_examples/lptmr/lptmr
  • driver_examples/lpuart/interrupt_rb_transfer/lpuart_interrupt_rb_transfer
  • driver_examples/lpuart/interrupt_transfer/lpuart_interrupt_transfer
  • driver_examples/lpuart/interrupt/lpuart_interrupt
  • driver_examples/lpuart/polling/lpuart_polling
  • driver_examples/tstmr/tstmr
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote/rpmsg_lite_pingpong_rtos_linux_remote
  • multicore_examples/rpmsg_lite_str_echo_rtos/rpmsg_lite_str_echo_rtos_imxcm33
  • rtos_examples/freertos_event/freertos_event
  • rtos_examples/freertos_generic/freertos_generic
  • rtos_examples/freertos_hello/freertos_hello
  • rtos_examples/freertos_lpi2c_b2b/master/freertos_lpi2c_b2b_master
  • rtos_examples/freertos_lpi2c_b2b/slave/freertos_lpi2c_b2b_slave
  • rtos_examples/freertos_lpspi_b2b/master/freertos_lpspi_b2b_master
  • rtos_examples/freertos_lpspi_b2b/slave/freertos_lpspi_b2b_slave
  • rtos_examples/freertos_mutex/freertos_mutex
  • rtos_examples/freertos_queue/freertos_queue
  • rtos_examples/freertos_sem/freertos_sem
  • rtos_examples/freertos_swtimer/freertos_swtimer


Additional demos may be provided on this platform in a future release.

The Wi-Fi/Bluetooth module interfaces have been disabled in the M33 device tree to not conflict with certain demos, however, if the module is present on your SoM, you should also disable the Wi-Fi service from running in Linux via "systemctl disable variscite-wifi"


Building Using Yocto

In Yocto Dunfell and newer, Variscite provides a Yocto recipe for building and installing firmware into the Yocto image. Note, the examples below apply to the original release of this recipe in Dunfell and thus some of the syntax (such as the overrides) may need to be updated for newer versions.

https://github.com/varigit/meta-variscite-fslc/tree/dunfell/recipes-bsp/freertos-variscite

This recipe installs the following firmware files: |- | /boot/cm_<demo name>.bin.debug || TCM || U-Boot |- | /lib/firmware/cm_<demo name>.elf.debug || TCM || Linux Remoteproc Framework

If you have modified freertos-variscite in your own Git repository and kept the same directory structure, you can easily build your custom firmware by creating a bbappend file:

$ mkdir -p <your-layer>/recipes-bsp/freertos-variscite
$ nano <your-layer>/recipes-bsp/freertos-variscite/freertos-variscite_2.13.x.bbappend

Append SRC_URI and SRCREV to use your freertos-variscite Git repository

SRC_URI_remove = "git://github.com/varigit/freertos-variscite.git;protocol=git;branch=${MCUXPRESSO_BRANCH};"
SRC_URI_append = " <your Git repository>"
SRCREV = "<your Git commit id>"

Append CM_DEMOS to build your firmware. For example, to build rtos_examples/freertos_hello:

CM_DEMOS_append = "rtos_examples/freertos_hello"

Rebuild fsl-image-gui:

$ bitbake -c cleansstate freertos-variscite && bitbake fsl-image-gui

The firmware binary files should now be installed to /boot/ and elf files to /lib/firmware/


Running a demo

Running a demo from U-Boot

To assist in loading M33 firmware from U-Boot prior to Linux boot, Variscite has created a dedicated set of U-Boot environment commands.


To allow Cortex-M accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded.

To enable Cortex-M U-Boot auto-loading:

=> setenv use_m33 yes; saveenv

To disable Cortex-M U-Boot auto-loading:

=> setenv use_m33 no; saveenv

Note that the Cortex A55s and M33 have a different memory addressing "view" that is documented in the reference manual. Additionally, the bootaux command for the M33 uses secure aliases from the M33's point of view. Thus, two variables must be set properly in order to set the loading address (defaults used in the example below):

=> setenv m33_addr 0x201E0000
=> setenv m33_addr_auxview 0x1FFE0000
=> saveenv

To set the name of the Cortex-M binary

=> setenv m33_bin cm_hello_world.bin; saveenv


The .bin file is expected to exist in the directory /boot of the booting media.


After enabling as above, the U-Boot boot command will handle loading the Cortex-M firmware when the system begins the boot process. For testing, it is possible to invoke the Cortex-M33 boot process manually:

=> run loadm33bin && run runm33bin

After booting in Linux, the M33 will be listed as in the "attached" state by remoteproc:

# cat /sys/class/remoteproc/remoteproc0/state 
attached


Additional details and step by step procedure to run each of the demos is available online or in the following document:

~/var-mcuxpresso/freertos-variscite/docs/Getting Started with MCUXpresso SDK for MEK-MIMX8QM.pdf


This process can be simplified using /etc/remoteproc/variscite-rproc-u-boot in Linux
Please refer to the Yocto Scripts section below for more information

Running a demo from Linux

The Linux remoteproc framework can be used to load the Cortex-M33 firmware from Linux userspace.


The U-Boot M33 auto-loading must not be currently enabled in order to allow for remoteproc control and loading of the M33.

Increase kernel loglevel while debugging:

# sysctl kernel.printk=7;

If the state is 'running', stop the Cortex-M33

# echo stop > /sys/class/remoteproc/remoteproc0/state

Load new firmware

# echo cm_hello_world.elf > /sys/class/remoteproc/remoteproc0/firmware
The .elf file is expected to exist in the /lib/firmware directory

Run the new firmware

# echo start > /sys/class/remoteproc/remoteproc0/state


This process can be simplified using /etc/remoteproc/variscite-rproc-linux in Linux
Please refer to the Yocto Scripts section below for more information


By default, Linux disables unused clocks. Certain M33 examples may use peripherals which are not enabled in Linux. Depending on the clock source, Linux may disable the clock by default, resulting in the example/peripheral not functioning. Therefore, when running M33 examples, it is recommended to override this. The easiest way to achieve this is to append the bootarg "clk_ignore_unused."

Running a Demo using Yocto Scripts

In Yocto, Variscite provides scripts to simplify loading firmware via U-Boot or Linux:

Script Description
/etc/remoteproc/variscite-rproc-u-boot Configure U-Boot to load firmware on boot
/etc/remoteproc/variscite-rproc-linux Load and run firmware using Linux remoteproc framework

Examples

variscite-rproc-u-boot example on imx93-var-som:

root@imx93-var-som:~# /etc/remoteproc/variscite-rproc-u-boot -f /boot/cm_hello_world.bin.release 
Configuring for TCM memory
+ fw_setenv m33_addr 0x201E0000
Cannot read environment, using default
+ fw_setenv fdt_file imx93-var-som-symphony-m33.dtb
+ fw_setenv use_m33 yes
+ fw_setenv m33_bin cm_hello_world.bin.release
+ fw_setenv kernelargs ' clk_ignore_unused'
+ fw_setenv m33_addr_auxview 0x1FFE0000

Finished: Please reboot, the m33 firmware will run during U-Boot

variscite-rproc-linux example on imx93-var-som:

root@imx93-var-som:~# /etc/remoteproc/variscite-rproc-linux -f /lib/firmware/cm_hello_world.elf.release
Cortex-M: Loading cm_hello_world.elf.release
Cortex-M: Starting
[  974.434796] remoteproc remoteproc0: powering up imx-rproc
[  974.442420] remoteproc remoteproc0: Booting fw image cm_hello_world.elf.release, size 99776
[  974.451172] remoteproc remoteproc0: header-less resource table


NXP Memory types

The SDK currently allows linking only out of TCM.

Below is a short summary of memory areas used by Cortex-M33 as described in related linker file:

Memory Type M33 Memory Area A55 Memory Area Memory Length Linker File
TCM 0x0FFE0000 - 0x0FFFFFFF (code)
0x20000000 – 0x2001FFFF (data)
0x201E0000 – 0x201FFFFF (code)
0x20200000 – 0x2021FFFF (data)
128kB (Code TCM) + 128kB (System TCM) MIMX9352_cm33_ram.ld

All linker files are located in the armgcc folder of each demo. Please consult the linker file for the actual memory used by each demo.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)


JTAG

The JTAG interface is not exposed directly on the VAR-SOM-MX93 but the associated signals are exposed via the J1 SOM connector.


Note: These signals are shared with the Wi-Fi module if present, so usage will require disabling this interface and making any appropriate pin muxing adjustments.

Please refer to SoM datasheet for further details.


Releases

mcuxpresso-2.13.1-mx93-v1.0


mcuxpresso-2.13.1-mx93-v1.1


Release Notes

RN_MCUXPRESSO_2.13.1_V1.0_VAR-SOM-MX93

|- | Release 1.0 || |- | Initial release || First release for the Cortex-M33 core on the VAR-SOM-MX93. |- | Examples provided and tested on many peripherals: || - CAN
- EDMA
- LPUART
- TPM/PWM
- TSTMR

See developers guide for a full list of available demos. |-


RN_MCUXPRESSO_2.13.1_V1.1_VAR-SOM-MX93

|- | Release 1.1 || |- | Several additional examples provided for many peripherals: || - CAN (board to board examples)
- LPSPI
- LPI2C
- GPIO

See developers guide for a full list of available demos. |-