MCUXpresso Platform Customization: Difference between revisions

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|-
|-
| Based on release || NXP MCUXpresso SDK {{#var:MCUXPRESSO_VERSION}}
| Based on release || NXP MCUXpresso SDK {{#var:MCUXPRESSO_VERSION}}
|-
| Nature of release || NXP version release
|-
|-
| Release git || [{{#var:SDK_GIT_URL_HTTP}}/tree/{{#var:SDK_GIT_BRANCH}} {{#var:SDK_GIT_URL_HTTP}}]
| Release git || [{{#var:SDK_GIT_URL_HTTP}}/tree/{{#var:SDK_GIT_BRANCH}} {{#var:SDK_GIT_URL_HTTP}}]
Line 72: Line 70:
{| class="wikitable"
{| class="wikitable"
|-
|-
! scope="col" | function
! scope="col" | Function
! scope="col" | pin
! scope="col" | Pin
|-
|-
| debug UART (UART2)
| debug UART (UART2)
Line 79: Line 77:
|-
|-
| GPIO (GPIO4_IO03)
| GPIO (GPIO4_IO03)
| LED7 (only for 1.x DT8CustomBoard)
| LED7 for DT8CustomBoard 1.x<br>  U43.2 / R228 for DT8CustomBoard >= 2.0 (Use Oscilloscope to observe output signal)
|-
|-
| I2C (I2C3)
| I2C (I2C3)
Line 520: Line 518:
*BOARD_SDK = '''{{#var:BOARD_SDK}}'''
*BOARD_SDK = '''{{#var:BOARD_SDK}}'''


= DART-MX8M-MINI =
=== mcuxpresso-2.11.1-mx8mq-v1.0 ===
 
<section begin=MCUXPRESSO_2.11.1_V1.0_DART-MX8M/><!--
== Sections ==
-->{{#vardefine:OS|FreeRTOS}}<!--
 
-->{{#vardefine:HARDWARE_NAME|DART-MX8M}}<!--
=== Available dtbs ===
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.11.1-mx8mq-v1.0}}<!--
<section begin=DART-MX8M-MINI_DTBS_SECTION/><!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.11.1_V1.0_DART-MX8M}}<!--
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.
-->{{#vardefine:MCUXPRESSO_VERSION|2.11.1}}<!--
 
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
 
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.11.x-var01}}<!--
{| class="wikitable"
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
! scope="col" | File Name<br/>
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.07}}<!--
! scope="col" | Description<br/>
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mq}}<!--
|-
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| style="padding: 5px;"| imx8mm-var-dart-dt8mcustomboard-'''m4'''.dtb
-->{{#vardefine:PINS_SECTION|DART-MX8M_PINS_SECTION}}<!--
| style="padding: 5px;"| DART-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell)
-->{{#vardefine:DEMOS_SECTION|DART-MX8M_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|DART-MX8M_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M_MEMORY-TYPES_VAR_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|DART-MX8M_JTAG_SECTION}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MQ}}<!--
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mq_mcuxpresso-2.11.1_v10}}<!--
-->{{#vardefine:RELEASE_DATE|05/31/2022}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mq-v1.5}}<!--
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-iMX8MQ-deactivated-the-LMEM-caches-to-debug-in-exter.patch}}<!--
-->{{#vardefine:BOARD_SDK|dart_mx8mq}}<!--
--><section end=MCUXPRESSO_2.11.1_V1.0_DART-MX8M/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*DEACTIVATE_LMEM_CACHE_PATCH = '''{{#var:DEACTIVATE_LMEM_CACHE_PATCH}}'''
*BOARD_SDK = '''{{#var:BOARD_SDK}}'''
 
= DART-MX8M-MINI =
 
== Sections ==
 
=== Available dtbs ===
<section begin=DART-MX8M-MINI_DTBS_SECTION/><!--
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.
 
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.
 
{| class="wikitable"
|-
|-
| style="padding: 5px;"| imx8mm-var-dart-'''m4'''.dtb
! scope="col" | File Name<br/>
! scope="col" | Description<br/>
|-
| style="padding: 5px;"| imx8mm-var-dart-dt8mcustomboard-'''m4'''.dtb
| style="padding: 5px;"| DART-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell)
|-
| style="padding: 5px;"| imx8mm-var-dart-'''m4'''.dtb
| style="padding: 5px;"| DART-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
| style="padding: 5px;"| DART-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
|-
|-
Line 572: Line 623:
{| class="wikitable"
{| class="wikitable"
|-
|-
! scope="col" | function
! scope="col" | Function
! scope="col" | pin
! scope="col" | Pin
|-
|-
| debug UART (UART2)
| Debug UART (UART2)
| RX: J12.6 / TX: J12.4
| RX: J12.6 / TX: J12.4
|-
|-
Line 596: Line 647:
{| class="wikitable"
{| class="wikitable"
|-
|-
! scope="col" | function
! scope="col" | Function
! scope="col" | SoC balls
! scope="col" | SoC balls
! scope="col" | DART-MX8M-MINI pins
! scope="col" | DART-MX8M-MINI pins
Line 602: Line 653:
! scope="col" | VAR-SOM-MX8M-MINI pins
! scope="col" | VAR-SOM-MX8M-MINI pins
! scope="col" | Symphony pins
! scope="col" | Symphony pins
! scope="col" | notes
! scope="col" | Notes
|-
|-
| UART3 RX/TX
| UART3 RX/TX
Line 642: Line 693:
| J1.39 / J1.43 / J1.41 / J1.45
| J1.39 / J1.43 / J1.41 / J1.45
| J16.4/ J16.2 / J16.6 / J16.8
| J16.4/ J16.2 / J16.6 / J16.8
| enablind it SPI devices will be no longer visible from Linux
| Enabling it SPI devices will be no longer visible from Linux
|-
|-
|}<!--
|}<!--
Line 1,000: Line 1,051:
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''


= VAR-SOM-MX8M-NANO =
=== mcuxpresso-2.11.1-mx8mm-v1.0 ===
 
<section begin=MCUXPRESSO_2.11.1_V1.0_DART-MX8M-MINI/><!--
== Sections ==
-->{{#vardefine:OS|FreeRTOS}}<!--
 
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-MINI}}<!--
=== Available dtbs ===
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.11.1-mx8mm-v1.0}}<!--
<section begin=VAR-SOM-MX8M-NANO_DTBS_SECTION/><!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.11.1_V1.0_DART-MX8M-MINI}}<!--
-->To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m7''' label in the name, using the fdt_file environment variable in U-Boot.
-->{{#vardefine:MCUXPRESSO_VERSION|2.11.1}}<!--
 
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
{| class="wikitable"
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
|-
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.11.x-var01}}<!--
! scope="col" | File Name<br/>
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
! scope="col" | Description<br/>
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.07}}<!--
| style="padding: 5px;"| imx8mn-var-som-symphony-'''m7'''.dtb
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mm}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
|-
-->{{#vardefine:PINS_SECTION|DART-MX8M-MINI_PINS_SECTION_V2}}<!--
| style="padding: 5px;"| imx8mn-var-som-symphony-legacy-'''m7'''.dtb
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-MINI_DEMOS_SECTION}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
-->{{#vardefine:DTBS_SECTION|DART-MX8M-MINI_DTBS_SECTION}}<!--
|-
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION}}<!--
| style="padding: 5px;"| imx8mn-var-som-'''m7'''.dtb
-->{{#vardefine:JTAG_SECTION|DART-MX8M_JTAG_SECTION}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev > 1.0
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mm_mcuxpresso-2.11.1_v10}} <!--
|-
-->{{#vardefine:RELEASE_DATE|07/01/2022}} <!--
| style="padding: 5px;"| imx8mn-var-som-rev10-'''m7'''.dtb
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev 1.0
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
|-
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf}}<!--
| style="padding: 5px;"| fsl-imx8mn-var-som-'''m7'''.dtb
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MM}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev > 1.0
-->{{#vardefine:YOCTO_RELEASE_TAG|hardknott-fslc-5.4-2.3.x-mx8mm-v1.4}}<!--
|-
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch}}<!--
| style="padding: 5px;"| fsl-imx8mn-var-som-rev10-'''m7'''.dtb
-->{{#vardefine:BOARD_SDK|dart_mx8mm}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev 1.0
--><section end=MCUXPRESSO_2.11.1_V1.0_DART-MX8M-MINI/><!--
|-
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
|}
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DEACTIVATE_LMEM_CACHE_PATCH = '''{{#var:DEACTIVATE_LMEM_CACHE_PATCH}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''


This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.<!--
=== mcuxpresso-2.12.1-mx8mm-v1.0 ===
--><section end=VAR-SOM-MX8M-NANO_DTBS_SECTION/>
<section begin=MCUXPRESSO_2.12.1_V1.0_DART-MX8M-MINI/><!--
 
-->{{#vardefine:OS|FreeRTOS}}<!--
=== Default M7 pins ===
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-MINI}}<!--
<section begin=VAR-SOM-MX8M-NANO_PINS_SECTION/><!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.12.1-mx8mm-v1.0}}<!--
-->Default M7 pins used by the demos are:
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.12.1_V1.0_DART-MX8M-MINI}}<!--
 
-->{{#vardefine:MCUXPRESSO_VERSION|2.12.1}}<!--
{| class="wikitable"
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
|-
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
! scope="col" | function
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.12.x-var01}}<!--
! scope="col" | SoC balls
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
! scope="col" | VAR-SOM-MX8M-NANO pins
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
! scope="col" | Symphony pins
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.10}}<!--
! scope="col" | notes
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mm}}<!--
|-
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| UART3 RX/TX
-->{{#vardefine:PINS_SECTION|DART-MX8M-MINI_PINS_SECTION_V2}}<!--
| E18 / D18
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-MINI_DEMOS_SECTION}}<!--
| J1.175 / J1.124
-->{{#vardefine:DTBS_SECTION|DART-MX8M-MINI_DTBS_SECTION}}<!--
| J18.5 / J18.3
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION}}<!--
|
-->{{#vardefine:JTAG_SECTION|DART-MX8M_JTAG_SECTION}}<!--
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mm_mcuxpresso-2.12.1_v10}} <!--
-->{{#vardefine:RELEASE_DATE|07/01/2022}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MM}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|mx8mm-yocto-kirkstone-5.15-2.0.x-v1.0}}<!--
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch}}<!--
-->{{#vardefine:BOARD_SDK|dart_mx8mm}}<!--
--><section end=MCUXPRESSO_2.12.1_V1.0_DART-MX8M-MINI/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DEACTIVATE_LMEM_CACHE_PATCH = '''{{#var:DEACTIVATE_LMEM_CACHE_PATCH}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
 
= VAR-SOM-MX8M-NANO =
 
== Sections ==
 
=== Available dtbs ===
<section begin=VAR-SOM-MX8M-NANO_DTBS_SECTION/><!--
-->To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m7''' label in the name, using the fdt_file environment variable in U-Boot.
 
{| class="wikitable"
|-
|-
| GPIO4_IO23
! scope="col" | File Name<br/>
| AC24
! scope="col" | Description<br/>
| J1.21
|-
| J16.5
| style="padding: 5px;"| imx8mn-var-som-symphony-'''m7'''.dtb
|
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above
|-
|-
| I2C4 SCL/SDA
| style="padding: 5px;"| imx8mn-var-som-symphony-legacy-'''m7'''.dtb
| D13 / E13
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
| J1.174 / J1.176
| J16.10 / J16.12
|
|-
|-
| PWM3
| style="padding: 5px;"| imx8mn-var-som-'''m7'''.dtb
| AF9
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev > 1.0
| J1.69
| J18.2
|
|-
|-
| SPI1 CS0/SCK/SDI/SDO
| style="padding: 5px;"| imx8mn-var-som-rev10-'''m7'''.dtb
| B6 / D6 / A7 / B7
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev 1.0
| J1.39 / J1.43 / J1.41 / J1.45
| J16.4/ J16.2 / J16.6 / J16.8
| enablind it SPI devices will be no longer visible from Linux
|-
|-
|}<!--
| style="padding: 5px;"| fsl-imx8mn-var-som-'''m7'''.dtb
--><section end=VAR-SOM-MX8M-NANO_PINS_SECTION/>
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev > 1.0
 
|-
=== Available Demos ===
| style="padding: 5px;"| fsl-imx8mn-var-som-rev10-'''m7'''.dtb
<section begin=VAR-SOM-MX8M-NANO_DEMOS_SECTION/><!--
| style="padding: 5px;"| VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev 1.0
-->* driver_examples/i2c/interrupt_b2b_transfer/slave
|-
* driver_examples/i2c/interrupt_b2b_transfer/master
|}
* driver_examples/i2c/polling_b2b_transfer/slave
 
* driver_examples/i2c/polling_b2b_transfer/master
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.<!--
* driver_examples/wdog
--><section end=VAR-SOM-MX8M-NANO_DTBS_SECTION/>
* driver_examples/sdma/scatter_gather
 
* driver_examples/sdma/memory_to_memory
=== Default M7 pins ===
* driver_examples/gpio/led_output
<section begin=VAR-SOM-MX8M-NANO_PINS_SECTION/><!--
* driver_examples/pwm
-->Default M7 pins used by the demos are:
* driver_examples/uart/auto_baudrate_detect
 
* driver_examples/uart/interrupt
{| class="wikitable"
* driver_examples/uart/idle_detect_sdma_transfer
|-
* driver_examples/uart/interrupt_rb_transfer
! scope="col" | Function
* driver_examples/uart/sdma_transfer
! scope="col" | SoC balls
* driver_examples/uart/polling
! scope="col" | VAR-SOM-MX8M-NANO pins
* driver_examples/uart/interrupt_transfer
! scope="col" | Symphony pins
* driver_examples/gpt/timer
! scope="col" | Notes
* driver_examples/gpt/capture
|-
* driver_examples/ecspi/ecspi_loopback
| UART3 RX/TX
* driver_examples/ecspi/interrupt_b2b_transfer/slave
| E18 / D18
* driver_examples/ecspi/interrupt_b2b_transfer/master
| J1.175 / J1.124
* driver_examples/ecspi/polling_b2b_transfer/slave
| J18.5 / J18.3
* driver_examples/ecspi/polling_b2b_transfer/master
|
* driver_examples/rdc
|-
* driver_examples/tmu_1/monitor_threshold
| GPIO4_IO23
* driver_examples/tmu_1/temperature_polling
| AC24
* driver_examples/sema4/uboot
| J1.21
* rtos_examples/freertos_ecspi/ecspi_loopback
| J16.5
* rtos_examples/freertos_hello
|
* rtos_examples/freertos_queue
|-
* rtos_examples/freertos_sem
| I2C4 SCL/SDA
* rtos_examples/freertos_generic
| D13 / E13
* rtos_examples/freertos_uart
| J1.174 / J1.176
* rtos_examples/freertos_tickless
| J16.10 / J16.12
* rtos_examples/freertos_mutex
|
* rtos_examples/freertos_event
* rtos_examples/freertos_swtimer
* rtos_examples/freertos_i2c
* cmsis_driver_examples/i2c/int_b2b_transfer/slave
* cmsis_driver_examples/i2c/int_b2b_transfer/master
* cmsis_driver_examples/uart/sdma_transfer
* cmsis_driver_examples/uart/interrupt_transfer
* cmsis_driver_examples/ecspi/int_loopback_transfer
* cmsis_driver_examples/ecspi/sdma_loopback_transfer
* multicore_examples/rpmsg_lite_str_echo_rtos
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
* demo_apps/hello_world<!--
--><section end=VAR-SOM-MX8M-NANO_DEMOS_SECTION/>
 
=== Memory types ===
<section begin=VAR-SOM-MX8MN_MEMORY-TYPES/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
 
Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.
 
{| class="wikitable"
|-
|-
! scope="col" | memory type
| PWM3
! scope="col" | M7 memory area
| AF9
! scope="col" | A53 memory area
| J1.69
! scope="col" | memory lentgh
| J18.2
! scope="col" | linker file
|
|-
|-
| DDR
| SPI1 CS0/SCK/SDI/SDO
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
| B6 / D6 / A7 / B7
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
| J1.39 / J1.43 / J1.41 / J1.45
| 16MB (DDR)
| J16.4/ J16.2 / J16.6 / J16.8
| MIMX8MN6xxxxx_cm7_ddr_ram.ld
| Enabling it SPI devices will be no longer visible from Linux
|-
|-
| TCM
|}<!--
| 0x00000000-0x0001FFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
--><section end=VAR-SOM-MX8M-NANO_PINS_SECTION/>
| 0x007E0000-0x007FFFFF (code)<br>0x00800000-0x0081FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
| 256kB (TCM) + 16MB (DDR)
| MIMX8MN6xxxxx_cm7_ram.ld
|-
|}


All linker files are locate in the '''armgcc''' folder of each demo.
=== Available Demos ===
 
<section begin=VAR-SOM-MX8M-NANO_DEMOS_SECTION/><!--
The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M7 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M7.
-->* driver_examples/i2c/interrupt_b2b_transfer/slave
 
* driver_examples/i2c/interrupt_b2b_transfer/master
The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.
* driver_examples/i2c/polling_b2b_transfer/slave
 
* driver_examples/i2c/polling_b2b_transfer/master
After launching the build_all.sh command the following folder will be created in the armgcc folder
* driver_examples/wdog
 
* driver_examples/sdma/scatter_gather
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/sdma/memory_to_memory
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* driver_examples/gpio/led_output
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/pwm
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
* driver_examples/uart/auto_baudrate_detect
 
* driver_examples/uart/interrupt
Further details about memory mapping are available in [https://www.nxp.com/webapp/Download?colCode=IMX8MNRM i.MX 8M Applications Processors Reference Manual] paragraphs:
* driver_examples/uart/idle_detect_sdma_transfer
 
* driver_examples/uart/interrupt_rb_transfer
* 2.1.2 Cortex-A53 Memory Map
* driver_examples/uart/sdma_transfer
* 2.1.3 Cortex-M7 Memory Map<!--
* driver_examples/uart/polling
--><section end=VAR-SOM-MX8MN_MEMORY-TYPES/>
* driver_examples/uart/interrupt_transfer
 
* driver_examples/gpt/timer
=== JTAG ===
* driver_examples/gpt/capture
<section begin=VAR-SOM-MX8MN_JTAG_SECTION/><!--
* driver_examples/ecspi/ecspi_loopback
-->VAR-SOM-MX8M-NANO exposes JTAG signals on a header (not assembled by default) on the SOM top left side.
* driver_examples/ecspi/interrupt_b2b_transfer/slave
 
* driver_examples/ecspi/interrupt_b2b_transfer/master
Here is the pinout:
* driver_examples/ecspi/polling_b2b_transfer/slave
 
* driver_examples/ecspi/polling_b2b_transfer/master
{| class="wikitable"
* driver_examples/rdc
|-
* driver_examples/tmu_1/monitor_threshold
! scope="col" | pin
* driver_examples/tmu_1/temperature_polling
! scope="col" | signal
* driver_examples/sema4/uboot
! scope="col" | description
* rtos_examples/freertos_ecspi/ecspi_loopback
! scope="col" | pin
* rtos_examples/freertos_hello
! scope="col" | signal
* rtos_examples/freertos_queue
! scope="col" | description
* rtos_examples/freertos_sem
* rtos_examples/freertos_generic
* rtos_examples/freertos_uart
* rtos_examples/freertos_tickless
* rtos_examples/freertos_mutex
* rtos_examples/freertos_event
* rtos_examples/freertos_swtimer
* rtos_examples/freertos_i2c
* cmsis_driver_examples/i2c/int_b2b_transfer/slave
* cmsis_driver_examples/i2c/int_b2b_transfer/master
* cmsis_driver_examples/uart/sdma_transfer
* cmsis_driver_examples/uart/interrupt_transfer
* cmsis_driver_examples/ecspi/int_loopback_transfer
* cmsis_driver_examples/ecspi/sdma_loopback_transfer
* multicore_examples/rpmsg_lite_str_echo_rtos
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
* demo_apps/hello_world<!--
--><section end=VAR-SOM-MX8M-NANO_DEMOS_SECTION/>
 
=== Memory types ===
<section begin=VAR-SOM-MX8MN_MEMORY-TYPES/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
 
Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.
 
{| class="wikitable"
|-
|-
| '''1'''
! scope="col" | memory type
| JTAG_VREF
! scope="col" | M7 memory area
| JTAG IO reference voltage,<br>connected to SOM_3V3_PER via 150 Ohm.
! scope="col" | A53 memory area
| '''2'''
! scope="col" | memory lentgh
| JTAG_TMS
! scope="col" | linker file
| JTAG Mode Select signal
|-
|-
| '''3'''
| DDR
| GND
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
| Digital Ground
| 0x7E000000-0x7E1FFFFF (code)<br>0x7E200000-0x7E3FFFFF (data)<br>0x7E400000-0x7EFFFFFF (data2)
| '''4'''
| 16MB (DDR)
| JTAG_TCK
| MIMX8MN6xxxxx_cm7_ddr_ram.ld
| JTAG Clock signal,<br>include PD of 8.2K Ohm.
|-
|-
| '''5'''
| TCM
| GND
| 0x00000000-0x0001FFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
| Digital Ground
| 0x007E0000-0x007FFFFF (code)<br>0x00800000-0x0081FFFF (data)<br>0x7E000000-0x7EFFFFFF (data2)
| '''6'''
| 256kB (TCM) + 16MB (DDR)
| JTAG_TDO
| MIMX8MN6xxxxx_cm7_ram.ld
| JTAG Data Out signal
|-
|-
| '''7'''
|}
| GND
 
| Digital Ground
All linker files are locate in the '''armgcc''' folder of each demo.
| '''8'''
 
| JTAG_TDI
The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M7 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M7.
| JTAG Data In signal
 
|-
The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.
| '''9'''
 
| JTAG_TRST_B
After launching the build_all.sh command the following folder will be created in the armgcc folder
| JTAG Reset signal,<br>active low signal
| '''10'''
| POR_B
| Programmer Reset,<br>used to put the SOC in reset state.
|-
|}


Please refer to SoM datasheet for further details.<!--
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
--><section end=VAR-SOM-MX8MN_JTAG_SECTION/>
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)


== Releases ==
Further details about memory mapping are available in [https://www.nxp.com/webapp/Download?colCode=IMX8MNRM i.MX 8M Applications Processors Reference Manual] paragraphs:


=== mcuxpresso-2.7.0-mx8mn-v1.0 ===
* 2.1.2 Cortex-A53 Memory Map
<section begin=MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO/><!--
* 2.1.3 Cortex-M7 Memory Map<!--
-->{{#vardefine:OS|FreeRTOS}}<!--
--><section end=VAR-SOM-MX8MN_MEMORY-TYPES/>
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
 
-->{{#vardefine:SOC_HAS_M7|true}}<!--
=== JTAG ===
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.7.0-mx8mn-v1.0}}<!--
<section begin=VAR-SOM-MX8MN_JTAG_SECTION/><!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->VAR-SOM-MX8M-NANO exposes JTAG signals on a header (not assembled by default) on the SOM top left side.
-->{{#vardefine:MCUXPRESSO_VERSION|2.7.0}}<!--
 
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
Here is the pinout:
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
 
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.7.x-var01}}<!--
{| class="wikitable"
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/8-2019q3/RC1.1/gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2}}<!--
! scope="col" | pin
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-8-2019-q3-update}}<!--
! scope="col" | signal
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
! scope="col" | description
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
! scope="col" | pin
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8M-NANO_PINS_SECTION}}<!--
! scope="col" | signal
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8M-NANO_DEMOS_SECTION}}<!--
! scope="col" | description
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8M-NANO_DTBS_SECTION}}<!--
|-
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
| '''1'''
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
| JTAG_VREF
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.7.0_v10}} <!--
| JTAG IO reference voltage,<br>connected to SOM_3V3_PER via 150 Ohm.
-->{{#vardefine:RELEASE_DATE|5/3/2020}} <!--
| '''2'''
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
| JTAG_TMS
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
| JTAG Mode Select signal
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
|-
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
| '''3'''
--><section end=MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO/><!--
| GND
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
| Digital Ground
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
| '''4'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
| JTAG_TCK
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
| JTAG Clock signal,<br>include PD of 8.2K Ohm.
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
|-
*SDK_PATH = '''{{#var:SDK_PATH}}'''
| '''5'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
| GND
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
| Digital Ground
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
| '''6'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
| JTAG_TDO
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
| JTAG Data Out signal
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
|-
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
| '''7'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
| GND
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
| Digital Ground
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
| '''8'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
| JTAG_TDI
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
| JTAG Data In signal
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
|-
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
| '''9'''
=== mcuxpresso-2.8.0-mx8mn-v1.0 ===
| JTAG_TRST_B
<section begin=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO/><!--
| JTAG Reset signal,<br>active low signal
| '''10'''
| POR_B
| Programmer Reset,<br>used to put the SOC in reset state.
|-
|}
 
Please refer to SoM datasheet for further details.<!--
--><section end=VAR-SOM-MX8MN_JTAG_SECTION/>
 
== Releases ==
 
=== mcuxpresso-2.7.0-mx8mn-v1.0 ===
<section begin=MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.8.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.7.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.8.0}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.7.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.8.x-var01}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.7.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/8-2019q3/RC1.1/gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-8-2019-q3-update}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
Line 1,304: Line 1,412:
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.7.0_v10}} <!--
-->{{#vardefine:RELEASE_DATE|5/3/2020}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.8.0_v10}}<!--
--><section end=MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->{{#vardefine:RELEASE_DATE|9/8/2020}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
--><section end=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
Line 1,331: Line 1,439:
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
 
=== mcuxpresso-2.8.0-mx8mn-v1.0 ===
=== mcuxpresso-2.9.0-mx8mn-v1.0 ===
<section begin=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO/><!--
<section begin=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.8.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.8.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.8.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
Line 1,355: Line 1,461:
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.9.0_v10}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.8.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|1/27/2021}}<!--
-->{{#vardefine:RELEASE_DATE|9/8/2020}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mn-v1.1}}<!--
--><section end=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO/><!--
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
Line 1,381: Line 1,486:
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''


=== mcuxpresso-2.10.0-mx8mn-v1.0 ===
=== mcuxpresso-2.9.0-mx8mn-v1.0 ===
<section begin=MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO/><!--
<section begin=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:SOC_HAS_M7|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.10.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8mn-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.10.0}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.10.x-var01}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10-2020-q4-major}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
Line 1,406: Line 1,510:
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.10.0_v10}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.9.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|10/21/2021}}<!--
-->{{#vardefine:RELEASE_DATE|1/27/2021}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mn-v1.6}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mn-v1.1}}<!--
-->{{#vardefine:BOARD_SDK|som_mx8mn}}<!--
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO/><!--
--><section end=MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
Line 1,435: Line 1,538:
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''


= DART-MX8M-PLUS =
=== mcuxpresso-2.10.0-mx8mn-v1.0 ===
 
<section begin=MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO/><!--
== Sections ==
-->{{#vardefine:OS|FreeRTOS}}<!--
 
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
=== Available dtbs ===
-->{{#vardefine:SOC_HAS_M7|true}}<!--
<section begin=DART-MX8M-PLUS_DTBS_SECTION/><!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.10.0-mx8mn-v1.0}}<!--
-->To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m7''' label in the name, using the fdt_file environment variable in U-Boot.
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO}}<!--
 
-->{{#vardefine:MCUXPRESSO_VERSION|2.10.0}}<!--
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
 
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
{| class="wikitable"
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.10.x-var01}}<!--
|-
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
! scope="col" | File Name<br/>
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
! scope="col" | Description<br/>
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10-2020-q4-major}}<!--
|-
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
| style="padding: 5px;"| imx8mp-var-dart-dt8customboard-'''m7'''.dtb
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| style="padding: 5px;"| DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on DT8MCustomBoard 2.x
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8M-NANO_PINS_SECTION}}<!--
|-
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8M-NANO_DEMOS_SECTION}}<!--
| style="padding: 5px;"| imx8mp-var-dart-dt8mcustomboard-legacy-'''m7'''.dtb
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8M-NANO_DTBS_SECTION}}<!--
| style="padding: 5px;"| DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on on DT8MCustomBoard 1.x
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
|-
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
| style="padding: 5px;"| imx8mp-var-som-symphony-'''m7'''.dtb
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
|-
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.10.0_v10}}<!--
| style="padding: 5px;"| imx8mp-var-som-symphony-2nd-ov5640'''m7'''.dtb
-->{{#vardefine:RELEASE_DATE|10/21/2021}}<!--
| style="padding: 5px;"| VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board with 2nd OV5640
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
|-
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
|}
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mn-v1.6}}<!--
 
-->{{#vardefine:BOARD_SDK|som_mx8mn}}<!--
<section end=DART-MX8M-PLUS_DTBS_SECTION/>
--><section end=MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO/><!--
 
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
=== Default M7 pins v1 ===
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
<section begin=DART-MX8M-PLUS_PINS_SECTION/><!--
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
-->Default M7 pins used by the demos are:
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
 
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
{| class="wikitable"
*SDK_PATH = '''{{#var:SDK_PATH}}'''
|-
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
! scope="col" | function
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
! scope="col" | SoC balls
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
! scope="col" | DART-MX8M-PLUS pins
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
! scope="col" | DT8MCB pins
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
! scope="col" | VAR-SOM-MX8M-PLUS pins
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
! scope="col" | Symphony pins
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
! scope="col" | notes
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
|-
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
| UART3 RX/TX
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
| AE6 / AJ4
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
| J2.87 / J2.89
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
| J12.11 / J12.13
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
|
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
|
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
|
 
|-
=== mcuxpresso-2.11.1-mx8mn-v1.0 ===
| UART4 RX/TX
<section begin=MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO/><!--
| AH5 / AJ5
-->{{#vardefine:OS|FreeRTOS}}<!--
|  
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
|
-->{{#vardefine:SOC_HAS_M7|true}}<!--
| J1.115 / J1.171
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.11.1-mx8mn-v1.0}}<!--
| J18.9 / J18.7
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO}}<!--
|  
-->{{#vardefine:MCUXPRESSO_VERSION|2.11.1}}<!--
|-
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
| GPIO3_IO14
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
| R26
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.11.x-var01}}<!--
|  
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
|  
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
| J1.79
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.07}}<!--
| J17.10
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
|
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
|-
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8M-NANO_PINS_SECTION}}<!--
| GPIO4_IO03
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8M-NANO_DEMOS_SECTION}}<!--
| AF10
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8M-NANO_DTBS_SECTION}}<!--
| J2.59
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
| GPLED1 on DT8MCB rev 1.x<br>J11.20 on DT8MCB rev 2.x
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
|
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
|
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
|
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.11.1_v10}}<!--
|-
-->{{#vardefine:RELEASE_DATE|05/31/2022}}<!--
| I2C3 SCL/SDA
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
| AJ7 / AJ6
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
| J3.46 / J3.42
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8mn-v1.8}}<!--
| J12.18/ J12.20
-->{{#vardefine:BOARD_SDK|som_mx8mn}}<!--
|
--><section end=MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO/><!--
|
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
|
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
|-
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
| I2C4 SCL/SDA
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
| AF8 / AD8
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
|  
*SDK_PATH = '''{{#var:SDK_PATH}}'''
|  
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
| J1.92 / J1.90
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
| J16.13 / J16.15
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
| enabling it SPI devices will be no longer visible from Linux
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
|-
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
| PWM2
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
| D8
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
|  
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
|  
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
| J1.69
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
| J18.2
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
|
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
|-
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
| PWM3
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
| AE18
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
| J3.36
 
| J14.7
=== mcuxpresso-2.12.1-mx8mn-v1.0 ===
|  
<section begin=MCUXPRESSO_2.12.1_V1.0_VAR-SOM-MX8M-NANO/><!--
|  
-->{{#vardefine:OS|FreeRTOS}}<!--
|
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8M-NANO}}<!--
|-
-->{{#vardefine:SOC_HAS_M7|true}}<!--
| SPI1 CS0/SCK/SDI/SDO
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.12.1-mx8mn-v1.0}}<!--
| AE20 / AF20 / AD20 / AC20
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.12.1_V1.0_VAR-SOM-MX8M-NANO}}<!--
| J2.79 / J2.77 / J2.81 / J2.83
-->{{#vardefine:MCUXPRESSO_VERSION|2.12.1}}<!--
| J16.4/ J16.2 / J16.8 / J16.6
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
|
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
|
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.12.x-var01}}<!--
| enabling it SPI devices will be no longer visible from Linux
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.10}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8mn}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8M-NANO_PINS_SECTION}}<!--
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8M-NANO_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8M-NANO_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8MN_MEMORY-TYPES}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8MN_JTAG_SECTION}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MN}}<!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8mn_mcuxpresso-2.12.1_v10}}<!--
-->{{#vardefine:RELEASE_DATE|11/14/2022}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.0 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.2 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|mx8mn-yocto-hardknott-5.10.72_2.2.1-v1.0}}<!--
-->{{#vardefine:BOARD_SDK|som_mx8mn}}<!--
--><section end=MCUXPRESSO_2.12.1_V1.0_VAR-SOM-MX8M-NANO/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_M7 = '''{{#var:SOC_HAS_M7}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
 
= DART-MX8M-PLUS =
 
== Sections ==
 
=== Available dtbs ===
<section begin=DART-MX8M-PLUS_DTBS_SECTION/><!--
-->To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m7''' label in the name, using the fdt_file environment variable in U-Boot.
 
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.
 
{| class="wikitable"
|-
|-
| SPI2 CS0/SCK/SDI/SDO
! scope="col" | File Name<br/>
| AJ22 / AH21 / AH20 / AJ21
! scope="col" | Description<br/>
|  
|-
|  
| style="padding: 5px;"| imx8mp-var-dart-dt8customboard-'''m7'''.dtb
| J1.39 / J1.43 / J1.41 / J1.45
| style="padding: 5px;"| DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on DT8MCustomBoard 2.x
| J16.4/ J16.2 / J16.6 / J16.8
|-
| enabling it SPI devices will be no longer visible from Linux
| style="padding: 5px;"| imx8mp-var-dart-dt8mcustomboard-legacy-'''m7'''.dtb
| style="padding: 5px;"| DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on on DT8MCustomBoard 1.x
|-
| style="padding: 5px;"| imx8mp-var-som-symphony-'''m7'''.dtb
| style="padding: 5px;"| VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board
|-
| style="padding: 5px;"| imx8mp-var-som-symphony-2nd-ov5640'''m7'''.dtb
| style="padding: 5px;"| VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board with 2nd OV5640
|-
|-
{{#ifeq: {{#var:MCUXPRESSO_VERSION}} | 2.10.0 |
|}
{{!}}-
 
{{!}} FLEXCAN1 RX/TX {{!}}{{!}} AH15 / AJ16 {{!}}{{!}} j2.56 / j2.50 {{!}}{{!}} J13.11 / J13.5 on DT8MCB rev 1.x, TTL levels (CAN transceiver not mounted!) {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}} enabling it FLEXCAN1 devices will be no longer visible from Linux
<section end=DART-MX8M-PLUS_DTBS_SECTION/>
{{!}}-
 
{{!}}  {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}}  J16.9 / J16.7 on DT8MCB rev 2.x, CANL/CANH levels (CAN transceiver mounted!) {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}}
=== Default M7 pins v1 ===
{{!}}-
<section begin=DART-MX8M-PLUS_PINS_SECTION/><!--
{{!}} FLEXCAN2 RX/TX {{!}}{{!}} AJ4 / AE6 {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}} J1.46 / J1.44 {{!}}{{!}} J16.18 / J16.20, CANL/CANH levels (CAN transceiver mounted!) {{!}}{{!}} enabling it FLEXCAN2 devices will be no longer visible from Linux
-->Default M7 pins used by the demos are:
{{!}}-
}}
|}<!--
--><section end=DART-MX8M-PLUS_PINS_SECTION/>


=== Available Demos ===
{| class="wikitable"
<section begin=DART-MX8M-PLUS_DEMOS_SECTION/><!--
|-
-->* driver_examples/i2c/interrupt_b2b_transfer/slave
! scope="col" | Function
* driver_examples/i2c/interrupt_b2b_transfer/master
! scope="col" | SoC balls
* driver_examples/i2c/polling_b2b_transfer/slave
! scope="col" | DART-MX8M-PLUS pins
* driver_examples/i2c/polling_b2b_transfer/master
! scope="col" | DT8MCB pins
* driver_examples/wdog
! scope="col" | VAR-SOM-MX8M-PLUS pins
* driver_examples/sdma/scatter_gather
! scope="col" | Symphony pins
* driver_examples/sdma/memory_to_memory
! scope="col" | Notes
* driver_examples/gpio/led_output
|-
* driver_examples/pwm
| UART3 RX/TX
* driver_examples/uart/auto_baudrate_detect
| AE6 / AJ4
* driver_examples/uart/interrupt
| J2.87 / J2.89
* driver_examples/uart/interrupt_rb_transfer
| J12.11 / J12.13
* driver_examples/uart/polling
|
* driver_examples/uart/interrupt_transfer
|
* driver_examples/gpt/timer
|
* driver_examples/gpt/capture
|-
* driver_examples/ecspi/ecspi_loopback
| UART4 RX/TX
* driver_examples/ecspi/interrupt_b2b_transfer/slave
| AH5 / AJ5
* driver_examples/ecspi/interrupt_b2b_transfer/master
|
* driver_examples/ecspi/polling_b2b_transfer/slave
|
* driver_examples/ecspi/polling_b2b_transfer/master
| J1.115 / J1.171
* driver_examples/rdc
| J18.9 / J18.7
* driver_examples/tmu/monitor_threshold
|
* driver_examples/tmu/temperature_polling
|-
* driver_examples/sema4/uboot
| GPIO3_IO14
{{#ifeq: {{#var:MCUXPRESSO_VERSION}} | 2.10.0 |
| R26
* driver_examples/canfd/interrupt_transfer
|
* driver_examples/canfd/loopback
|
* driver_examples/canfd/loopback_transfer
| J1.79
* driver_examples/canfd/ping_pong_buffer_transfer
| J17.10
* driver_examples/flexcan/interrupt_transfer
|
* driver_examples/flexcan/loopback
|-
* driver_examples/flexcan/loopback_transfer
| GPIO4_IO03
* driver_examples/flexcan/ping_pong_buffer_transfer
| AF10
}}
| J2.59
* rtos_examples/freertos_ecspi/ecspi_loopback
| GPLED1 on DT8MCB rev 1.x<br>J11.20 on DT8MCB rev 2.x
* rtos_examples/freertos_hello
|
* rtos_examples/freertos_queue
|
* rtos_examples/freertos_sem
|
* rtos_examples/freertos_generic
* rtos_examples/freertos_uart
* rtos_examples/freertos_tickless
* rtos_examples/freertos_mutex
* rtos_examples/freertos_event
* rtos_examples/freertos_swtimer
* rtos_examples/freertos_i2c
* cmsis_driver_examples/i2c/int_b2b_transfer/slave
* cmsis_driver_examples/i2c/int_b2b_transfer/master
* cmsis_driver_examples/uart/interrupt_transfer
* cmsis_driver_examples/ecspi/int_loopback_transfer
* cmsis_driver_examples/ecspi/sdma_loopback_transfer
* multicore_examples/rpmsg_lite_str_echo_rtos
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
* demo_apps/hello_world
{{note|The demos below only work if loaded from U-Boot !}}
* driver_examples/uart/idle_detect_sdma_transfer
* driver_examples/uart/sdma_transfer
* cmsis_driver_examples/uart/sdma_transfer<!--
--><section end=DART-MX8M-PLUS_DEMOS_SECTION/>
 
=== Variscite Memory types ===
<section begin=DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
 
Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.
 
{| class="wikitable"
|-
|-
! scope="col" | memory type
| I2C3 SCL/SDA
! scope="col" | M7 memory area
| AJ7 / AJ6
! scope="col" | A53 memory area
| J3.46 / J3.42
! scope="col" | memory lentgh
| J12.18/ J12.20
! scope="col" | linker file
|  
|  
|
|-
|-
| DDR
| I2C4 SCL/SDA
| 0x80000000-0x801FFFFF (code)<br>0x80200000-0x803FFFFF (data)<br>0x80400000-0x80FFFFFF (data2)
| AF8 / AD8
| 0x80000000-0x801FFFFF (code)<br>0x80200000-0x803FFFFF (data)<br>0x80400000-0x80FFFFFF (data2)
|  
| 16MB (DDR)
|  
| MIMX8MN6xxxxx_cm7_ddr_ram.ld
| J1.92 / J1.90
| J16.13 / J16.15
| Enabling it SPI devices will be no longer visible from Linux
|-
|-
| TCM
| PWM2
| 0x00000000-0x0001FFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x80000000-0x80FFFFFF (data2)
| D8
| 0x007E0000-0x007FFFFF (code)<br>0x00800000-0x0081FFFF (data)<br>0x80000000-0x80FFFFFF (data2)
|  
| 256kB (TCM) + 16MB (DDR)
|  
| MIMX8MN6xxxxx_cm7_ram.ld
| J1.69
| J18.2
|
|-
|-
|}
| PWM3
 
| AE18
All linker files are locate in the '''armgcc''' folder of each demo.
| J3.36
| J14.7
|
|
|
|-
| SPI1 CS0/SCK/SDI/SDO
| AE20 / AF20 / AD20 / AC20
| J2.79 / J2.77 / J2.81 / J2.83
| J16.4/ J16.2 / J16.8 / J16.6
|
|
| Enabling it SPI devices will be no longer visible from Linux
|-
| SPI2 CS0/SCK/SDI/SDO
| AJ22 / AH21 / AH20 / AJ21
|
|
| J1.39 / J1.43 / J1.41 / J1.45
| J16.4/ J16.2 / J16.6 / J16.8
| Enabling it SPI devices will be no longer visible from Linux
|-
{{#ifeq: {{#var:MCUXPRESSO_VERSION}} | 2.9.0 |
|
{{!}}-
{{!}} FLEXCAN1 RX/TX {{!}}{{!}} AH15 / AJ16 {{!}}{{!}} j2.56 / j2.50 {{!}}{{!}} J13.11 / J13.5 on DT8MCB rev 1.x, TTL levels (CAN transceiver not mounted!) {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}} Enabling it FLEXCAN1 devices will be no longer visible from Linux
{{!}}-
{{!}}  {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}}  J16.9 / J16.7 on DT8MCB rev 2.x, CANL/CANH levels (CAN transceiver mounted!) {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}}
{{!}}-
{{!}} FLEXCAN2 RX/TX {{!}}{{!}} AJ4 / AE6 {{!}}{{!}}  {{!}}{{!}}  {{!}}{{!}} J1.46 / J1.44 {{!}}{{!}} J16.18 / J16.20, CANL/CANH levels (CAN transceiver mounted!) {{!}}{{!}} Enabling it FLEXCAN2 devices will be no longer visible from Linux
{{!}}-
}}
|}<!--
--><section end=DART-MX8M-PLUS_PINS_SECTION/>


The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x80000000 - 0x80FFFFFF.
=== Available Demos ===
 
<section begin=DART-MX8M-PLUS_DEMOS_SECTION/><!--
The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.
-->* driver_examples/i2c/interrupt_b2b_transfer/slave
 
* driver_examples/i2c/interrupt_b2b_transfer/master
After launching the build_all.sh command the following folder will be created in the armgcc folder
* driver_examples/i2c/polling_b2b_transfer/slave
 
* driver_examples/i2c/polling_b2b_transfer/master
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/wdog
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* driver_examples/sdma/scatter_gather
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* driver_examples/sdma/memory_to_memory
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
* driver_examples/gpio/led_output
 
* driver_examples/pwm
Further details about memory mapping are available in [https://www.nxp.com/webapp/Download?colCode=IMX8MPRM.pdf i.MX 8M-Plus Applications Processors Reference Manual] paragraphs:
* driver_examples/uart/auto_baudrate_detect
 
* driver_examples/uart/interrupt
* 2.2 Cortex-A53 Memory Map
* driver_examples/uart/interrupt_rb_transfer
* 2.3 Cortex-M7 Memory Map<!--
* driver_examples/uart/polling
--><section end=DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION/>
* driver_examples/uart/interrupt_transfer
 
* driver_examples/gpt/timer
=== JTAG ===
* driver_examples/gpt/capture
<section begin=DART-MX8M-PLUS_JTAG_SECTION/><!--
* driver_examples/ecspi/ecspi_loopback
 
* driver_examples/ecspi/interrupt_b2b_transfer/slave
-->The VAR-SOM-MX8M-PLUS exposes JTAG interface via an optional 10-pin header, on the SOM top left side.<br>
* driver_examples/ecspi/interrupt_b2b_transfer/master
The DART-MX8M-PLUS exports JTAG interface via an optional 10-pin header, on the DT8MCustomBoard top side.
* driver_examples/ecspi/polling_b2b_transfer/slave
 
* driver_examples/ecspi/polling_b2b_transfer/master
Here is the pinout:
* driver_examples/rdc
 
* driver_examples/tmu/monitor_threshold
{| class="wikitable"
* driver_examples/tmu/temperature_polling
|-
* driver_examples/sema4/uboot
! scope="col" | pin
{{#if: {{#var:SDK_SUPPORT_CAN}} |
! scope="col" | signal
* driver_examples/canfd/interrupt_transfer
! scope="col" | description
* driver_examples/canfd/loopback
! scope="col" | pin
* driver_examples/canfd/loopback_transfer
! scope="col" | signal
* driver_examples/canfd/ping_pong_buffer_transfer
! scope="col" | description
* driver_examples/flexcan/interrupt_transfer
|-
* driver_examples/flexcan/loopback
| '''1'''
* driver_examples/flexcan/loopback_transfer
| JTAG_VREF
* driver_examples/flexcan/ping_pong_buffer_transfer
| JTAG IO reference voltage,<br>connected to SOM_3V3_PER via 150 Ohm.
}}
| '''2'''
* rtos_examples/freertos_ecspi/ecspi_loopback
| JTAG_TMS
* rtos_examples/freertos_hello
| JTAG Mode Select signal
* rtos_examples/freertos_queue
|-
* rtos_examples/freertos_sem
| '''3'''
* rtos_examples/freertos_generic
| GND
* rtos_examples/freertos_uart
| Digital Ground
* rtos_examples/freertos_tickless
| '''4'''
* rtos_examples/freertos_mutex
| JTAG_TCK
* rtos_examples/freertos_event
| JTAG Clock signal,<br>include PD of 8.2K Ohm.
* rtos_examples/freertos_swtimer
* rtos_examples/freertos_i2c
* cmsis_driver_examples/i2c/int_b2b_transfer/slave
* cmsis_driver_examples/i2c/int_b2b_transfer/master
* cmsis_driver_examples/uart/interrupt_transfer
* cmsis_driver_examples/ecspi/int_loopback_transfer
* cmsis_driver_examples/ecspi/sdma_loopback_transfer
* multicore_examples/rpmsg_lite_str_echo_rtos
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
* demo_apps/hello_world
* driver_examples/uart/idle_detect_sdma_transfer
* driver_examples/uart/sdma_transfer
* cmsis_driver_examples/uart/sdma_transfer<!--
--><section end=DART-MX8M-PLUS_DEMOS_SECTION/>
 
=== Variscite Memory types ===
<section begin=DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
 
Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.
 
{| class="wikitable"
|-
|-
| '''5'''
! scope="col" | memory type
| GND
! scope="col" | M7 memory area
| Digital Ground
! scope="col" | A53 memory area
| '''6'''
! scope="col" | memory lentgh
| JTAG_TDO
! scope="col" | linker file
| JTAG Data Out signal
|-
|-
| '''7'''
| DDR
| GND
| 0x80000000-0x801FFFFF (code)<br>0x80200000-0x803FFFFF (data)<br>0x80400000-0x80FFFFFF (data2)
| Digital Ground
| 0x80000000-0x801FFFFF (code)<br>0x80200000-0x803FFFFF (data)<br>0x80400000-0x80FFFFFF (data2)
| '''8'''
| 16MB (DDR)
| JTAG_TDI
| MIMX8MN6xxxxx_cm7_ddr_ram.ld
| JTAG Data In signal
|-
|-
| '''9'''
| TCM
| JTAG_TRST_B
| 0x00000000-0x0001FFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x80000000-0x80FFFFFF (data2)
| JTAG Reset signal,<br>active low signal
| 0x007E0000-0x007FFFFF (code)<br>0x00800000-0x0081FFFF (data)<br>0x80000000-0x80FFFFFF (data2)
| '''10'''
| 256kB (TCM) + 16MB (DDR)
| POR_B
| MIMX8MN6xxxxx_cm7_ram.ld
| Programmer Reset,<br>used to put the SOC in reset state.
|-
|-
|}
|}


Please refer to SoM datasheet for further details.<!--
All linker files are locate in the '''armgcc''' folder of each demo.
--><section end=DART-MX8M-PLUS_JTAG_SECTION/>


== Releases ==
The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x80000000 - 0x80FFFFFF.


=== mcuxpresso-2.9.0-mx8mp-v1.0 ===
The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.
<section begin=MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS/><!--
 
-->{{#vardefine:OS|FreeRTOS}}<!--
After launching the build_all.sh command the following folder will be created in the armgcc folder
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
 
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8mp-v1.0}}<!--
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS}}<!--
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
 
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
Further details about memory mapping are available in [https://www.nxp.com/webapp/Download?colCode=IMX8MPRM.pdf i.MX 8M-Plus Applications Processors Reference Manual] paragraphs:
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
 
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
* 2.2 Cortex-A53 Memory Map
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
* 2.3 Cortex-M7 Memory Map<!--
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
--><section end=DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION/>
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
 
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
=== JTAG ===
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
<section begin=DART-MX8M-PLUS_JTAG_SECTION/><!--
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
 
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
-->The VAR-SOM-MX8M-PLUS exposes JTAG interface via an optional 10-pin header, on the SOM top left side.<br>
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
The DART-MX8M-PLUS exports JTAG interface via an optional 10-pin header, on the DT8MCustomBoard top side.
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.9.0_v10}} <!--
-->{{#vardefine:RELEASE_DATE|5/27/2021}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|zeus-fsl-5.4.70_2.3.2-mx8mp-v1.1}}<!--
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
--><section end=MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''


=== mcuxpresso-2.10.0-mx8mp-v1.0 ===
Here is the pinout:
<section begin=MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS/><!--
 
-->{{#vardefine:OS|FreeRTOS}}<!--
{| class="wikitable"
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
|-
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.10.0-mx8mp-v1.0}}<!--
! scope="col" | pin
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS}}<!--
! scope="col" | signal
-->{{#vardefine:MCUXPRESSO_VERSION|2.10.0}}<!--
! scope="col" | description
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
! scope="col" | pin
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
! scope="col" | signal
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.10.x-var01}}<!--
! scope="col" | description
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
|-
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
| '''1'''
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10-2020-q4-major}}<!--
| JTAG_VREF
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
| JTAG IO reference voltage,<br>connected to SOM_3V3_PER via 150 Ohm.
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
| '''2'''
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| JTAG_TMS
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
| JTAG Mode Select signal
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
|-
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
| '''3'''
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
| GND
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
| Digital Ground
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.10.0_v10}} <!--
| '''4'''
-->{{#vardefine:RELEASE_DATE|9/27/2021}} <!--
| JTAG_TCK
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| JTAG Clock signal,<br>include PD of 8.2K Ohm.
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
|-
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
| '''5'''
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
| GND
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
| Digital Ground
-->{{#vardefine:YOCTO_RELEASE_TAG|hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2}}<!--
| '''6'''
-->{{#vardefine:BOARD_SDK|dart_mx8mp}}<!--
| JTAG_TDO
--><section end=MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS/><!--
| JTAG Data Out signal
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
|-
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
| '''7'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
| GND
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
| Digital Ground
*SDK_PATH = '''{{#var:SDK_PATH}}'''
| '''8'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
| JTAG_TDI
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
| JTAG Data In signal
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
|-
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
| '''9'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
| JTAG_TRST_B
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
| JTAG Reset signal,<br>active low signal
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
| '''10'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
| POR_B
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
| Programmer Reset,<br>used to put the SOC in reset state.
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
|-
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
|}
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''


= VAR-SOM-MX8X =
Please refer to SoM datasheet for further details.<!--
--><section end=DART-MX8M-PLUS_JTAG_SECTION/>


== Sections ==
== Releases ==


=== Available dtbs ===
=== mcuxpresso-2.9.0-mx8mp-v1.0 ===
<section begin=VAR-SOM-MX8X_DTBS_SECTION/><!--
<section begin=MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS/><!--
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.
-->{{#vardefine:OS|FreeRTOS}}<!--
 
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8mp-v1.0}}<!--
 
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS}}<!--
{| class="wikitable"
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
|-
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
! scope="col" | File Name<br/>
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
! scope="col" | Description<br/>
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
|-
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
| style="padding: 5px;"| imx8qxp-var-som-symphony-sd-'''m4'''.dtb
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
| style="padding: 5px;"| VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
|-
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
| style="padding: 5px;"| imx8qxp-var-som-symphony-'''m4'''.dtb
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
| style="padding: 5px;"| VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
|-
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
|}
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
<section end=VAR-SOM-MX8X_DTBS_SECTION/>
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
 
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
=== Default M4 pins ===
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
<section begin=VAR-SOM-MX8X_PINS_SECTION/><!--
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.9.0_v10}} <!--
-->Default M4 pins used by the demos are:
-->{{#vardefine:RELEASE_DATE|5/27/2021}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|zeus-fsl-5.4.70_2.3.2-mx8mp-v1.1}}<!--
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
--><section end=MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''


{| class="wikitable"
=== mcuxpresso-2.10.0-mx8mp-v1.0 ===
|-
<section begin=MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS/><!--
! scope="col" | function
-->{{#vardefine:OS|FreeRTOS}}<!--
! scope="col" | pin
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
|-
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.10.0-mx8mp-v1.0}}<!--
| debug UART (UART2)
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS}}<!--
| RX: J18.5 / TX: J18.3
-->{{#vardefine:MCUXPRESSO_VERSION|2.10.0}}<!--
|-
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
| I2C (I2C3)
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
| SCL: J16.10 / SDA: J16.12
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.10.x-var01}}<!--
|-
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
| M4 GPIO (M40_GPIO0_IO00)
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2}}<!--
| J16.3
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10-2020-q4-major}}<!--
|-
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
| M4 PWM (M40_TPM0_CH0)
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
| J16.7
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
|-
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
<!--
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
| CAN (CAN1)
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
| RX: J18.9 / TX: J18.7
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
|-
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
-->
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.10.0_v10}} <!--
|}<!--
-->{{#vardefine:RELEASE_DATE|9/27/2021}} <!--
--><section end=VAR-SOM-MX8X_PINS_SECTION/>
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2}}<!--
-->{{#vardefine:BOARD_SDK|dart_mx8mp}}<!--
--><section end=MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''


=== Available Demos ===
=== mcuxpresso-2.11.1-mx8mp-v1.0 ===
<section begin=VAR-SOM-MX8X_DEMOS_SECTION/><!--
<section begin=MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS/><!--
-->* cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
-->{{#vardefine:OS|FreeRTOS}}<!--
* cmsis_driver_examples/lpi2c/int_b2b_transfer/master
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.11.1-mx8mp-v1.0}}<!--
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS}}<!--
* cmsis_driver_examples/lpuart/edma_transfer
-->{{#vardefine:MCUXPRESSO_VERSION|2.11.1}}<!--
* cmsis_driver_examples/lpuart/interrupt_transfer
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
* demo_apps/hello_world
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
* driver_examples/edma/scatter_gather
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.11.x-var01}}<!--
* driver_examples/edma/memory_to_memory
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
* driver_examples/intmux
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2}}<!--
* driver_examples/lpi2c/edma_b2b_transfer/slave
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.07}}<!--
* driver_examples/lpi2c/edma_b2b_transfer/master
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
* driver_examples/lpi2c/interrupt_b2b_transfer/slave
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
* driver_examples/lpi2c/interrupt_b2b_transfer/master
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
* driver_examples/lpi2c/polling_b2b_transfer/slave
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
* driver_examples/lpi2c/polling_b2b_transfer/master
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
* driver_examples/lpi2c/read_accel_value_transfer
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
* driver_examples/lpit
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
* driver_examples/lpuart/edma_transfer
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
* driver_examples/lpuart/interrupt_rb_transfer
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.11.1_v10}} <!--
* driver_examples/lpuart/polling
-->{{#vardefine:RELEASE_DATE|5/26/2022}} <!--
* driver_examples/lpuart/interrupt_transfer
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
* driver_examples/rgpio/led_output
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
* driver_examples/sema42/uboot
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
* driver_examples/tpm/input_capture
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
* driver_examples/tpm/dual_edge_capture
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
* driver_examples/tpm/timer
-->{{#vardefine:SDK_SUPPORT_CAN|yes}}<!--
* driver_examples/tpm/simple_pwm
-->{{#vardefine:YOCTO_RELEASE_TAG|hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2}}<!--
* driver_examples/tpm/output_compare
-->{{#vardefine:BOARD_SDK|dart_mx8mp}}<!--
* driver_examples/tstmr
--><section end=MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS/><!--
* driver_examples/wdog32
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
* mmcau_examples/mmcau_api
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
* multicore_examples/rpmsg_lite_str_echo_rtos
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
* rtos_examples/freertos_hello
*SDK_PATH = '''{{#var:SDK_PATH}}'''
* rtos_examples/freertos_queue
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
* rtos_examples/freertos_sem
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
* rtos_examples/freertos_generic
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
* rtos_examples/freertos_tickless
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
* rtos_examples/freertos_mutex
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
* rtos_examples/freertos_event
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
* rtos_examples/freertos_swtimer
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
Additional demos are available as reference code, but require HW/SW customization.<!--
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
* demo_apps/power_mode_switch
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
* driver_examples/canfd/loopback_transfer
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
* driver_examples/canfd/loopback
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
* driver_examples/canfd/interrupt_transfer
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
* driver_examples/enet/txrx_multiring_transfer
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
* driver_examples/enet/txrx_transfer
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
* driver_examples/enet/txrx_ptp1588_transfer
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
* driver_examples/flexcan/loopback_edma_transfer
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''
* driver_examples/flexcan/loopback_transfer
 
* driver_examples/flexcan/loopback
=== mcuxpresso-2.12.1-mx8mp-v1.0 ===
* driver_examples/flexcan/interrupt_transfer
<section begin=MCUXPRESSO_2.12.1_V1.0_DART-MX8M-PLUS/><!--
* driver_examples/ftm/pwm_twochannel
-->{{#vardefine:OS|FreeRTOS}}<!--
* driver_examples/ftm/combine_pwm
-->{{#vardefine:HARDWARE_NAME|DART-MX8M-PLUS}}<!--
* driver_examples/ftm/input_capture
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.12.1-mx8mp-v1.0}}<!--
* driver_examples/ftm/dual_edge_capture
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.12.1_V1.0_DART-MX8M-PLUS}}<!--
* driver_examples/ftm/timer
-->{{#vardefine:MCUXPRESSO_VERSION|2.12.1}}<!--
* driver_examples/ftm/simple_pwm
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
* driver_examples/ftm/output_compare
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
* driver_examples/gpio/led_output
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.12.x-var01}}<!--
* driver_examples/lpadc/interrupt
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
* driver_examples/lpadc/polling
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2}}<!--
* lwip_examples/lwip_ping/bm
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-10.3-2021.10}}<!--
* lwip_examples/lwip_ping/freertos
-->{{#vardefine:BOARD_FOLDER|boards/dart_mx8mp}}<!--
* lwip_examples/lwip_iperf/bm
-->{{#vardefine:BOARD_FOLDER1|boards/som_mx8mp}}<!--
* lwip_examples/lwip_httpsrv/bm
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
* lwip_examples/lwip_httpsrv/freertos
-->{{#vardefine:PINS_SECTION|DART-MX8M-PLUS_PINS_SECTION}}<!--
* lwip_examples/lwip_tcpecho/bm
-->{{#vardefine:DEMOS_SECTION|DART-MX8M-PLUS_DEMOS_SECTION}}<!--
* lwip_examples/lwip_tcpecho/freertos
-->{{#vardefine:DTBS_SECTION|DART-MX8M-PLUS_DTBS_SECTION}}<!--
* lwip_examples/lwip_udpecho/bm
-->{{#vardefine:MEMORY_TYPES_SECTION|DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION}}<!--
* lwip_examples/lwip_udpecho/freertos
-->{{#vardefine:JTAG_SECTION|DART-MX8M-PLUS_JTAG_SECTION}}<!--
* lwip_examples/lwip_dhcp/bm
-->{{#vardefine:SDK_GIT_TAG|dart-mx8mp_mcuxpresso-2.12.1_v10}} <!--
* lwip_examples/lwip_dhcp/freertos
-->{{#vardefine:RELEASE_DATE|11/02/2022}} <!--
--><!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
--><section end=VAR-SOM-MX8X_DEMOS_SECTION/>
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.4 and higher}} <!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|EVK-MIMX8MP}}<!--
-->{{#vardefine:SOM_CAN_SUPPORT_1GB_DDR|yes}}<!--
-->{{#vardefine:SDK_SUPPORT_CAN|yes}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|mx8mp-yocto-kirkstone-5.15-2.0.x-v1.0}}<!--
-->{{#vardefine:BOARD_SDK|dart_mx8mp}}<!--
--><section end=MCUXPRESSO_2.12.1_V1.0_DART-MX8M-PLUS/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}'''
*SOM_CAN_SUPPORT_1GB_DDR = '''{{#var:SOM_CAN_SUPPORT_1GB_DDR}}'''
 
= VAR-SOM-MX8X =
 
== Sections ==


=== NXP Memory types ===
=== Available dtbs ===
<section begin=VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION/><!--
<section begin=VAR-SOM-MX8X_DTBS_SECTION/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.


Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.


{| class="wikitable"
{| class="wikitable"
|-
|-
! scope="col" | memory type
! scope="col" | File Name<br/>
! scope="col" | M4 memory area
! scope="col" | Description<br/>
! scope="col" | A35 memory area
! scope="col" | memory lentgh
! scope="col" | linker file
|-
|-
| DDR
| style="padding: 5px;"| imx8qxp-var-som-symphony-sd-'''m4'''.dtb
| 0x88000000-0x881FFFFF (code)<br>0x88200000-0x883FFFFF (data)<br>0x88400000-0x8FFFFFFF (data2)
| style="padding: 5px;"| VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
| 0x88000000-0x881FFFFF (code)<br>0x88200000-0x883FFFFF (data)<br>0x88400000-0x8FFFFFFF (data2)
| 128MB (DDR)
| MIMX8QX6xxxFZ_cm4_ddr_ram.ld
|-
|-
| TCM
| style="padding: 5px;"| imx8qxp-var-som-symphony-'''m4'''.dtb
| 0x1FFE0000-0x1FFFFFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x88000000-0x8FFFFFFF (data2)
| style="padding: 5px;"| VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
| 0x34FE0000-0x34FFFFFF (code)<br>0x35000000-0x3501FFFF (data)<br>0x88000000-0x8FFFFFFF (data2)
| 256kB (TCM) + 128MB (DDR)
| MIMX8QX6xxxFZ_cm4_ram.ld
|-
|-
|}
|}
<section end=VAR-SOM-MX8X_DTBS_SECTION/>


All linker files are locate in the '''armgcc''' folder of each demo.
=== Default M4 pins ===
 
<section begin=VAR-SOM-MX8X_PINS_SECTION/><!--
After launching the build_all.sh command the following folder will be created in the armgcc folder
-->Default M4 pins used by the demos are:
 
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
 
Further details about memory mapping are available in [https://www.nxp.com/webapp/Download?colCode=IMX8DQXPRM i.MX 8DualXPlus/8QuadXPlus Applications Processor Reference Manual] paragraphs:
 
* 2.2 System Memory Map
* 2.2.9 Cortex-M4 Memory Map<!--
--><section end=VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION/>
 
=== JTAG ===
<section begin=VAR-SOM-MX8X_JTAG_SECTION/><!--
-->The VAR-SOM-MX8X exposes JTAG interface via an optional 10-pin header
 
Here is the pinout:


{| class="wikitable"
{| class="wikitable"
|-
|-
! scope="col" | pin
! scope="col" | Function
! scope="col" | signal
! scope="col" | Pin
! scope="col" | description
|-
! scope="col" | pin
| debug UART (UART2)
! scope="col" | signal (ball)
| RX: J18.5 / TX: J18.3
! scope="col" | description
|-
|-
| '''1'''
| I2C (I2C3)
| JTAG_VREF
| SCL: J16.10 / SDA: J16.12
| JTAG reference voltage (3.3V)
| '''2'''
| JTAG_TMS (AG35)
| JTAG Mode Select
|-
|-
| '''3'''
| M4 GPIO (M40_GPIO0_IO00)
| GND
| J16.3
| Digital Ground
| '''4'''
| JTAG_TCK (AE31)
| JTAG Clock
|-
|-
| '''5'''
| M4 PWM (M40_TPM0_CH0)
| GND
| J16.7
| Digital Ground
| '''6'''
| JTAG_TDO (AF32)
| JTAG Data Out
|-
|-
| '''7'''
<!--
| RTCK
| CAN (CAN1)
| JTAG Return clock
| RX: J18.9 / TX: J18.7
| '''8'''
| JTAG_TDI (AH34)
| JTAG Data In
|-
|-
| '''9'''
-->
| JTAG_TRST_B_CONN
|}<!--
| JTAG TAP reset
--><section end=VAR-SOM-MX8X_PINS_SECTION/>
| '''10'''
| JTAG_SRST_B
| JTAG System reset
|-
|}


Please refer to SOM datasheet for further details.
=== Available Demos ===
 
<section begin=VAR-SOM-MX8X_DEMOS_SECTION/><!--
<!--
-->* cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
--><section end=VAR-SOM-MX8X_JTAG_SECTION/>
* cmsis_driver_examples/lpi2c/int_b2b_transfer/master
 
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
== Releases ==
* cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
 
* cmsis_driver_examples/lpuart/edma_transfer
=== mcuxpresso-2.5.2-mx8qx-v1.0 ===
* cmsis_driver_examples/lpuart/interrupt_transfer
<section begin=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X/><!--
* demo_apps/hello_world
-->{{#vardefine:OS|FreeRTOS}}<!--
* driver_examples/edma/scatter_gather
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
* driver_examples/edma/memory_to_memory
-->{{#vardefine:SOC_HAS_SCU|true}}<!--
* driver_examples/intmux
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.5.2-mx8qx-v1.0}}<!--
* driver_examples/lpi2c/edma_b2b_transfer/slave
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X}}<!--
* driver_examples/lpi2c/edma_b2b_transfer/master
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
* driver_examples/lpi2c/interrupt_b2b_transfer/slave
-->{{#vardefine:MCUXPRESSO_VERSION|2.5.2}}<!--
* driver_examples/lpi2c/interrupt_b2b_transfer/master
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
* driver_examples/lpi2c/polling_b2b_transfer/slave
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
* driver_examples/lpi2c/polling_b2b_transfer/master
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.5.x-var01}}<!--
* driver_examples/lpi2c/read_accel_value_transfer
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
* driver_examples/lpit
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
* driver_examples/lpuart/edma_transfer
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-7-2018-q2-update}}<!--
* driver_examples/lpuart/interrupt_rb_transfer
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
* driver_examples/lpuart/polling
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
* driver_examples/lpuart/interrupt_transfer
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
* driver_examples/rgpio/led_output
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
* driver_examples/sema42/uboot
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
* driver_examples/tpm/input_capture
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
* driver_examples/tpm/dual_edge_capture
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
* driver_examples/tpm/timer
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for i.MX 8QuadXPlus.pdf}}<!--
* driver_examples/tpm/simple_pwm
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
* driver_examples/tpm/output_compare
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
* driver_examples/tstmr
-->{{#vardefine:SCFW_PATCH_URL|ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW}} <!--
* driver_examples/wdog32
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
* mmcau_examples/mmcau_api
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.5.2_v10}} <!--
* multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
-->{{#vardefine:RELEASE_DATE|2/10/2020}} <!--
* multicore_examples/rpmsg_lite_str_echo_rtos
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
* rtos_examples/freertos_hello
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
* rtos_examples/freertos_queue
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
* rtos_examples/freertos_sem
--><section end=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X/><!--
* rtos_examples/freertos_generic
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
* rtos_examples/freertos_tickless
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
* rtos_examples/freertos_mutex
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
* rtos_examples/freertos_event
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
* rtos_examples/freertos_swtimer
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
Additional demos are available as reference code, but require HW/SW customization.<!--
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
* demo_apps/power_mode_switch
*SDK_PATH = '''{{#var:SDK_PATH}}'''
* driver_examples/canfd/loopback_transfer
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
* driver_examples/canfd/loopback
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
* driver_examples/canfd/interrupt_transfer
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
* driver_examples/enet/txrx_multiring_transfer
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
* driver_examples/enet/txrx_transfer
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
* driver_examples/enet/txrx_ptp1588_transfer
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
* driver_examples/flexcan/loopback_edma_transfer
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
* driver_examples/flexcan/loopback_transfer
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
* driver_examples/flexcan/loopback
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
* driver_examples/flexcan/interrupt_transfer
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
* driver_examples/ftm/pwm_twochannel
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
* driver_examples/ftm/combine_pwm
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
* driver_examples/ftm/input_capture
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
* driver_examples/ftm/dual_edge_capture
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
* driver_examples/ftm/timer
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
* driver_examples/ftm/simple_pwm
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
* driver_examples/ftm/output_compare
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
* driver_examples/gpio/led_output
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
* driver_examples/lpadc/interrupt
* driver_examples/lpadc/polling
* lwip_examples/lwip_ping/bm
* lwip_examples/lwip_ping/freertos
* lwip_examples/lwip_iperf/bm
* lwip_examples/lwip_httpsrv/bm
* lwip_examples/lwip_httpsrv/freertos
* lwip_examples/lwip_tcpecho/bm
* lwip_examples/lwip_tcpecho/freertos
* lwip_examples/lwip_udpecho/bm
* lwip_examples/lwip_udpecho/freertos
* lwip_examples/lwip_dhcp/bm
* lwip_examples/lwip_dhcp/freertos
--><!--
--><section end=VAR-SOM-MX8X_DEMOS_SECTION/>
 
=== NXP Memory types ===
<section begin=VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION/><!--
-->The SDK allow linking using 2 different memory types: DDR, TCM.
 
Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.


=== mcuxpresso-2.8.0-mx8qx-v1.0 ===
{| class="wikitable"
<section begin=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X/><!--
|-
-->{{#vardefine:OS|FreeRTOS}}<!--
! scope="col" | memory type
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
! scope="col" | M4 memory area
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.8.0-mx8qx-v1.0}}<!--
! scope="col" | A35 memory area
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X}}<!--
! scope="col" | memory lentgh
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
! scope="col" | linker file
-->{{#vardefine:MCUXPRESSO_VERSION|2.8.0}}<!--
|-
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
| DDR
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
| 0x88000000-0x881FFFFF (code)<br>0x88200000-0x883FFFFF (data)<br>0x88400000-0x8FFFFFFF (data2)
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.8.x-var01}}<!--
| 0x88000000-0x881FFFFF (code)<br>0x88200000-0x883FFFFF (data)<br>0x88400000-0x8FFFFFFF (data2)
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
| 128MB (DDR)
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
| MIMX8QX6xxxFZ_cm4_ddr_ram.ld
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
|-
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
| TCM
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
| 0x1FFE0000-0x1FFFFFFF (code)<br>0x20000000-0x2001FFFF (data)<br>0x88000000-0x8FFFFFFF (data2)
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
| 0x34FE0000-0x34FFFFFF (code)<br>0x35000000-0x3501FFFF (data)<br>0x88000000-0x8FFFFFFF (data2)
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
| 256kB (TCM) + 128MB (DDR)
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
| MIMX8QX6xxxFZ_cm4_ram.ld
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
|-
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
|}
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf}}<!--
 
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
All linker files are locate in the '''armgcc''' folder of each demo.
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
-->{{#vardefine:SCFW_PATCH_URL|ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW}} <!--
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.8.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|02/18/2021}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8x-v1.0}}<!--
--><section end=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}


=== mcuxpresso-2.9.0-mx8qx-v1.0 ===
After launching the build_all.sh command the following folder will be created in the armgcc folder
<section begin=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X/><!--
 
-->{{#vardefine:OS|FreeRTOS}}<!--
* '''ddr_debug''': containing DDR binaries compiled in debug mode (not stripped: symbols available)
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
* '''ddr_release''': containing DDR binaries compiled in release mode (stripped: no symbols available)
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8qx-v1.0}}<!--
* '''debug''': containing TCM binaries compiled in debug mode (not stripped: symbols available)
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X}}<!--
* '''release''': containing TCM binaries compiled in release mode (stripped: no symbols available)
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
 
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
Further details about memory mapping are available in [https://www.nxp.com/webapp/Download?colCode=IMX8DQXPRM i.MX 8DualXPlus/8QuadXPlus Applications Processor Reference Manual] paragraphs:
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
 
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
* 2.2 System Memory Map
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
* 2.2.9 Cortex-M4 Memory Map<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
--><section end=VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION/>
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
 
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
=== JTAG ===
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
<section begin=VAR-SOM-MX8X_JTAG_SECTION/><!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->The VAR-SOM-MX8X exposes JTAG interface via an optional 10-pin header
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
 
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
Here is the pinout:
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
 
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
{| class="wikitable"
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
|-
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf}}<!--
! scope="col" | pin
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
! scope="col" | signal
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
! scope="col" | description
-->{{#vardefine:SCFW_PATCH_URL|ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW}} <!--
! scope="col" | pin
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
! scope="col" | signal (ball)
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
! scope="col" | description
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.9.0_v10}}<!--
|-
-->{{#vardefine:RELEASE_DATE|03/04/2021}}<!--
| '''1'''
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
| JTAG_VREF
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
| JTAG reference voltage (3.3V)
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8x-v1.0}}<!--
| '''2'''
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-i.MX8QX-deactivated-the-LMEM-caches-to-debug-in-exte.patch}}<!--
| JTAG_TMS (AG35)
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X/><!--
| JTAG Mode Select
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
|-
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
| '''3'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
| GND
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
| Digital Ground
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
| '''4'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
| JTAG_TCK (AE31)
*SDK_PATH = '''{{#var:SDK_PATH}}'''
| JTAG Clock
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
|-
| '''5'''
| GND
| Digital Ground
| '''6'''
| JTAG_TDO (AF32)
| JTAG Data Out
|-
| '''7'''
| RTCK
| JTAG Return clock
| '''8'''
| JTAG_TDI (AH34)
| JTAG Data In
|-
| '''9'''
| JTAG_TRST_B_CONN
| JTAG TAP reset
| '''10'''
| JTAG_SRST_B
| JTAG System reset
|-
|}
 
Please refer to SOM datasheet for further details.
 
<!--
--><section end=VAR-SOM-MX8X_JTAG_SECTION/>
 
== Releases ==
 
=== mcuxpresso-2.5.2-mx8qx-v1.0 ===
<section begin=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
-->{{#vardefine:SOC_HAS_SCU|true}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.5.2-mx8qx-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X}}<!--
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.5.2}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.5.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-7-2018-q2-update}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for i.MX 8QuadXPlus.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
-->{{#vardefine:SCFW_PATCH_URL|ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW}} <!--
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.5.2_v10}} <!--
-->{{#vardefine:RELEASE_DATE|2/10/2020}} <!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
--><section end=MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
 
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
=== mcuxpresso-2.8.0-mx8qx-v1.0 ===
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
<section begin=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X/><!--
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
-->{{#vardefine:OS|FreeRTOS}}<!--
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
 
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.8.0-mx8qx-v1.0}}<!--
= VAR-SOM-MX8 =
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X}}<!--
 
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
== Sections ==
-->{{#vardefine:MCUXPRESSO_VERSION|2.8.0}}<!--
 
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
=== Available dtbs ===
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
<section begin=VAR-SOM-MX8_DTBS_SECTION/><!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.8.x-var01}}<!--
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
 
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
 
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
{| class="wikitable"
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
-->{{#vardefine:SCFW_PATCH_URL|ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW}} <!--
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.8.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|02/18/2021}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8x-v1.0}}<!--
--><section end=MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}
 
=== mcuxpresso-2.9.0-mx8qx-v1.0 ===
<section begin=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X/><!--
-->{{#vardefine:OS|FreeRTOS}}<!--
-->{{#vardefine:HARDWARE_NAME|VAR-SOM-MX8X}}<!--
-->{{#vardefine:RELEASE_NAME|mcuxpresso-2.9.0-mx8qx-v1.0}}<!--
-->{{#vardefine:RELEASE_LINK|MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X}}<!--
-->{{#vardefine:YOCTO_RELEASE_LINK|RELEASE_SUMO_V1.2_VAR-SOM-MX8X}}<!--
-->{{#vardefine:MCUXPRESSO_VERSION|2.9.0}}<!--
-->{{#vardefine:SDK_PATH|~/var-mcuxpresso}}<!--
-->{{#vardefine:SDK_GIT_URL|https://github.com/varigit/freertos-variscite}}<!--
-->{{#vardefine:SDK_GIT_BRANCH|mcuxpresso_sdk_2.9.x-var01}}<!--
-->{{#vardefine:TOOLCHAIN_URL|https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_BZ2_NAME|gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2}}<!--
-->{{#vardefine:TOOLCHAIN_FOLDER|gcc-arm-none-eabi-9-2020-q2-update}}<!--
-->{{#vardefine:BOARD_FOLDER|boards/som_mx8qx}}<!--
-->{{#vardefine:DOCS_FOLDER|docs}}<!--
-->{{#vardefine:PINS_SECTION|VAR-SOM-MX8X_PINS_SECTION}}<!--
-->{{#vardefine:DEMOS_SECTION|VAR-SOM-MX8X_DEMOS_SECTION}}<!--
-->{{#vardefine:DTBS_SECTION|VAR-SOM-MX8X_DTBS_SECTION}}<!--
-->{{#vardefine:MEMORY_TYPES_SECTION|VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION}}<!--
-->{{#vardefine:JTAG_SECTION|VAR-SOM-MX8X_JTAG_SECTION}}<!--
-->{{#vardefine:NXP_USER_GUIDE|Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf}}<!--
-->{{#vardefine:NXP_REFERENCE_KIT|IMX8QXP-MEK}}<!--
-->{{#vardefine:SCFW_SOC|mx8qx_b0}} <!--
-->{{#vardefine:SCFW_PATCH_URL|ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW}} <!--
-->{{#vardefine:SCFW_M4_PATCH|0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff}} <!--
-->{{#vardefine:IMX_MKIMAGE_SOC|iMX8QX}} <!--
-->{{#vardefine:SDK_GIT_TAG|som-mx8qx_mcuxpresso-2.9.0_v10}}<!--
-->{{#vardefine:RELEASE_DATE|03/04/2021}}<!--
-->{{#vardefine:SUPPORTED_REV_SOM|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8x-v1.0}}<!--
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0001-i.MX8QX-deactivated-the-LMEM-caches-to-debug-in-exte.patch}}<!--
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
*SOC_HAS_SCU = '''{{#var:SOC_HAS_SCU}}'''
*RELEASE_NAME = '''{{#var:RELEASE_NAME}}'''
*RELEASE_LINK = '''{{#var:RELEASE_LINK}}'''
*YOCTO_RELEASE_LINK = '''{{#var:YOCTO_RELEASE_LINK}}'''
*MCUXPRESSO_VERSION = '''{{#var:MCUXPRESSO_VERSION}}'''
*SDK_PATH = '''{{#var:SDK_PATH}}'''
*SDK_GIT_URL = '''{{#var:SDK_GIT_URL}}'''
*SDK_GIT_BRANCH = '''{{#var:SDK_GIT_BRANCH}}'''
*TOOLCHAIN_URL = '''{{#var:TOOLCHAIN_URL}}'''
*TOOLCHAIN_BZ2_NAME = '''{{#var:TOOLCHAIN_BZ2_NAME}}'''
*TOOLCHAIN_FOLDER = '''{{#var:TOOLCHAIN_FOLDER}}'''
*BOARD_FOLDER = '''{{#var:BOARD_FOLDER}}'''
*DOCS_FOLDER = '''{{#var:DOCS_FOLDER}}'''
*PINS_SECTION = '''{{#var:PINS_SECTION}}'''
*DEMOS_SECTION = '''{{#var:DEMOS_SECTION}}'''
*DTBS_SECTION = '''{{#var:DTBS_SECTION}}'''
*MEMORY_TYPES_SECTION = '''{{#var:MEMORY_TYPES_SECTION}}'''
*JTAG_SECTION = '''{{#var:JTAG_SECTION}}'''
*NXP_USER_GUIDE = '''{{#var:NXP_USER_GUIDE}}'''
*NXP_REFERENCE_KIT = '''{{#var:NXP_REFERENCE_KIT}}'''
*SCFW_SOC = = '''{{#var:SCFW_SOC}}
*SCFW_PATCH_URL = = '''{{#var:SCFW_PATCH_URL}}
*SCFW_M4_PATCH = = '''{{#var:SCFW_M4_PATCH}}
*IMX_MKIMAGE_SOC = = '''{{#var:IMX_MKIMAGE_SOC}}
*SDK_GIT_TAG = '''{{#var:SDK_GIT_TAG}}
*RELEASE_DATE = '''{{#var:RELEASE_DATE}}
*SUPPORTED_REV_SOM = '''{{#var:SUPPORTED_REV_SOM}}
*SUPPORTED_REV_CARRIER = '''{{#var:SUPPORTED_REV_CARRIER}}
*YOCTO_RELEASE_TAG = '''{{#var:YOCTO_RELEASE_TAG}}
 
= VAR-SOM-MX8 =
 
== Sections ==
 
=== Available dtbs ===
<section begin=VAR-SOM-MX8_DTBS_SECTION/><!--
-->To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing '''m4''' label in the name, using the fdt_file environment variable in U-Boot.
 
This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.<br>
 
{| class="wikitable"
|-
! scope="col" | File Name<br/>
! scope="col" | Description<br/>
|-
| style="padding: 5px;"| imx8qm-var-som-symphony-dp-'''m4'''.dtb
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
|-
| style="padding: 5px;"| imx8qm-var-som-symphony-hdmi-'''m4'''.dtb
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
|-
| style="padding: 5px;"| imx8qm-var-som-symphony-lvds-'''m4'''.dtb
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
|-
| style="padding: 5px;"| imx8qm-var-spear-sp8customboard-dp-'''m4'''.dtb
| style="padding: 5px;"| DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
|-
| style="padding: 5px;"| imx8qm-var-spear-sp8customboard-hdmi-'''m4'''.dtb
| style="padding: 5px;"| DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
|-
|-
! scope="col" | File Name<br/>
| style="padding: 5px;"| imx8qm-var-spear-sp8customboard-lvds.'''m4'''.dtb
! scope="col" | Description<br/>
| style="padding: 5px;"| DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
|-
|-
| style="padding: 5px;"| imx8qm-var-som-lvds-'''m4'''.dtb
| style="padding: 5px;"| imx8qm-var-som-dp-'''m4'''.dtb
| style="padding: 5px;"| VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
|-
|-
| style="padding: 5px;"| imx8qm-var-som-hdmi-'''m4'''.dtb
| style="padding: 5px;"| imx8qm-var-som-hdmi-'''m4'''.dtb
| style="padding: 5px;"| VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
|-
|-
| style="padding: 5px;"| imx8qm-var-som-lvds-'''m4'''.dtb
| style="padding: 5px;"| imx8qm-var-som-lvds-'''m4'''.dtb
| style="padding: 5px;"| VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
| style="padding: 5px;"| DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
|-
|-
| style="padding: 5px;"| imx8qm-var-spear-dp-'''m4'''.dtb
| style="padding: 5px;"| imx8qm-var-spear-dp-'''m4'''.dtb
| style="padding: 5px;"| VAR-SPEAR-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
| style="padding: 5px;"| DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
|-
|-
| style="padding: 5px;"| imx8qm-var-spear-hdmi-'''m4'''.dtb
| style="padding: 5px;"| imx8qm-var-spear-hdmi-'''m4'''.dtb
| style="padding: 5px;"| VAR-SPEAR-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
| style="padding: 5px;"| DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
|-
|-
| style="padding: 5px;"| imx8qm-var-spear-lvds-'''m4'''.dtb
| style="padding: 5px;"| imx8qm-var-spear-lvds-'''m4'''.dtb
| style="padding: 5px;"| VAR-SPEAR-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
| style="padding: 5px;"| DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
|-
|-
|}
|}
Line 2,310: Line 2,695:
{| class="wikitable"
{| class="wikitable"
|-
|-
! scope="col" | function
! scope="col" | Function
! scope="col" | SoC balls
! scope="col" | SoC balls
! scope="col" | VAR-SOM-MX8 pins
! scope="col" | VAR-SOM-MX8 pins
Line 2,316: Line 2,701:
! scope="col" | SPEAR-MX8 pins
! scope="col" | SPEAR-MX8 pins
! scope="col" | SP8CustomBoard pins
! scope="col" | SP8CustomBoard pins
! scope="col" | notes
! scope="col" | Notes
|-
|-
| M40_UART0 RX / TX
| M40_UART0 RX / TX
Line 2,846: Line 3,231:
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:SUPPORTED_REV_CARRIER|v1.1 and higher}} <!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8-v1.1}}<!--
-->{{#vardefine:YOCTO_RELEASE_TAG|dunfell-fslc-5.4-2.1.x-mx8-v1.1}}<!--
-->{{#vardefine:DEACTIVATE_LMEM_CACHE_PATCH|0002-i.MX8QM-CM40-deactivated-the-LMEM-caches-to-debug-in.patch}}<!--
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8/><!--
--><section end=MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8/><!--
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''
-->*HARDWARE_NAME = '''{{#var:HARDWARE_NAME}}'''

Revision as of 16:59, 5 December 2022


DART-MX8M

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, by selecting the right version with the symbolic link in the /boot folder of the booting media.
These device trees contain m4 label in their name.


The below table lists an example dtb blob file name for DART-MX8M (on DT8MCustomBoard rev. 1.3 and higher) with support for M4 (and SD card and LVDS), for each kernel version / Yocto release:

File Name
Description
imx8mq-var-dart-dt8mcustomboard-m4-sd-lvds.dtb For kernel >= 5.4.85 (Yocto >= Dunfell)
imx8mq-var-dart-m4-sd-lvds.dtb For kernel = 5.4.24 (Yocto Zeus)
fsl-imx8mq-var-dart-m4-sd-lvds.dtb For kernel = 4.19.35 (Yocto Warrior)
Image.gz-fsl-imx8mq-var-dart-m4-sd-lvds.dtb For kernel = 4.14.98 (Yocto Sumo)

For the full list of device tree blob files, refer to the "Build Results" section in the appropriate wiki page for the specific Yocto/Debian release you are using.

Default M4 pins

Default M4 pins used by the demos are:

Function Pin
debug UART (UART2) RX: J12.6 / TX: J12.4
GPIO (GPIO4_IO03) LED7 for DT8CustomBoard 1.x
U43.2 / R228 for DT8CustomBoard >= 2.0 (Use Oscilloscope to observe output signal)
I2C (I2C3) SCL: J12.18 / SDA: J12.20
PWM (PWM2) J14.3

Available Demos

  • driver_examples/i2c/interrupt_b2b_transfer/slave
  • driver_examples/i2c/interrupt_b2b_transfer/master
  • driver_examples/i2c/polling_b2b_transfer/slave
  • driver_examples/i2c/polling_b2b_transfer/master
  • driver_examples/wdog
  • driver_examples/gpio/led_output (only for 1.x DT8CustomBoard)
  • driver_examples/tmu/tmu_monitor_report
  • driver_examples/pwm
  • driver_examples/uart/auto_baudrate_detect
  • driver_examples/uart/interrupt
  • driver_examples/uart/interrupt_rb_transfer
  • driver_examples/uart/polling
  • driver_examples/uart/interrupt_transfer
  • driver_examples/gpt/timer
  • driver_examples/gpt/capture
  • driver_examples/ecspi/ecspi_loopback
  • driver_examples/qspi/polling_transfer
  • driver_examples/rdc
  • driver_examples/sema4/uboot
  • rtos_examples/freertos_ecspi/ecspi_loopback
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_uart
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer
  • rtos_examples/freertos_i2c
  • cmsis_driver_examples/i2c/int_b2b_transfer/slave
  • cmsis_driver_examples/i2c/int_b2b_transfer/master
  • cmsis_driver_examples/uart/interrupt_transfer
  • cmsis_driver_examples/ecspi/int_loopback_transfer
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • demo_apps/hello_world

NXP Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type M4 memory area A53 memory area memory lentgh linker file
DDR 0x80000000-0x801FFFFF (code)
0x80200000-0x803FFFFF (data)
0x80400000-0x80FFFFFF (data2)
0x80000000-0x801FFFFF (code)
0x80200000-0x803FFFFF (data)
0x80400000-0x80FFFFFF (data2)
16MB (DDR) MIMX8MQ6xxxJZ_cm4_ddr_ram.ld
TCM 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x80000000-0x80FFFFFF (data2)
0x007E0000-0x007FFFFF (code)
0x00800000-0x0081FFFF (data)
0x80000000-0x80FFFFFF (data2)
256kB (TCM) + 16MB (DDR) MIMX8MQ6xxxJZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must much the one declared in the kernel device tree: at least 2 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x80000000 - 0x80FFFFFF.

The RPMSG area is located at 0xB8000000: at least 3 GB of RAM is required on the SoM to allow Cortex-M4 accessing the RPMSG area. After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in i.MX 8M Applications Processors Reference Manual paragraphs:

  • 2.1.2 Cortex-A53 Memory Map
  • 2.1.3 Cortex-M4 Memory Map

Variscite Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type M4 memory area A53 memory area memory lentgh linker file
DDR 0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
16MB (DDR) MIMX8MQ6xxxJZ_cm4_ddr_ram.ld
TCM 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
0x007E0000-0x007FFFFF (code)
0x00800000-0x0081FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
256kB (TCM) + 16MB (DDR) MIMX8MQ6xxxJZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M4 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M4.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M4 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in i.MX 8M Applications Processors Reference Manual paragraphs:

  • 2.1.2 Cortex-A53 Memory Map
  • 2.1.3 Cortex-M4 Memory Map

JTAG

The VAR-DT8MCustomBoard exports the DART-MX8M JTAG signals through J29, a standard 1.27" 10 pin header.

Here is the pinout:

pin signal description pin signal description
1 JTAG_VREF JTAG IO reference voltage,
connects to SOM_NVCC_3V3.
2 JTAG_TMS JTAG Mode Select signal
3 GND Digital Ground 4 JTAG_TCK JTAG Clock signal,
requires 10K pull down.
5 GND Digital Ground 6 JTAG_TDO JTAG Data Out signal
7 GND Digital Ground 8 JTAG_TDI JTAG Data In signal
9 JTAG_NTRST_C JTAG Reset signal 10 NRST_CON Programmer Reset,
used to put the SOC in reset state.

Please refer to board schematics for further details.

Releases

mcuxpresso-2.5.1-mx8mq-v1.0

  • HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.5.1-mx8mq-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.5.1_V1.0_DART-MX8M
  • MCUXPRESSO_VERSION = 2.5.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_NXP_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK i.MX 8M Devices.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ

mcuxpresso-2.5.1-mx8mq-v1.1

   *HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.5.1-mx8mq-v1.1
  • RELEASE_LINK = MCUXPRESSO_2.5.1_V1.1_DART-MX8M
  • MCUXPRESSO_VERSION = 2.5.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK i.MX 8M Devices.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ

mcuxpresso-2.8.0-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.8.0-mx8mq-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_DART-MX8M
  • MCUXPRESSO_VERSION = 2.8.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ

mcuxpresso-2.9.0-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.9.0-mx8mq-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_DART-MX8M
  • MCUXPRESSO_VERSION = 2.9.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mq-v1.0

mcuxpresso-2.10.0-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.10.0-mx8mq-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_DART-MX8M
  • MCUXPRESSO_VERSION = 2.10.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mq-v1.3
  • DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8MQ-deactivated-the-LMEM-caches-to-debug-in-exter.patch
  • BOARD_SDK = dart_mx8mq

mcuxpresso-2.11.1-mx8mq-v1.0

 *HARDWARE_NAME = DART-MX8M
  • RELEASE_NAME = mcuxpresso-2.11.1-mx8mq-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_DART-MX8M
  • MCUXPRESSO_VERSION = 2.11.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
  • BOARD_FOLDER = boards/dart_mx8mq
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MQ.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MQ
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mq-v1.5
  • DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8MQ-deactivated-the-LMEM-caches-to-debug-in-exter.patch
  • BOARD_SDK = dart_mx8mq

DART-MX8M-MINI

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m4 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.

File Name
Description
imx8mm-var-dart-dt8mcustomboard-m4.dtb DART-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell)
imx8mm-var-dart-m4.dtb DART-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
fsl-imx8mm-var-dart-m4.dtb DART-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. > 1.0
imx8mm-var-som-symphony-m4.dtb VAR-SOM-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above
imx8mm-var-som-symphony-legacy-m4.dtb VAR-SOM-MX8M-MINI device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
imx8mm-var-som-m4.dtb VAR-SOM-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. > 1.0
imx8mm-var-som-rev10-m4.dtb VAR-SOM-MX8M-MINI device tree blob for kernel 5.4.3 (Yocto Zeus) on SOM rev. 1.0
fsl-imx8mm-var-som-m4.dtb VAR-SOM-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. > 1.0
fsl-imx8mm-var-som-rev10-m4.dtb VAR-SOM-MX8M-MINI device tree blob for in kernels < 5.4.3 on SOM rev. 1.0


Default M4 pins

Default M4 pins used by the demos are:

Function Pin
Debug UART (UART2) RX: J12.6 / TX: J12.4
GPIO (GPIO4_IO03) LED7
I2C (I2C4) SCL: J12.17 / SDA: J12.19
PWM (PWM2) J14.3

Default M4 pins v2

Default M4 pins used by the demos are:

Function SoC balls DART-MX8M-MINI pins DT8MCB pins VAR-SOM-MX8M-MINI pins Symphony pins Notes
UART3 RX/TX E18 / D18 J2.87 / J2.89 J12.11 / J12.13 J1.175 / J1.124 J18.5 / J18.3
GPIO4_IO03 AF15 J2.59 GPLED1 J1.84 J17.3
I2C4 SCL/SDA D13 / E13 J1.17 / J1.19 J12.17/ J12.19 J1.174 / J1.176 J16.10 / J16.12
PWM3 AF9 J3.36 J14.7 J1.69 J18.2
SPI1 CS0/SCK/SDI/SDO B6 / D6 / A7 / B7 J2.79 / J2.77 / J2.81 / J2.83 J16.4/ J16.2 / J16.8 / J16.6 J1.39 / J1.43 / J1.41 / J1.45 J16.4/ J16.2 / J16.6 / J16.8 Enabling it SPI devices will be no longer visible from Linux

Available Demos

  • driver_examples/i2c/interrupt_b2b_transfer/slave
  • driver_examples/i2c/interrupt_b2b_transfer/master
  • driver_examples/i2c/polling_b2b_transfer/slave
  • driver_examples/i2c/polling_b2b_transfer/master
  • driver_examples/wdog
  • driver_examples/sdma/scatter_gather
  • driver_examples/sdma/memory_to_memory
  • driver_examples/gpio/led_output (only for 1.x DT8CustomBoard)
  • driver_examples/pwm
  • driver_examples/uart/auto_baudrate_detect
  • driver_examples/uart/interrupt
  • driver_examples/uart/idle_detect_sdma_transfer
  • driver_examples/uart/interrupt_rb_transfer
  • driver_examples/uart/sdma_transfer
  • driver_examples/uart/polling
  • driver_examples/uart/interrupt_transfer
  • driver_examples/gpt/timer
  • driver_examples/gpt/capture
  • driver_examples/ecspi/ecspi_loopback
  • driver_examples/ecspi/interrupt_b2b_transfer/slave
  • driver_examples/ecspi/interrupt_b2b_transfer/master
  • driver_examples/ecspi/polling_b2b_transfer/slave
  • driver_examples/ecspi/polling_b2b_transfer/master
  • driver_examples/rdc
  • driver_examples/tmu_1/monitor_threshold
  • driver_examples/tmu_1/temperature_polling
  • driver_examples/sema4/uboot
  • rtos_examples/freertos_ecspi/ecspi_loopback
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_uart
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer
  • rtos_examples/freertos_i2c
  • cmsis_driver_examples/i2c/int_b2b_transfer/slave
  • cmsis_driver_examples/i2c/int_b2b_transfer/master
  • cmsis_driver_examples/uart/sdma_transfer
  • cmsis_driver_examples/uart/interrupt_transfer
  • cmsis_driver_examples/ecspi/int_loopback_transfer
  • cmsis_driver_examples/ecspi/sdma_loopback_transfer
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • demo_apps/hello_world

Variscite Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type M4 memory area A53 memory area memory lentgh linker file
DDR 0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
16MB (DDR) MIMX8MM6xxxxx_cm4_ddr_ram.ld
TCM 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
0x007E0000-0x007FFFFF (code)
0x00800000-0x0081FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
256kB (TCM) + 16MB (DDR) MIMX8MM6xxxxx_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M4 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M4 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M4.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M4 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in i.MX 8M-Mini Applications Processors Reference Manual paragraphs:

  • 2.1.2 Cortex-A53 Memory Map
  • 2.1.3 Cortex-M4 Memory Map

Releases

freertos-1.0.1-mx7-v1.0


mcuxpresso-2.5.0-mx8mm-v1.0

  • HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.5.0-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.5.0_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.5.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
  • BOARD_FOLDER = boards/dart_mx8mm
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for i.MX 8M Mini.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM

mcuxpresso-2.5.0-mx8mm-v1.1

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.5.0-mx8mm-v1.1
  • RELEASE_LINK = MCUXPRESSO_2.5.0_V1.1_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.5.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
  • BOARD_FOLDER = boards/dart_mx8mm
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for i.MX 8M Mini.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM

mcuxpresso-2.8.0-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.8.0-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.8.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/dart_mx8mm
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM

mcuxpresso-2.9.0-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.9.0-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.9.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/dart_mx8mm
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mm-v1.1

mcuxpresso-2.10.0-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.10.0-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.10.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
  • BOARD_FOLDER = boards/dart_mx8mm
  • DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM
  • YOCTO_RELEASE_TAG = hardknott-fslc-5.4-2.3.x-mx8mm-v1.1

mcuxpresso-2.11.1-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.11.1-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.11.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
  • BOARD_FOLDER = boards/dart_mx8mm
  • DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM
  • YOCTO_RELEASE_TAG = hardknott-fslc-5.4-2.3.x-mx8mm-v1.4

mcuxpresso-2.12.1-mx8mm-v1.0

   *HARDWARE_NAME = DART-MX8M-MINI
  • RELEASE_NAME = mcuxpresso-2.12.1-mx8mm-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.12.1_V1.0_DART-MX8M-MINI
  • MCUXPRESSO_VERSION = 2.12.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.12.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.10
  • BOARD_FOLDER = boards/dart_mx8mm
  • DEACTIVATE_LMEM_CACHE_PATCH = 0001-iMX8M-MINI-deactivated-the-LMEM-caches-to-debug-in-e.patch
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-MINI_PINS_SECTION_V2
  • DEMOS_SECTION = DART-MX8M-MINI_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-MINI_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-MINI_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MM.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MM
  • YOCTO_RELEASE_TAG = mx8mm-yocto-kirkstone-5.15-2.0.x-v1.0

VAR-SOM-MX8M-NANO

Sections

Available dtbs

To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m7 label in the name, using the fdt_file environment variable in U-Boot.

File Name
Description
imx8mn-var-som-symphony-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4a and above
imx8mn-var-som-symphony-legacy-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel >= 5.4.74 (Yocto Dunfell) on Symphony-Board 1.4 and below
imx8mn-var-som-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev > 1.0
imx8mn-var-som-rev10-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel 5.4.3 - 5.4.24 (Yocto Zeus) on som rev 1.0
fsl-imx8mn-var-som-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev > 1.0
fsl-imx8mn-var-som-rev10-m7.dtb VAR-SOM-MX8M-NANO device tree blob for kernel < 5.4.3 on som rev 1.0

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.

Default M7 pins

Default M7 pins used by the demos are:

Function SoC balls VAR-SOM-MX8M-NANO pins Symphony pins Notes
UART3 RX/TX E18 / D18 J1.175 / J1.124 J18.5 / J18.3
GPIO4_IO23 AC24 J1.21 J16.5
I2C4 SCL/SDA D13 / E13 J1.174 / J1.176 J16.10 / J16.12
PWM3 AF9 J1.69 J18.2
SPI1 CS0/SCK/SDI/SDO B6 / D6 / A7 / B7 J1.39 / J1.43 / J1.41 / J1.45 J16.4/ J16.2 / J16.6 / J16.8 Enabling it SPI devices will be no longer visible from Linux

Available Demos

  • driver_examples/i2c/interrupt_b2b_transfer/slave
  • driver_examples/i2c/interrupt_b2b_transfer/master
  • driver_examples/i2c/polling_b2b_transfer/slave
  • driver_examples/i2c/polling_b2b_transfer/master
  • driver_examples/wdog
  • driver_examples/sdma/scatter_gather
  • driver_examples/sdma/memory_to_memory
  • driver_examples/gpio/led_output
  • driver_examples/pwm
  • driver_examples/uart/auto_baudrate_detect
  • driver_examples/uart/interrupt
  • driver_examples/uart/idle_detect_sdma_transfer
  • driver_examples/uart/interrupt_rb_transfer
  • driver_examples/uart/sdma_transfer
  • driver_examples/uart/polling
  • driver_examples/uart/interrupt_transfer
  • driver_examples/gpt/timer
  • driver_examples/gpt/capture
  • driver_examples/ecspi/ecspi_loopback
  • driver_examples/ecspi/interrupt_b2b_transfer/slave
  • driver_examples/ecspi/interrupt_b2b_transfer/master
  • driver_examples/ecspi/polling_b2b_transfer/slave
  • driver_examples/ecspi/polling_b2b_transfer/master
  • driver_examples/rdc
  • driver_examples/tmu_1/monitor_threshold
  • driver_examples/tmu_1/temperature_polling
  • driver_examples/sema4/uboot
  • rtos_examples/freertos_ecspi/ecspi_loopback
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_uart
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer
  • rtos_examples/freertos_i2c
  • cmsis_driver_examples/i2c/int_b2b_transfer/slave
  • cmsis_driver_examples/i2c/int_b2b_transfer/master
  • cmsis_driver_examples/uart/sdma_transfer
  • cmsis_driver_examples/uart/interrupt_transfer
  • cmsis_driver_examples/ecspi/int_loopback_transfer
  • cmsis_driver_examples/ecspi/sdma_loopback_transfer
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • demo_apps/hello_world

Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.

memory type M7 memory area A53 memory area memory lentgh linker file
DDR 0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
0x7E000000-0x7E1FFFFF (code)
0x7E200000-0x7E3FFFFF (data)
0x7E400000-0x7EFFFFFF (data2)
16MB (DDR) MIMX8MN6xxxxx_cm7_ddr_ram.ld
TCM 0x00000000-0x0001FFFF (code)
0x20000000-0x2001FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
0x007E0000-0x007FFFFF (code)
0x00800000-0x0081FFFF (data)
0x7E000000-0x7EFFFFFF (data2)
256kB (TCM) + 16MB (DDR) MIMX8MN6xxxxx_cm7_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x7E000000 - 0x7EFFFFFF. For some reason, Cortex-M7 is not able to access RAM locations below 0x60000000: SoMs with 512 MB of RAM are not suitable to use Cortex-M7.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in i.MX 8M Applications Processors Reference Manual paragraphs:

  • 2.1.2 Cortex-A53 Memory Map
  • 2.1.3 Cortex-M7 Memory Map

JTAG

VAR-SOM-MX8M-NANO exposes JTAG signals on a header (not assembled by default) on the SOM top left side.

Here is the pinout:

pin signal description pin signal description
1 JTAG_VREF JTAG IO reference voltage,
connected to SOM_3V3_PER via 150 Ohm.
2 JTAG_TMS JTAG Mode Select signal
3 GND Digital Ground 4 JTAG_TCK JTAG Clock signal,
include PD of 8.2K Ohm.
5 GND Digital Ground 6 JTAG_TDO JTAG Data Out signal
7 GND Digital Ground 8 JTAG_TDI JTAG Data In signal
9 JTAG_TRST_B JTAG Reset signal,
active low signal
10 POR_B Programmer Reset,
used to put the SOC in reset state.

Please refer to SoM datasheet for further details.

Releases

mcuxpresso-2.7.0-mx8mn-v1.0

   *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.7.0-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.7.0_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.7.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.7.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/8-2019q3/RC1.1/gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-8-2019-q3-update-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-8-2019-q3-update
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN

mcuxpresso-2.8.0-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.8.0-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.8.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN

mcuxpresso-2.9.0-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.9.0-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.9.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mn-v1.1

mcuxpresso-2.10.0-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.10.0-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.10.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mn-v1.6

mcuxpresso-2.11.1-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.11.1-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.11.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8mn-v1.8

mcuxpresso-2.12.1-mx8mn-v1.0

 *HARDWARE_NAME = VAR-SOM-MX8M-NANO
  • SOC_HAS_M7 = true
  • RELEASE_NAME = mcuxpresso-2.12.1-mx8mn-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.12.1_V1.0_VAR-SOM-MX8M-NANO
  • MCUXPRESSO_VERSION = 2.12.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.12.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.10
  • BOARD_FOLDER = boards/som_mx8mn
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8M-NANO_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8M-NANO_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8M-NANO_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8MN_MEMORY-TYPES
  • JTAG_SECTION = VAR-SOM-MX8MN_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MN.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MN
  • YOCTO_RELEASE_TAG = mx8mn-yocto-hardknott-5.10.72_2.2.1-v1.0

DART-MX8M-PLUS

Sections

Available dtbs

To allow Cortex M7 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m7 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M7.

File Name
Description
imx8mp-var-dart-dt8customboard-m7.dtb DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on DT8MCustomBoard 2.x
imx8mp-var-dart-dt8mcustomboard-legacy-m7.dtb DART-MX8M-PLUS device tree blob for kernel >= 5.4.70 (Yocto Zeus) on on DT8MCustomBoard 1.x
imx8mp-var-som-symphony-m7.dtb VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board
imx8mp-var-som-symphony-2nd-ov5640m7.dtb VAR-SOM-MX8M-PLUS device tree blob for kernels >= 5.4.70 (Yocto Zeus) on on Symphony-Board with 2nd OV5640


Default M7 pins v1

Default M7 pins used by the demos are:

Function SoC balls DART-MX8M-PLUS pins DT8MCB pins VAR-SOM-MX8M-PLUS pins Symphony pins Notes
UART3 RX/TX AE6 / AJ4 J2.87 / J2.89 J12.11 / J12.13
UART4 RX/TX AH5 / AJ5 J1.115 / J1.171 J18.9 / J18.7
GPIO3_IO14 R26 J1.79 J17.10
GPIO4_IO03 AF10 J2.59 GPLED1 on DT8MCB rev 1.x
J11.20 on DT8MCB rev 2.x
I2C3 SCL/SDA AJ7 / AJ6 J3.46 / J3.42 J12.18/ J12.20
I2C4 SCL/SDA AF8 / AD8 J1.92 / J1.90 J16.13 / J16.15 Enabling it SPI devices will be no longer visible from Linux
PWM2 D8 J1.69 J18.2
PWM3 AE18 J3.36 J14.7
SPI1 CS0/SCK/SDI/SDO AE20 / AF20 / AD20 / AC20 J2.79 / J2.77 / J2.81 / J2.83 J16.4/ J16.2 / J16.8 / J16.6 Enabling it SPI devices will be no longer visible from Linux
SPI2 CS0/SCK/SDI/SDO AJ22 / AH21 / AH20 / AJ21 J1.39 / J1.43 / J1.41 / J1.45 J16.4/ J16.2 / J16.6 / J16.8 Enabling it SPI devices will be no longer visible from Linux
FLEXCAN1 RX/TX AH15 / AJ16 j2.56 / j2.50 J13.11 / J13.5 on DT8MCB rev 1.x, TTL levels (CAN transceiver not mounted!) Enabling it FLEXCAN1 devices will be no longer visible from Linux
J16.9 / J16.7 on DT8MCB rev 2.x, CANL/CANH levels (CAN transceiver mounted!)
FLEXCAN2 RX/TX AJ4 / AE6 J1.46 / J1.44 J16.18 / J16.20, CANL/CANH levels (CAN transceiver mounted!) Enabling it FLEXCAN2 devices will be no longer visible from Linux

Available Demos

  • driver_examples/i2c/interrupt_b2b_transfer/slave
  • driver_examples/i2c/interrupt_b2b_transfer/master
  • driver_examples/i2c/polling_b2b_transfer/slave
  • driver_examples/i2c/polling_b2b_transfer/master
  • driver_examples/wdog
  • driver_examples/sdma/scatter_gather
  • driver_examples/sdma/memory_to_memory
  • driver_examples/gpio/led_output
  • driver_examples/pwm
  • driver_examples/uart/auto_baudrate_detect
  • driver_examples/uart/interrupt
  • driver_examples/uart/interrupt_rb_transfer
  • driver_examples/uart/polling
  • driver_examples/uart/interrupt_transfer
  • driver_examples/gpt/timer
  • driver_examples/gpt/capture
  • driver_examples/ecspi/ecspi_loopback
  • driver_examples/ecspi/interrupt_b2b_transfer/slave
  • driver_examples/ecspi/interrupt_b2b_transfer/master
  • driver_examples/ecspi/polling_b2b_transfer/slave
  • driver_examples/ecspi/polling_b2b_transfer/master
  • driver_examples/rdc
  • driver_examples/tmu/monitor_threshold
  • driver_examples/tmu/temperature_polling
  • driver_examples/sema4/uboot
  • rtos_examples/freertos_ecspi/ecspi_loopback
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_uart
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer
  • rtos_examples/freertos_i2c
  • cmsis_driver_examples/i2c/int_b2b_transfer/slave
  • cmsis_driver_examples/i2c/int_b2b_transfer/master
  • cmsis_driver_examples/uart/interrupt_transfer
  • cmsis_driver_examples/ecspi/int_loopback_transfer
  • cmsis_driver_examples/ecspi/sdma_loopback_transfer
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • demo_apps/hello_world
  • driver_examples/uart/idle_detect_sdma_transfer
  • driver_examples/uart/sdma_transfer
  • cmsis_driver_examples/uart/sdma_transfer

Variscite Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M7 as described in related linker file.

memory type M7 memory area A53 memory area memory lentgh linker file
DDR 0x80000000-0x801FFFFF (code)
0x80200000-0x803FFFFF (data)
0x80400000-0x80FFFFFF (data2)
0x80000000-0x801FFFFF (code)
0x80200000-0x803FFFFF (data)
0x80400000-0x80FFFFFF (data2)
16MB (DDR) MIMX8MN6xxxxx_cm7_ddr_ram.ld
TCM 0x00000000-0x0001FFFF (code)
0x20000000-0x2001FFFF (data)
0x80000000-0x80FFFFFF (data2)
0x007E0000-0x007FFFFF (code)
0x00800000-0x0081FFFF (data)
0x80000000-0x80FFFFFF (data2)
256kB (TCM) + 16MB (DDR) MIMX8MN6xxxxx_cm7_ram.ld

All linker files are locate in the armgcc folder of each demo.

The DDR reserved area must much the one declared in the kernel device tree: at least 1 GB of RAM is required on the SoM to allow Cortex-M7 accessing the range 0x80000000 - 0x80FFFFFF.

The RPMSG area is located at 0x40000000: all SoMs allow Cortex-M7 accessing the RPMSG area.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in i.MX 8M-Plus Applications Processors Reference Manual paragraphs:

  • 2.2 Cortex-A53 Memory Map
  • 2.3 Cortex-M7 Memory Map

JTAG

The VAR-SOM-MX8M-PLUS exposes JTAG interface via an optional 10-pin header, on the SOM top left side.
The DART-MX8M-PLUS exports JTAG interface via an optional 10-pin header, on the DT8MCustomBoard top side.

Here is the pinout:

pin signal description pin signal description
1 JTAG_VREF JTAG IO reference voltage,
connected to SOM_3V3_PER via 150 Ohm.
2 JTAG_TMS JTAG Mode Select signal
3 GND Digital Ground 4 JTAG_TCK JTAG Clock signal,
include PD of 8.2K Ohm.
5 GND Digital Ground 6 JTAG_TDO JTAG Data Out signal
7 GND Digital Ground 8 JTAG_TDI JTAG Data In signal
9 JTAG_TRST_B JTAG Reset signal,
active low signal
10 POR_B Programmer Reset,
used to put the SOC in reset state.

Please refer to SoM datasheet for further details.

Releases

mcuxpresso-2.9.0-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS
  • RELEASE_NAME = mcuxpresso-2.9.0-mx8mp-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_DART-MX8M-PLUS
  • MCUXPRESSO_VERSION = 2.9.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/dart_mx8mp
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MP
  • YOCTO_RELEASE_TAG = zeus-fsl-5.4.70_2.3.2-mx8mp-v1.1
  • SOM_CAN_SUPPORT_1GB_DDR = yes

mcuxpresso-2.10.0-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS
  • RELEASE_NAME = mcuxpresso-2.10.0-mx8mp-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.10.0_V1.0_DART-MX8M-PLUS
  • MCUXPRESSO_VERSION = 2.10.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.10.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10-2020-q4-major
  • BOARD_FOLDER = boards/dart_mx8mp
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MP
  • YOCTO_RELEASE_TAG = hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2
  • SOM_CAN_SUPPORT_1GB_DDR = yes

mcuxpresso-2.11.1-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS
  • RELEASE_NAME = mcuxpresso-2.11.1-mx8mp-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.11.1_V1.0_DART-MX8M-PLUS
  • MCUXPRESSO_VERSION = 2.11.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.11.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.07
  • BOARD_FOLDER = boards/dart_mx8mp
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MP
  • YOCTO_RELEASE_TAG = hardknott-fsl-5.10.52_2.1.0-mx8mp-v1.2
  • SOM_CAN_SUPPORT_1GB_DDR = yes

mcuxpresso-2.12.1-mx8mp-v1.0

   *HARDWARE_NAME = DART-MX8M-PLUS
  • RELEASE_NAME = mcuxpresso-2.12.1-mx8mp-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.12.1_V1.0_DART-MX8M-PLUS
  • MCUXPRESSO_VERSION = 2.12.1
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.12.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-10.3-2021.10
  • BOARD_FOLDER = boards/dart_mx8mp
  • DOCS_FOLDER = docs
  • PINS_SECTION = DART-MX8M-PLUS_PINS_SECTION
  • DEMOS_SECTION = DART-MX8M-PLUS_DEMOS_SECTION
  • DTBS_SECTION = DART-MX8M-PLUS_DTBS_SECTION
  • MEMORY_TYPES_SECTION = DART-MX8M-PLUS_MEMORY-TYPES_VAR_SECTION
  • JTAG_SECTION = DART-MX8M-PLUS_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for EVK-MIMX8MP.pdf
  • NXP_REFERENCE_KIT = EVK-MIMX8MP
  • YOCTO_RELEASE_TAG = mx8mp-yocto-kirkstone-5.15-2.0.x-v1.0
  • SOM_CAN_SUPPORT_1GB_DDR = yes

VAR-SOM-MX8X

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m4 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.

File Name
Description
imx8qxp-var-som-symphony-sd-m4.dtb VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)
imx8qxp-var-som-symphony-m4.dtb VAR-SOM-MX8 device tree blob for kernel >= 5.4.85 (Yocto Dunfell)


Default M4 pins

Default M4 pins used by the demos are:

Function Pin
debug UART (UART2) RX: J18.5 / TX: J18.3
I2C (I2C3) SCL: J16.10 / SDA: J16.12
M4 GPIO (M40_GPIO0_IO00) J16.3
M4 PWM (M40_TPM0_CH0) J16.7

Available Demos

  • cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
  • cmsis_driver_examples/lpi2c/int_b2b_transfer/master
  • cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
  • cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
  • cmsis_driver_examples/lpuart/edma_transfer
  • cmsis_driver_examples/lpuart/interrupt_transfer
  • demo_apps/hello_world
  • driver_examples/edma/scatter_gather
  • driver_examples/edma/memory_to_memory
  • driver_examples/intmux
  • driver_examples/lpi2c/edma_b2b_transfer/slave
  • driver_examples/lpi2c/edma_b2b_transfer/master
  • driver_examples/lpi2c/interrupt_b2b_transfer/slave
  • driver_examples/lpi2c/interrupt_b2b_transfer/master
  • driver_examples/lpi2c/polling_b2b_transfer/slave
  • driver_examples/lpi2c/polling_b2b_transfer/master
  • driver_examples/lpi2c/read_accel_value_transfer
  • driver_examples/lpit
  • driver_examples/lpuart/edma_transfer
  • driver_examples/lpuart/interrupt_rb_transfer
  • driver_examples/lpuart/polling
  • driver_examples/lpuart/interrupt_transfer
  • driver_examples/rgpio/led_output
  • driver_examples/sema42/uboot
  • driver_examples/tpm/input_capture
  • driver_examples/tpm/dual_edge_capture
  • driver_examples/tpm/timer
  • driver_examples/tpm/simple_pwm
  • driver_examples/tpm/output_compare
  • driver_examples/tstmr
  • driver_examples/wdog32
  • mmcau_examples/mmcau_api
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer

Additional demos are available as reference code, but require HW/SW customization.

NXP Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type M4 memory area A35 memory area memory lentgh linker file
DDR 0x88000000-0x881FFFFF (code)
0x88200000-0x883FFFFF (data)
0x88400000-0x8FFFFFFF (data2)
0x88000000-0x881FFFFF (code)
0x88200000-0x883FFFFF (data)
0x88400000-0x8FFFFFFF (data2)
128MB (DDR) MIMX8QX6xxxFZ_cm4_ddr_ram.ld
TCM 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x88000000-0x8FFFFFFF (data2)
0x34FE0000-0x34FFFFFF (code)
0x35000000-0x3501FFFF (data)
0x88000000-0x8FFFFFFF (data2)
256kB (TCM) + 128MB (DDR) MIMX8QX6xxxFZ_cm4_ram.ld

All linker files are locate in the armgcc folder of each demo.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)

Further details about memory mapping are available in i.MX 8DualXPlus/8QuadXPlus Applications Processor Reference Manual paragraphs:

  • 2.2 System Memory Map
  • 2.2.9 Cortex-M4 Memory Map

JTAG

The VAR-SOM-MX8X exposes JTAG interface via an optional 10-pin header

Here is the pinout:

pin signal description pin signal (ball) description
1 JTAG_VREF JTAG reference voltage (3.3V) 2 JTAG_TMS (AG35) JTAG Mode Select
3 GND Digital Ground 4 JTAG_TCK (AE31) JTAG Clock
5 GND Digital Ground 6 JTAG_TDO (AF32) JTAG Data Out
7 RTCK JTAG Return clock 8 JTAG_TDI (AH34) JTAG Data In
9 JTAG_TRST_B_CONN JTAG TAP reset 10 JTAG_SRST_B JTAG System reset

Please refer to SOM datasheet for further details.


Releases

mcuxpresso-2.5.2-mx8qx-v1.0

       *HARDWARE_NAME = VAR-SOM-MX8X
  • SOC_HAS_SCU = true
  • RELEASE_NAME = mcuxpresso-2.5.2-mx8qx-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.5.2_V1.0_VAR-SOM-MX8X
  • YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8X
  • MCUXPRESSO_VERSION = 2.5.2
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.5.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-7-2018-q2-update
  • BOARD_FOLDER = boards/som_mx8qx
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8X_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8X_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8X_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION
  • JTAG_SECTION = VAR-SOM-MX8X_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for i.MX 8QuadXPlus.pdf
  • NXP_REFERENCE_KIT = IMX8QXP-MEK
  • SCFW_SOC = = mx8qx_b0
  • SCFW_PATCH_URL = = ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW
  • SCFW_M4_PATCH = = 0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff
  • IMX_MKIMAGE_SOC = = iMX8QX

mcuxpresso-2.8.0-mx8qx-v1.0

     *HARDWARE_NAME = VAR-SOM-MX8X
  • SOC_HAS_SCU = true
  • RELEASE_NAME = mcuxpresso-2.8.0-mx8qx-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.8.0_V1.0_VAR-SOM-MX8X
  • YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8X
  • MCUXPRESSO_VERSION = 2.8.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.8.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/som_mx8qx
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8X_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8X_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8X_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION
  • JTAG_SECTION = VAR-SOM-MX8X_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf
  • NXP_REFERENCE_KIT = IMX8QXP-MEK
  • SCFW_SOC = = mx8qx_b0
  • SCFW_PATCH_URL = = ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW
  • SCFW_M4_PATCH = = 0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff
  • IMX_MKIMAGE_SOC = = iMX8QX
  • SDK_GIT_TAG = som-mx8qx_mcuxpresso-2.8.0_v10
  • RELEASE_DATE = 02/18/2021
  • SUPPORTED_REV_SOM = v1.1 and higher
  • SUPPORTED_REV_CARRIER = v1.1 and higher
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8x-v1.0

mcuxpresso-2.9.0-mx8qx-v1.0

     *HARDWARE_NAME = VAR-SOM-MX8X
  • SOC_HAS_SCU = true
  • RELEASE_NAME = mcuxpresso-2.9.0-mx8qx-v1.0
  • RELEASE_LINK = MCUXPRESSO_2.9.0_V1.0_VAR-SOM-MX8X
  • YOCTO_RELEASE_LINK = RELEASE_SUMO_V1.2_VAR-SOM-MX8X
  • MCUXPRESSO_VERSION = 2.9.0
  • SDK_PATH = ~/var-mcuxpresso
  • SDK_GIT_URL = https://github.com/varigit/freertos-variscite
  • SDK_GIT_BRANCH = mcuxpresso_sdk_2.9.x-var01
  • TOOLCHAIN_URL = https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2020q2/gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_BZ2_NAME = gcc-arm-none-eabi-9-2020-q2-update-x86_64-linux.tar.bz2
  • TOOLCHAIN_FOLDER = gcc-arm-none-eabi-9-2020-q2-update
  • BOARD_FOLDER = boards/som_mx8qx
  • DOCS_FOLDER = docs
  • PINS_SECTION = VAR-SOM-MX8X_PINS_SECTION
  • DEMOS_SECTION = VAR-SOM-MX8X_DEMOS_SECTION
  • DTBS_SECTION = VAR-SOM-MX8X_DTBS_SECTION
  • MEMORY_TYPES_SECTION = VAR-SOM-MX8X_MEMORY-TYPES_NXP_SECTION
  • JTAG_SECTION = VAR-SOM-MX8X_JTAG_SECTION
  • NXP_USER_GUIDE = Getting Started with MCUXpresso SDK for MEK-MIMX8QX.pdf
  • NXP_REFERENCE_KIT = IMX8QXP-MEK
  • SCFW_SOC = = mx8qx_b0
  • SCFW_PATCH_URL = = ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8X/Software/SCFW
  • SCFW_M4_PATCH = = 0002-mx8qxp-var-som_scfw-1.2.2_sample-M4-customization.diff
  • IMX_MKIMAGE_SOC = = iMX8QX
  • SDK_GIT_TAG = som-mx8qx_mcuxpresso-2.9.0_v10
  • RELEASE_DATE = 03/04/2021
  • SUPPORTED_REV_SOM = v1.1 and higher
  • SUPPORTED_REV_CARRIER = v1.1 and higher
  • YOCTO_RELEASE_TAG = dunfell-fslc-5.4-2.1.x-mx8x-v1.0

VAR-SOM-MX8

Sections

Available dtbs

To allow Cortex M4 accessing shared resources without experiencing Linux kernel conflicts, a dedicated device tree must be loaded, containing m4 label in the name, using the fdt_file environment variable in U-Boot.

This device tree disables some of the base device tree nodes in order to avoid conflicts between the main processor and Cortex M4.

File Name
Description
imx8qm-var-som-symphony-dp-m4.dtb DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-som-symphony-hdmi-m4.dtb DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-som-symphony-lvds-m4.dtb DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-spear-sp8customboard-dp-m4.dtb DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-spear-sp8customboard-hdmi-m4.dtb DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-spear-sp8customboard-lvds.m4.dtb DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel >= 5.10.72 (Yocto Hardknott)
imx8qm-var-som-dp-m4.dtb DTB file for VAR-SOM-MX8 with DP display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-som-hdmi-m4.dtb DTB file for VAR-SOM-MX8 with HDMI display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-som-lvds-m4.dtb DTB file for VAR-SOM-MX8 with LVDS display and Cortex-M4 on Symphony Board for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-spear-dp-m4.dtb DTB file for SPEAR-MX8 with DP display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-spear-hdmi-m4.dtb DTB file for SPEAR-MX8 with HDMI display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)
imx8qm-var-spear-lvds-m4.dtb DTB file for SPEAR-MX8 with LVDS display and Cortex-M4 on SP8CustomBoard for kernel = 5.4.142 (Yocto Dunfell)


Default M4 pins

Default M4 pins used by the demos are:

Function SoC balls VAR-SOM-MX8 pins Symphony pins SPEAR-MX8 pins SP8CustomBoard pins Notes
M40_UART0 RX / TX AM44 / AU51 N/A N/A J3.32 / J3.38 J40 SP8CustomBoard requires SW8 ON, SW9 OFF
DMA_UART2 RX / TX BE35 / BE37 J1.175 / J1.124 J18.5 / J18.3 J1.80 / J1.82 J26.19 /J26.17
DMA_UART4 RX / TX AR47 / AU53 J1.115 / J1.171 J18.9 / J18.7 J3.34 / J3.29 J20.2 / J20.4 SPEAR-MX8 demos do not refer it
FLEXCAN0 RX/TX C5 / H6 J1.46 / J1.44 J16.18 / J16.20 J4.79 / J4.80 J26.1 / J26.3
M41_I2C0 SCL/SDA AR45 / AU49 N/A N/A J1.9 / J3.36 J20.18 / J20.20
DMA_I2C0 SCL/SDA BN9 / BN7 J1.174 / J1.176 J16.10 / J16.12 J2.88 / J1.90 J26.2 / J26.4
DMA_SPI0 CS0 / SCK / SDI / SDO BC1 / BB4 / BA5 / AY6 J1.79 / J1.75 / J1.77 / J1.70 J17.10 / J17.6 / J17.8 / J17.4 J2.78 / j2.74 / J2.72 / J2.76 J20.7 / J20.1 / J20.5 / J20.3
ADC_IN6 AL9 J1.39 J16.4 J4.62 J29.16 VAR-SOM-MX8 requires enabling a buffer (refer to the datasheet)
M40_TPM0 0 / 1 AR47 / AU53 J1.115 / J1.171 J18.9 / J18.7 J3.34 / J3.29 J20.2 / J20.4 pins are share with with DMA_UART4
GPIO3_IO06 BA3 J1.40 J17.2 J2.80 J20.9

Available Demos

  • cmsis_driver_examples/lpi2c/int_b2b_transfer/master
  • cmsis_driver_examples/lpi2c/int_b2b_transfer/slave
  • cmsis_driver_examples/lpi2c/edma_b2b_transfer/master
  • cmsis_driver_examples/lpi2c/edma_b2b_transfer/slave
  • cmsis_driver_examples/lpuart/edma_transfer
  • cmsis_driver_examples/lpuart/interrupt_transfer
  • cmsis_driver_examples/lpspi/edma_b2b_transfer/master
  • cmsis_driver_examples/lpspi/edma_b2b_transfer/slave
  • cmsis_driver_examples/lpspi/int_b2b_transfer/master
  • cmsis_driver_examples/lpspi/int_b2b_transfer/slave
  • demo_apps/hello_world
  • driver_examples/canfd/loopback_transfer
  • driver_examples/canfd/loopback
  • driver_examples/canfd/interrupt_transfer
  • driver_examples/edma/scatter_gather
  • driver_examples/edma/memory_to_memory
  • driver_examples/flexcan/loopback_edma_transfer
  • driver_examples/flexcan/loopback_transfer
  • driver_examples/flexcan/loopback
  • driver_examples/flexcan/interrupt_transfer
  • driver_examples/intmux
  • driver_examples/lpadc/interrupt
  • driver_examples/lpadc/polling
  • driver_examples/lpi2c/edma_b2b_transfer/slave
  • driver_examples/lpi2c/edma_b2b_transfer/master
  • driver_examples/lpi2c/interrupt_b2b_transfer/slave
  • driver_examples/lpi2c/interrupt_b2b_transfer/master
  • driver_examples/lpi2c/polling_b2b_transfer/slave
  • driver_examples/lpi2c/polling_b2b_transfer/master
  • driver_examples/lpi2c/read_accel_value_transfer
  • driver_examples/lpspi/edma_b2b_transfer/master
  • driver_examples/lpspi/edma_b2b_transfer/slave
  • driver_examples/lpspi/interrupt_b2b/master
  • driver_examples/lpspi/interrupt_b2b/slave
  • driver_examples/lpspi/interrupt_b2b_transfer/master
  • driver_examples/lpspi/interrupt_b2b_transfer/slave
  • driver_examples/lpspi/polling_b2b_transfer/master
  • driver_examples/lpspi/polling_b2b_transfer/slave
  • driver_examples/lpspi/polling_b2b_transfer/master
  • driver_examples/lpspi/polling_b2b_transfer/slave
  • driver_examples/lpit
  • driver_examples/lpuart/edma_transfer
  • driver_examples/lpuart/interrupt_rb_transfer
  • driver_examples/lpuart/polling
  • driver_examples/lpuart/interrupt_transfer
  • driver_examples/lpuart/interrupt
  • driver_examples/gpio/led_output
  • driver_examples/rgpio/led_output
  • driver_examples/sema42/uboot
  • driver_examples/sema42/dual_core
  • driver_examples/tpm/timer
  • driver_examples/tpm/simple_pwm
  • driver_examples/tpm/pwm_twochannel
  • driver_examples/tpm/output_compare
  • driver_examples/tpm/input_capture
  • driver_examples/tpm/dual_edge_capture
  • driver_examples/tpm/combine_pwm
  • driver_examples/tstmr
  • driver_examples/wdog32
  • mmcau_examples/mmcau_api
  • multicore_examples/rpmsg_lite_pingpong_rtos/linux_remote
  • multicore_examples/rpmsg_lite_str_echo_rtos
  • multicore_examples/rpmsg_lite_pingpong_rtos/sdk_remote
  • multicore_examples/rpmsg_lite_pingpong_rtos/sdk_master
  • rtos_examples/freertos_hello
  • rtos_examples/freertos_queue
  • rtos_examples/freertos_sem
  • rtos_examples/freertos_generic
  • rtos_examples/freertos_tickless
  • rtos_examples/freertos_mutex
  • rtos_examples/freertos_lpuart
  • rtos_examples/freertos_event
  • rtos_examples/freertos_swtimer
  • rtos_examples/freertos_lpi2c
  • rtos_examples/freertos_lpspi_b2b/master
  • rtos_examples/freertos_lpspi_b2b/slave
  • rtos_examples/freertos_lpspi

Additional demos are available as reference code, but require HW/SW customization.


NXP Memory types

The SDK allow linking using 2 different memory types: DDR, TCM.

Here is available a short summary of memory areas used by Cortex-M4 as described in related linker file.

memory type M4 if M4 memory area memory lentgh linker file
DDR 0 0x88000000-0x881FFFFF (code)
0x88200000-0x883FFFFF (data)
0x88400000-0x887FFFFF (data2)
8MB (DDR) MIMX8QM6xxxFF_cm4_core0_ddr_ram.ld
DDR 1 0x88800000-0x88BFFFFF (code)
0x88C00000-0x88FFFFFF (data)
0x89000000-0x8FFFFFFF (data2)
120MB (DDR) MIMX8QM6xxxFF_cm4_core1_ddr_ram.ld
TCM 0 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x88000000-0x887FFFFF (data2)
256kB (TCM) + 8MB (DDR) MIMX8QM6xxxFF_cm4_core0_ram.ld
TCM 1 0x1FFE0000-0x1FFFFFFF (code)
0x20000000-0x2001FFFF (data)
0x88800000-0x8FFFFFFF (data2)
256kB (TCM) + 120MB (DDR) MIMX8QM6xxxFF_cm4_core1_ram.ld

All linker files are locate in the armgcc folder of each demo.

After launching the build_all.sh command the following folder will be created in the armgcc folder

  • ddr_debug: containing DDR binaries compiled in debug mode (not stripped: symbols available)
  • ddr_release: containing DDR binaries compiled in release mode (stripped: no symbols available)
  • debug: containing TCM binaries compiled in debug mode (not stripped: symbols available)
  • release: containing TCM binaries compiled in release mode (stripped: no symbols available)


JTAG

The VAR-SOM-MX8 and SPEAR-MX8 exposes JTAG interface via an optional 10-pin header

Here is the pinout:

pin signal description pin signal (ball) description
1 JTAG_VREF JTAG reference voltage (3.3V) 2 JTAG_TMS (AG35) JTAG Mode Select
3 GND Digital Ground 4 JTAG_TCK (AE31) JTAG Clock
5 GND Digital Ground 6 JTAG_TDO (AF32) JTAG Data Out
7 RTCK JTAG Return clock 8 JTAG_TDI (AH34) JTAG Data In
9 JTAG_TRST_B_CONN JTAG TAP reset 10 JTAG_SRST_B JTAG System reset

Please refer to SOM datasheet for further details.

Releases

mcuxpresso-2.5.2-mx8qm-v1.0

      *HARDWARE_NAME = VAR-SOM-MX8

mcuxpresso-2.8.0-mx8qm-v1.0

    *HARDWARE_NAME = VAR-SOM-MX8

mcuxpresso-2.9.0-mx8qm-v1.0

    *HARDWARE_NAME = VAR-SOM-MX8


~/var-mcuxpresso/freertos-variscite/devices/MIMX8QM6