DART-6UL SPI: Difference between revisions

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{{PageHeader|DART-6UL- SPI}} {{DocImage|category1=DART-6UL|category2=Yocto}} __toc__
{{PageHeader|DART-6UL- SPI}} {{DocImage|category1=DART-6UL|category2=Yocto}} __toc__
 
In this example we will show how to configure SPI 1 and SPI 2 to work on SOM
= Kernel configuration=
Testing SPI from user space require some changes.
Testing SPI from user space require some changes.
* Configure your kernel and add spidev driver. Device Drivers -> SPI support -> <*>  User mode SPI device driver support<br>
* Configure your kernel and add spidev driver. Device Drivers -> SPI support -> <*>  User mode SPI device driver support<br>
* Add spidev and pinctrl to your device tree
=SPI 1=
== Add spidev to your device tree ==
<pre>
<pre>
&ecspi1 {
&ecspi1 {
Line 17: Line 19:
               reg = <0>;
               reg = <0>;
         };
         };
/*
};
        chip2: spidev@1 {
</pre>
              compatible = "spidev";
 
              spi-max-frequency = <20000000>;
== Add pin control to your device tree ==
              reg = <1>;
<pre>
&iomuxc {
imx6ul-evk {
pinctrl_ecspi1_1: ecspi1grp {
fsl,pins = <
MX6UL_PAD_CSI_DATA07__ECSPI1_MISO      0x100b1
MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI      0x100b1
MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK      0x100b1
MX6UL_PAD_CSI_DATA05__GPIO4_IO26        0x100b1
>;
};
};
};
*/
};
};
</pre>
</pre>
Note: The pins here were set arbitrarily. You should set them based on your hardware design, and make sure they are not conflicting with other devices in the device tree.<br>  you can also have multiple chip selects.<br>
= SPI 2 =
== Add spidev to your device tree ==
<pre>
&ecspi2 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio4 22 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2_1>;
status = "okay";


spidev@0 {
              compatible = "spidev";
              spi-max-frequency = <12000000>;
              reg = <0>;
        };
};
</pre>
== Add pin control to your device tree ==
<pre>
<pre>
pinctrl_ecspi1_1: ecspi1grp {
&iomuxc {
fsl,pins = <
imx6ul-evk {
MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1
pinctrl_ecspi2_1: ecspi2grp {
MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x100b1
fsl,pins = <
MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x100b1
MX6UL_PAD_CSI_DATA03__ECSPI2_MISO 0x100b1
MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x80000000
MX6UL_PAD_CSI_DATA02__ECSPI2_MOSI 0x100b1
>;
MX6UL_PAD_CSI_DATA00__ECSPI2_SCLK 0x100b1
MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x100b1
>;
};
};
};
};
</pre>
</pre>
Note: The pins here were set arbitrarily. You should set them based on your hardware design, and make sure they are not conflicting with other devices in the device tree.<br>  you can also have multiple chip selects.<br>
= Compile =
* Compile the Linux kernel and device tree.
Compile the kernel and device tree and update the SOM.
* For testing use the application:<br>https://raw.githubusercontent.com/varigit/linux-2.6-imx/master/Documentation/spi/spidev_test.c
= Testing =
For testing use the application:<br>https://raw.githubusercontent.com/varigit/linux-2.6-imx/master/Documentation/spi/spidev_test.c
It can be located on the kernel: ./Documentation/spi/spidev_test.c
To cross compile it use the following command
<pre>
$ $CC ./Documentation/spi/spidev_test.c -o ./spidev_test
</pre>

Revision as of 10:35, 20 August 2017

DART-6UL- SPI

In this example we will show how to configure SPI 1 and SPI 2 to work on SOM

Kernel configuration

Testing SPI from user space require some changes.

  • Configure your kernel and add spidev driver. Device Drivers -> SPI support -> <*> User mode SPI device driver support

SPI 1

Add spidev to your device tree

&ecspi1 {
	fsl,spi-num-chipselects = <1>;
	cs-gpios = <&gpio4 26 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1_1>;
	status = "okay";

        chip1: spidev@0 {
               compatible = "spidev";
               spi-max-frequency = <12000000>;
               reg = <0>;
        };
};

Add pin control to your device tree

&iomuxc {
	imx6ul-evk {
		pinctrl_ecspi1_1: ecspi1grp {
			fsl,pins = <
				MX6UL_PAD_CSI_DATA07__ECSPI1_MISO       0x100b1
				MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI       0x100b1
				MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK       0x100b1
				MX6UL_PAD_CSI_DATA05__GPIO4_IO26        0x100b1
			>;
		};
	};
};

Note: The pins here were set arbitrarily. You should set them based on your hardware design, and make sure they are not conflicting with other devices in the device tree.
you can also have multiple chip selects.

SPI 2

Add spidev to your device tree

&ecspi2 {
	fsl,spi-num-chipselects = <1>;
	cs-gpios = <&gpio4 22 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2_1>;
	status = "okay";

	spidev@0 {
               compatible = "spidev";
               spi-max-frequency = <12000000>;
               reg = <0>;
        };
};

Add pin control to your device tree

&iomuxc {
	imx6ul-evk {
		pinctrl_ecspi2_1: ecspi2grp {
			fsl,pins = <
				MX6UL_PAD_CSI_DATA03__ECSPI2_MISO	0x100b1
				MX6UL_PAD_CSI_DATA02__ECSPI2_MOSI	0x100b1
				MX6UL_PAD_CSI_DATA00__ECSPI2_SCLK	0x100b1
				MX6UL_PAD_CSI_DATA01__GPIO4_IO22	0x100b1
			>;
		};
	};
};

Compile

Compile the kernel and device tree and update the SOM.

Testing

For testing use the application:
https://raw.githubusercontent.com/varigit/linux-2.6-imx/master/Documentation/spi/spidev_test.c It can be located on the kernel: ./Documentation/spi/spidev_test.c To cross compile it use the following command

$ $CC ./Documentation/spi/spidev_test.c -o ./spidev_test