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VAR-SOM-MX7

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VAR-SOM-MX7
VAR-SOM-MX7 Supporting the i.MX7-Dual, the VAR-SOM-MX7 allows designers to use a single System on Module in a broad range of applications to achieve short time-to-market for their current innovations, while still accommodating potential R&D directions and marketing opportunities. This versatile solution’s -20 to 85 °C temperature range and Dual CAN support is ideal for industrial applications.


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Yocto Subscribe via rss

Sumo Release 01 - 4.9.88


Rocko Release 01 - 4.9.11


Pyro Release 01 - 4.1.15


Morty Release 01 - 4.1.15


Legacy releases


Development

Yocto.png
Debian Subscribe via rss

Debian Stretch R02- 4.9.88


Debian Stretch R01- 4.9.11


Debian Jessie R03 - 4.1.15


Debian Jessie R02 - 4.1.15


Debian Jessie R01 - 4.1.15


Development

Debian.png
Boot2QT Subscribe via rss
Boot2Qt Morty
(Qt 5.9.6, kernel 4.1.15)


Development

Qt logo.png
Specifications
CPUFreescale i.MX7-Dual:
Dual 1GHz ARM Cortex™-A7,
Real-time 200MHz Cortex™-M4 co-processor                           
MemoryUp to 2GB DDR3L
GPU2D Pixel acceleration engine
Display24bits Parallel LCD up to WXGA (1366 x 768),
MIPI DSI,
EPDC (E-Ink),
Resistive/capacitive touch screen
StorageSD card,
SLC NAND flash up to 512MB / eMMC up to 32GB
NetworkEthernet: 2 x 10/100/1000 Mbps,
WiFi: Certified 802.11 b/g/n/ac,
Bluetooth: 4.2 + BLE
RTCOn carrier
I2Cx4
SPIx4
One-WireN/A
UARTsx7, up to 3.6 Mbps
USBUSB 2.0: 1x Host, 1x OTG
AudioHeadphone, Line In/Out
Temperature Range-20 to 85°C
Dimensions38.6mm x 67.8mm



Latest News

March 2018: Critical software update: New U-Boot version with SPL support for the VAR-SOM-MX7

This critical software update allows future-proofing your software build and automatically support new DDR3 component generations which are released every 6-12 months by the vendors.
The same SPL and U-Boot will automatically adapt to the new DDR3 internal timing characteristics by retrieving the required parameters stored on the on-SOM EEPROM.

Further information:
Variscite uses SPL to initialize the RAM using values it reads at runtime from the EEPROM.
During production we write the appropriate init values for the RAM chip of each specific SOM on its EEPROM.
This way, in the future, when a specific RAM chip gets to its end of life (for example), we can replace it with another (and write its values on the EEPROM), without having to use a different U-Boot image.
So after this change customers can use the same SPL and U-Boot images on all of their boards, for the entire life time of their products, and the specific RAM chip on each SOM becomes irrelevant to them.

Affected SOMs:
All variants of the VAR-SOM-MX7

Integration:
This update was already pushed to all of the Yocto and Debian branches for the VAR-SOM-MX7, and the relevant Wiki pages were updated.
It is highly recommended to update to the latest commit of the branch you are using.
Otherwise, please apply the appropriate patch from the following:

Yocto Rocko: https://github.com/varigit/meta-variscite-fslc/commit/973c9377159e97a323af0973eb1608c98eeb2f5e

Yocto Pyro: https://github.com/varigit/meta-variscite-fslc/commit/a2eb62a77d106ad9adbfa580176349a6703b6474

Yocto Morty: https://github.com/varigit/meta-variscite-fslc/commit/e9da0249d46cd86ad0287b24a185f50d30815c4f

Yocto Krogoth R2: https://github.com/varigit/meta-variscite-imx/commit/028d44bb465e696bf41133cf7fe45d043e6df2af

Yocto Krogoth R1: https://github.com/varigit/meta-variscite-imx/commit/23c891561e48c6970ecb50bce9a81acddd64f995

Yocto Jethro: https://github.com/varigit/meta-variscite-mx6ul-mx7/commit/41c2eaa1d0158994bfbebec59b4aa45d2ac7bd21


Debian Stretch: https://github.com/varigit/debian-var/commit/6ba4c918ff00afe0fe470abadb608dee59ec8d4e

Debian Jessie R3: https://github.com/varigit/debian-var/commit/f7f9a22740cd296df493cd3f3a7ae331c8e6c66d

Debian Jessie R2: https://github.com/varigit/debian-var/commit/e9a2b313a2a8a69562c3a84c2bd1e9d45b518e08

Debian Jessie R1: https://github.com/varigit/debian-var/commit/ffe3b57ca67f4aeb0db9bcbf2fca8c4d52eba829


Also, starting from May 1, 2018, Variscite will replace the default production U-Boot image that is preloaded on the SOMs, and will ship new SOMs with SPL and U-Boot preloaded on them.
The new images will be based on commit 3b5f889, from the imx_v2017.03_4.9.11_1.0.0_ga_var01 U-Boot branch:
https://github.com/varigit/uboot-imx/commits/imx_v2017.03_4.9.11_1.0.0_ga_var01